AOT474/AOTF474 75V N-Channel MOSFET General Description Product Summary The AOT474 and AOTF474 use a robust technology that is designed to provide efficient and reliable power conversion even in the most demanding applications, including motor control. With low R DS(ON) and excellent thermal capability this device is appropriate for high current switching and can endure adverse operating conditions. 75V VDS ID (TO220 at V GS=10V) 127A ID (TO220FL at VGS=10V) 47A RDS(ON) (at VGS=10V) < 11.3mΩ 100% UIS Tested 100% Rg Tested Top View TO-220 G D G S TO-220FL D G D AOT474 S S AOTF474 Absolute Maximum Ratings TA=25°C unless otherwise noted AOT474 Symbol Parameter VDS Drain-Source Voltage VGS Gate-Source Voltage TC=25°C Continuous Drain Current Pulsed Drain Current C TA=25°C Continuous Drain Current Avalanche Current C Avalanche energy L=0.1mH C TC=25°C Power Dissipation B TC=100°C Power Dissipation A TA=70°C TA=25°C Rev 3: March 2009 Steady-State Steady-State 7 7 A A 562 mJ PD 417 57.5 208 29 PDSM 1.9 1.9 1.2 1.2 Symbol AD 9 106 Thermal Characteristics Parameter Maximum Junction-to-Ambient Maximum Junction-to-Ambient Maximum Junction-to-Case 9 EAS,EAR TJ, TSTG t ≤ 10s A IAS,IAR Junction and Storage Temperature Range A 33 240 IDSM TA=70°C 47 89 IDM Units V V ±20 127 ID TC=100°C AOTF474 75 RθJA RθJC www.aosmd.com W °C -55 to 175 AOT474 13.9 W AOTF474 13.9 Units °C/W 65 65 °C/W 0.36 2.6 °C/W Page 1 of 7 AOT474/AOTF474 Electrical Characteristics (T J=25°C unless otherwise noted) Parameter Symbol STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current Conditions Min ID=250μA, VGS=0V VDS=75V, VGS=0V 5 IGSS Gate-Body leakage current VDS=0V, VGS= ±20V Gate Threshold Voltage On state drain current VDS=VGS ID=250μA 2.6 VGS=10V, VDS=5V 240 VGS=10V, ID=30A Static Drain-Source On-Resistance gFS Forward Transconductance VSD IS=1A,VGS=0V Diode Forward Voltage Maximum Body-Diode Continuous Current TJ=125°C VDS=5V, ID=30A DYNAMIC PARAMETERS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qgs Gate Source Charge Qgd Gate Drain Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf Turn-Off Fall Time Units V 1 TJ=55°C RDS(ON) Max 75 VGS(th) ID(ON) IS Typ μA 100 nA 3.4 4 V 9.4 11.3 18 21.5 A 67 0.73 mΩ S 1 V 128 A 2240 2805 3370 pF 355 507 660 pF 22 36 50 pF VGS=0V, VDS=0V, f=1MHz 1.4 2.8 4.2 Ω 39 49.6 60 nC VGS=10V, VDS=30V, ID=30A 11 13.8 17 nC 8 14 20 nC VGS=0V, VDS=30V, f=1MHz VGS=10V, VDS=30V, RL=1Ω, RGEN=3Ω 15 ns 34 ns 42 ns 4.5 ns trr Body Diode Reverse Recovery Time IF=30A, dI/dt=500A/μs 35 50 65 Qrr Body Diode Reverse Recovery Charge IF=30A, dI/dt=500A/μs 330 472 614 ns nC A. The value of RθJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The RθJA is the sum of the thermal impedence from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300μs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating. G. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. Rev 0:February 2009 COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Rev 3: March 2009 www.aosmd.com Page 2 of 7 AOT474/AOTF474 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 150 105 10V 8V 120 VDS=5V 90 6V ID(A) ID (A) 75 90 5.5V 60 -40°C 60 125°C 45 30 5V 30 25°C 15 VGS=4.5V 0 0 0 2 4 6 8 3 10 13 4 4.5 5 5.5 6 6.5 7 2.5 11 Normalized On-Resistance 12 RDS(ON) (mΩ) 3.5 VGS(Volts) Figure 2: Transfer Characteristics (Note E) VDS (Volts) Fig 1: On-Region Characteristics (Note E) VGS=10V 10 9 8 7 VGS=10V ID=30A 2.0 1.5 17 5 2 10 1.0 0.5 0.0 6 0 20 40 60 80 -50 -25 100 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E) 0 25 50 75 100 125 150 175 200 Temperature (°C) 0 Figure 4: On-Resistance vs. Junction Temperature 18 (Note E) 1.0E+02 30 ID=30A 1.0E+01 25 15 IS (A) RDS(ON) (mΩ) 40 1.0E+00 20 125°C 10 125°C 1.0E-01 1.0E-03 25°C 5 -40°C 1.0E-02 25°C 1.0E-04 1.0E-05 0 4 8 12 16 20 VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E) Rev 3: March 2009 www.aosmd.com 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD (Volts) Figure 6: Body-Diode Characteristics (Note E) Page 3 of 7 AOT474/AOTF474 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 10 5000 VDS=30V ID=30A 4000 Capacitance (pF) VGS (Volts) 8 6 4 Ciss 3000 2000 Coss 2 1000 0 0 Crss 0 10 20 30 40 Qg (nC) Figure 7: Gate-Charge Characteristics 50 0 10 20 30 40 50 VDS (Volts) Figure 8: Capacitance Characteristics 60 IAR (A) Peak Avalanche Current 200 150 TA=25°C TA=100°C 100 TA=150°C 50 TA=125°C 0 0.000001 0.00001 0.0001 0.001 Time in avalanche, tA (s) Figure 9: Single Pulse Avalanche capability (Note C) Rev 3: March 2009 www.aosmd.com Page 4 of 7 AOT474/AOTF474 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 10000 10000 TJ(Max)=175°C TC=25°C TJ(Max)=175°C TC=25°C 8000 Power (W) Power (W) 8000 6000 4000 2000 6000 4000 2000 0 1E-05 0.0001 0.001 0.01 0.1 1 0 1E-05 0.0001 10 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toCase for AOT474 (Note F) 10000 0.001 0.01 0.1 TA=25°C 1000 1000 Power (W) Power (W) 10 10000 TA=25°C 100 10 100 10 1 0.001 0.1 10 1 0.001 1000 Pulse Width (s) Figure 12: Single Pulse Power Rating Junction-toAmbient for AOT474 (NoteG) 10μs RDS(ON) limited 1000 10ms 1.0 TJ(Max)=175°C TC=25°C 0.1 10.0 RDS(ON) limited 100μs 1ms 10ms DC 1.0 TJ(Max)=175°C TC=25°C 0.1 1 10 100 1000 VDS (Volts) Figure 14: Maximum Forward Biased Safe Operating Area for AOT474 (Note F) Rev 3: March 2009 0.1 ID (Amps) 1ms 10μs 100.0 100μs DC 0.0 0.01 10 1000.0 100.0 10.0 0.1 Pulse Width (s) Figure 13: Single Pulse Power Rating Junction-toAmbient for AOTF474 (Note G) 1000.0 ID (Amps) 1 Pulse Width (s) Figure 11: Single Pulse Power Rating Junction-toCase for AOTF474 (Note F) 0.0 0.01 www.aosmd.com 0.1 1 10 100 1000 VDS (Volts) Figure 15: Maximum Forward Biased Safe Operating Area for AOTF474 (Note F) Page 5 of 7 AOT474/AOTF474 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS ZθJC Normalized Transient Thermal Resistance 10 D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC 1 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJC=0.36°C/W 0.1 PD 0.01 Ton Single Pulse 0.001 0.000001 0.00001 0.0001 0.001 0.01 0.1 T 1 10 100 Pulse Width (s) Figure 16: Normalized Maximum Transient Thermal Impedance for AOT474 (Note F) ZθJC Normalized Transient Thermal Resistance 10 1 D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse RθJC=2.6°C/W 0.1 PD 0.01 0.001 0.00001 Ton Single Pulse 0.0001 0.001 0.01 0.1 1 T 10 100 Pulse Width (s) Figure 17: Normalized Maximum Transient Thermal Impedance for AOTF474 (Note F) Rev 3: March 2009 www.aosmd.com Page 6 of 7 AOT474/AOTF474 Gate Charge Test Circuit & W aveform Vgs Qg 10V + + Vds VDC - VDC DUT Qgs Qgd - Vgs Ig Charge Resistive Switching Test Circuit & W aveforms RL Vds Vds Vgs 90% + Vdd DUT VDC Rg - 10% Vgs Vgs t d(on) tr t d(off) ton tf toff Unclamped Inductive Switching (UIS) Test Circuit & W aveforms L 2 E AR = 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs VDC Rg - I AR Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vds - Isd Vgs Ig Rev 3: March 2009 Vgs Isd L + Vdd VDC - IF t rr dI/dt I RM Vdd Vds www.aosmd.com Page 7 of 7