INTERSIL ISL6292-2CR4-T

ISL6292
®
Data Sheet
July 25, 2005
FN9105.6
Li-ion/Li Polymer Battery Charger
Features
The ISL6292 is an integrated single-cell Li-ion or Li- polymer
battery charger capable of operating with an input voltage as
low as 2.4V. This charger is designed to work with various
types of ac adapters or a USB port.
• Complete Charger for Single-Cell Li-ion Batteries
The ISL6292 operates as a linear charger when the ac
adapter is a voltage source. The battery is charged in a
CC/CV (constant current/constant voltage) profile. The
charge current is programmable with an external resistor up
to 2A. The ISL6292 can also work with a current-limited
adapter to minimize the thermal dissipation, in which case
the ISL6292 combines the benefits of both a linear charger
and a pulse charger.
• Very Low Thermal Dissipation
• Integrated Pass Element and Current Sensor
• No External Blocking Diode Required
• 1% Voltage Accuracy
• Programmable Current Limit up to 2A
• Programmable End-of-Charge Current
• Charge Current Thermal Foldback
• NTC Thermistor Interface for Battery Temperature Monitor
• Accepts Multiple Types of Adapters or USB BUS Power
The ISL6292 features charge current thermal foldback to
guarantee safe operation when the printed circuit board is
space limited for thermal dissipation. Additional features
include preconditioning of an over-discharged battery, an
NTC thermistor interface for charging the battery in a safe
temperature range, automatic recharge, and thermally
enhanced QFN or DFN packages.
• Guaranteed to Operate at 2.65V After Start Up
Ordering Information
• Self-Charging Battery Packs
PART # (NOTE)
ISL6292-1CR3
TEMP. RANGE (°C)
-20 to 70
• Ambient Temperature Range: -20°C to 70°C
• Thermally-Enhanced QFN Packages
• Handheld Devices including Medical Handhelds
• PDAs, Cell Phones and Smart Phones
• Portable Instruments, MP3 Players
• Stand-Alone Chargers
PACKAGE
PKG. DWG.
#
10 Ld 3x3 DFN L10.3x3
• USB Bus-Powered Chargers
• Pb-Free Plus Anneal Available (RoHS Compliant)
ISL6292-1CR3-T 10 Ld 3x3 DFN Tape and Reel
Related Literature
ISL6292-2CR3
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
10 Ld 3x3 DFN L10.3x3
ISL6292-2CR3-T 10 Ld 3x3 DFN Tape and Reel
16 Ld 4x4 QFN L16.4x4
ISL6292-1CR4-T 16 Ld 4x4 QFN Tape and Reel
16 Ld 4x4 QFN L16.4x4
ISL6292-2CR4-T 16 Ld 4x4 QFN Tape and Reel
16 Ld 5x5 QFN L16.5x5B
ISL6292 (16 LEAD QFN)
TOP VIEW
ISL6292-1CR5-T 16 Ld 5x5 QFN Tape and Reel
-20 to 70
16 Ld 5x5 QFN L16.5x5B
VIN
ISL6292-2CR5
Pinouts
ISL6292-2CR5-T 16 Ld 5x5 QFN Tape and Reel
ISL6292EVAL1
ISL6292EVAL2
Evaluation Board for the 3x3 DFN Package Part.
Evaluation Board for the 4x4 QFN Package Part.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
VBAT
-20 to 70
16 15 14 13
VIN 1
12 VBAT
FAULT 2
11 TEMP
10 IMIN
STATUS 3
9 IREF
TIME 4
5
6
7
8
V2P8
ISL6292-1CR5
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”
VBAT
-20 to 70
VIN
ISL6292-2CR4
• Technical Brief TB379 “Thermal Characterization of
Packaged Semiconductor Devices”
EN
-20 to 70
GND
ISL6292-1CR4
TOEN
-20 to 70
ISL6292 (10 LEAD DFN)
TOP VIEW
VIN
1
10 VBAT
FAULT
2
9
TEMP
STATUS
3
8
IREF
TIME
4
7
V2P8
GND
5
6
EN
Add a “Z” to the end of the part # above for lead-free packages, e.g.,
“ISL6292-1CR3Z-T” is the part # for the lead-free ISL6292-1CR3-T.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003-2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL6292
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 7V
Output Pin Voltage (BAT). . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 5.5V
Signal Input Voltage (TOEN, TIME, IREF, IMIN) . . . . . . -0.3 to 3.2V
Output Pin Voltage (STATUS, FAULT) . . . . . . . . . . . . . . . . -0.3 to 7V
Charge Current (For 4x4 or 5x5 QFN Packages) . . . . . . . . . . . 2.1A
Charge Current (For 3x3 DFN Package) . . . . . . . . . . . . . . . . . 1.6A
Thermal Resistance (Junction to Ambient) θJA (°C/W) θJC (°C/W)
5x5 QFN Package (Notes 1, 2) . . . . . .
34
4
4x4 QFN Package (Notes 1, 2) . . . . . .
41
4
3x3 DFN Package (Notes 1, 2) . . . . . .
46
4
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . .-20°C to 70°C
Supply Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3V to 6.5V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. θJC, “case temperature” location is at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications
Typical values are tested at VIN = 5V and 25°C Ambient Temperature, maximum and minimum values are
guaranteed over 0°C to 70°C Ambient Temperature with a supply voltage in the range of 4.3V to 6.5V, unless
otherwise noted.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Rising VIN Threshold
3.0
3.4
4.0
V
Falling VIN Threshold
2.25
2.4
2.65
V
VIN floating or EN = LOW
-
-
3.0
µA
POWER-ON RESET
STANDBY CURRENT
VBAT Pin Sink Current
ISTANDBY
VIN Pin Supply Current
IVIN
VBAT floating and EN pulled low
-
30
-
µA
VIN Pin Supply Current
IVIN
VBAT floating and EN floating
-
1
-
mA
Output Voltage
VCH
ISL6292-1
4.059
4.10
4.141
V
Output Voltage
VCH
ISL6292-2
4.158
4.20
4.242
V
VOLTAGE REGULATION
Dropout Voltage
VBAT = 3.7V, 0.5A, 4X4 or 5X5 package
-
140
-
mV
Dropout Voltage
VBAT = 3.7V, 0.5A, 3X3 package
-
175
-
mV
CHARGE CURRENT
Constant Charge Current
ICHARGE
RIREF = 80kΩ, VBAT = 3.7V
0.9
1.0
1.1
A
Trickle Charge Current
ITRICKLE
RIREF = 80kΩ, VBAT = 2.0V
-
110
-
mA
Constant Charge Current
ICHARGE
IREF Pin Voltage > 1.2V, VBAT = 3.7V
400
450
520
mA
Trickle Charge Current
ITRICKLE
IREF Pin Voltage > 1.2V, VBAT = 2.0V
-
45
-
mA
Constant Charge Current
ICHARGE
IREF Pin Voltage < 0.4V, VBAT = 3.7V
-
-
100
mA
Trickle Charge Current
ITRICKLE
IREF Pin Voltage < 0.4V, VBAT = 2.0V
-
10
-
mA
85
110
135
mA
RIMIN = 80kΩ
End-of-Charge Threshold
RECHARGE THRESHOLD
Recharge Voltage Threshold
VRECHRG
ISL6292-2
-
4.0
-
V
Recharge Voltage Threshold
VRECHRG
ISL6292-1
-
3.90
-
V
2.7
2.8
3.0
V
TRICKLE CHARGE THRESHOLD
Trickle Charge Threshold Voltage
2
VMIN
FN9105.6
July 25, 2005
ISL6292
Electrical Specifications
Typical values are tested at VIN = 5V and 25°C Ambient Temperature, maximum and minimum values are
guaranteed over 0°C to 70°C Ambient Temperature with a supply voltage in the range of 4.3V to 6.5V, unless
otherwise noted. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
TEMPERATURE MONITORING
Low Battery Temperature Threshold
VTMIN
V2P8 = 3.0V
1.40
1.50
1.60
V
High Battery Temperature Threshold
VTMAX
V2P8 = 3.0V
0.34
0.38
0.42
V
Battery Removal Threshold
VRMV
V2P8 = 3.0V
-
2.25
-
V
Charge Current Foldback Threshold
TFOLD
85
100
115
°C
Current Foldback Gain
GFOLD
-
100
-
mA/°C
2.4
3.0
3.6
ms
2.0
-
-
V
TOEN and EN Input Low
-
-
0.8
V
IREF and IMIN Input High
1.2
-
-
V
IREF and IMIN Input Low
-
-
0.4
V
5
-
-
mA
OSCILLATOR
Oscillation Period
CTIME = 15nF
TOSC
LOGIC INPUT AND OUTPUT
TOEN Input High
STATUS/FAULT Sink Current
Pin Voltage = 0.8V
Typical Operating Performance The test conditions for the Typical Operating Performance are: VIN = 5V, TA = 25°C,
RIREF = RIMIN = 80kΩ, VBAT = 3.7V, Unless Otherwise Noted
4.210
4.2015
4.208
4.201
4.206
RIREF = 40kΩ
CHARGE CURRENT = 50mA
4.204
4.2
VBAT (V)
VBAT (V)
4.2005
4.1995
4.199
4.202
4.200
4.198
4.196
4.1985
4.194
4.198
4.192
4.190
4.1975
0
0.3
0.6
0.9
1.2
1.5
CHARGE CURRENT (A)
FIGURE 1. CHARGER OUTPUT VOLTAGE vs CHARGE
CURRENT
3
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 2. CHARGER OUTPUT VOLTAGE vs TEMPERATURE
FN9105.6
July 25, 2005
ISL6292
Typical Operating Performance The test conditions for the Typical Operating Performance are: VIN = 5V, TA = 25°C,
RIREF = RIMIN = 80kΩ, VBAT = 3.7V, Unless Otherwise Noted (Continued)
2
4.3
1.8
CHARGE CURRENT (A)
CHARGE CURRENT = 50mA
VBAT (V)
4.25
4.2
4.15
2A
1.6
1.4
1.5A
1.2
1A
1
0.8
0.5A
0.6
0.4
USB500
USB100
0.2
4.1
4.2
4.5
4.8
5.1
5.4
5.7
6
0
6.3
3
3.2
3.4
VIN (V)
1.6
2
1.4
1.8
1.5A
1.2
1.0
1.0A
0.8
0.6
0.5A
0.4
0.2
0.0
1.4
1.5A
1.2
2A
1
1A
0.8
0.5A
0.6
0.4
0
20
40
60
80
100
4
1.6
USB500
0.2
0
3.8
FIGURE 4. CHARGE CURRENT vs OUTPUT VOLTAGE
CHARGE CURRENT (A)
CHARGE CURRENT (A)
FIGURE 3. CHARGER OUTPUT VOLTAGE vs INPUT
VOLTAGE CHARGE CURRENT IS 50mA
3.6
VBAT (V)
120
USB100
4.3 4.5
4.7 4.9 5.1 5.3
5.5 5.7 5.9 6.1
6.3 6.5
VIN (V)
TEMPERATURE (°C)
FIGURE 5. CHARGE CURRENT vs AMBIENT TEMPERATURE
FIGURE 6. CHARGE CURRENT vs INPUT VOLTAGE
3
2.93
2.95
V2P8 PIN LOADED WITH 2mA
V2P8 VOLTAGE (V)
V2P8 VOLTAGE (V)
2.928
2.926
2.924
2.922
2.92
3.5
2.9
2.85
2.8
2.75
4
4.5
5
5.5
6
VIN (V)
FIGURE 7. V2P8 OUTPUT vs INPUT VOLTAGE
4
6.5
2.7
0
2
4
6
8
10
V2P8 LOAD CURRENT (mA)
FIGURE 8. V2P8 OUTPUT vs ITS LOAD CURRENT
FN9105.6
July 25, 2005
ISL6292
Typical Operating Performance The test conditions for the Typical Operating Performance are: VIN = 5V, TA = 25°C,
RIREF = RIMIN = 80kΩ, VBAT = 3.7V, Unless Otherwise Noted (Continued)
700
420
THERMAL FOLDBACK STARTS
NEAR 100°C
650
600
380
rDS(ON) (mΩ)
rDS(ON) (mΩ)
550
500
450
400
3x3 DFN
350
360
3x3 DFN
340
320
4x4 QFN
300
300
4x4 QFN
280
250
200
500mA CHARGE CURRENT,
RIREF = 40kΩ
400
0
20
40
60
80
100
260
3.0
120
3.2
3.4
1.8
50
1.6
45
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
20
40
60
80
100
EN = GND
35
30
25
20
15
10
5
0
120
0
20
60
80
100
120
FIGURE 12. INPUT QUIESCENT CURRENT vs TEMPERATURE
32
1.10
EN = GND
VIN QUIESCENT CURRENT (mA)
VIN QUIESCENT CURRENT (µA)
40
TEMPERATURE (°C)
FIGURE 11. REVERSE CURRENT vs TEMPERATURE
28
26
24
22
20
18
16
14
12
10
3.0
4.0
40
TEMPERATURE (°C)
30
3.8
FIGURE 10. rDS(ON) vs OUTPUT VOLTAGE USING CURRENT
LIMITED ADAPTERS
VIN QUIESCENT CURRENT (µA)
VBAT LEAKAGE CURRENT (µA)
FIGURE 9. rDS(ON) vs TEMPERATURE AT 3.7V OUTPUT
0.0
3.6
VBAT (V)
TEMPERATURE (°C)
3.5
4.0
4.5
5.0
5.5
6.0
VIN (V)
FIGURE 13. INPUT QUIESCENT CURRENT vs INPUT
VOLTAGE WHEN SHUTDOWN
5
6.5
1.05
1.00
0.95
BOTH VBAT AND EN
PINS FLOATING
0.90
0.85
0.80
4.3
4.6
4.9
5.2
5.5
5.8
6.1
6.4
VIN (V)
FIGURE 14. INPUT QUIESCENT CURRENT vs INPUT
VOLTAGE WHEN NOT SHUTDOWN
FN9105.6
July 25, 2005
ISL6292
Typical Operating Performance The test conditions for the Typical Operating Performance are: VIN = 5V, TA = 25°C,
RIREF = RIMIN = 80kΩ, VBAT = 3.7V, Unless Otherwise Noted (Continued)
28
STATUS PIN CURRENT (mA)
24
20
16
12
8
4
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
STATUS PIN VOLTAGE (V)
FIGURE 15. STATUS/FAULT PIN VOLTAGE vs CURRENT WHEN THE OPEN-DRAIN MOSFET TURNS ON
6
FN9105.6
July 25, 2005
ISL6292
Pin Description
EN (Pin 7 for 4x4, 5x5; Pin 6 for 3x3)
VIN (Pin 1, 15, 16 for 4x4, 5x5; Pin 1 for 3x3)
EN is the enable logic input. Connect the EN pin to LOW to
disable the charger or leave it floating to enable the charger.
VIN is the input power source. Connect to a wall adapter.
V2P8 (Pin 8 for 4x4, 5x5; Pin 7 for 3x3)
Fault (Pin 2)
This is a 2.8V reference voltage output. This pin outputs a
2.8V voltage source when the input voltage is above POR
threshold and outputs zero otherwise. The V2P8 pin can be
used as an indication for adapter presence.
FAULT is an open-drain output indicating fault status. This
pin is pulled to LOW under any fault conditions.
Status (Pin 3)
STATUS is an open-drain output indicating charging and
inhibit states. The STATUS pin is pulled LOW when the
charger is charging a battery.
IREF (Pin 9 for 4x4, 5x5; Pin 8 for 3x3)
This is the programming input for the constant charging
current.
Time (Pin 4)
IMIN (Pin 10 for 4x4, 5x5; N/A for 3x3)
The TIME pin determines the oscillation period by
connecting a timing capacitor between this pin and GND.
The oscillator also provides a time reference for the charger.
IMIN is the programmable input for the end-of-charge
current.
TEMP (Pin 11 for 4x4, 5x5; Pin 9 for 3x3)
GND (Pin 5)
GND is the connection to system ground.
TEMP is the input for an external NTC thermistor. The TEMP
pin is also used for battery removal detection.
TOEN (Pin 6 for 4x4, 5x5; N/A for 3x3)
VBAT (Pin 12, 13, 14 for 4x4, 5x5; Pin 10 for 3x3)
TOEN is the TIMEOUT enable input pin. Pulling this pin to
LOW disables the TIMEOUT charge-time limit for the fast
charge modes. Leaving this pin HIGH or floating enables the
TIMEOUT limit.
VBAT is the connection to the battery. Typically a 10µF
Tantalum capacitor is needed for stability when there is no
battery attached. When a battery is attached, only a 0.1µF
ceramic capacitor is required.
Typical Applications
Typical Application Circuit For 4x4 or 5x5 QFN Package Options
5V Wall
Adapter
VIN
1µ F
C1
VBAT
1µ F
C2
TOEN
1k Ω
R1
1k Ω
R2
D1
D2
ISL6292
FAULT
STATUS
EN
1 µF
C3
7
Battery
Pack
RU
RT
T
TEMP
IREF
IMIN
V2P8
TIME
V2P8
GND
R IMIN
80 kΩ
R IREF
80 kΩ
C TIME
15nF
FN9105.6
July 25, 2005
ISL6292
Typical Applications (Continued)
Typical Application Circuit For 3x3 DFN Package Option
5V Wall
Adapter
VBA
T
VIN
1µ F
C1
1kΩ
R1
1k Ω
R2
D1
D2
1µ F
C2
Battery
Pac
k
ISL6292
(3X3 DFN)
RT
TEMP
FAULT
RU
STATUS
V2P8
EN
IREF
TIME
GND
1µ F
C3
R IREF
80 kΩ
C TIME
15nF
QMAIN
VIN
VBAT
ISEN
Input_OK
VMIN
IT
100000:1
Current
Mirror
+
CA
-
RIREF
+
+
VA
-
IMIN
RIMIN
-
CHRG
Current
References
IMIN
VBAT
VPOR
-
IR
VIN
+
-
IREF
V2P8
VRECHRG
QSEN
VCH
References
Temperature
Monitoring
VPOR
C1
T
+
100mV
VCH
+
Trickle/Fast
ISEN
Minbat
VMIN
+
-
+
MIN_I
Recharge
V2P8
Under Temp
NTC
Interface
TEMP
-
LOGIC
VRECHRG
STATUS
STATUS
Over Temp
Batt Removal
FAULT
FAULT
TOEN
OSC
TIME
COUNTER
GND
Input_OK
EN
NOTE: For the 3x3 DFN package, the TOEN pin is left floating and the IMIN pin is connected to the V2P8 pin internally.
FIGURE 16. BLOCK PROGRAM
8
FN9105.6
July 25, 2005
ISL6292
Theory of Operation
The ISL6292 is an integrated charger for single-cell Li-ion or
Li-polymer batteries. The ISL6292 functions as a traditional
linear charger when powered with a voltage-source adapter.
When powered with a current-limited adapter, the charger
minimizes the thermal dissipation commonly seen in
traditional linear chargers.
As a linear charger, the ISL6292 charges a battery in the
popular constant current (CC) and constant voltage (CV)
profile. The constant charge current IREF is programmable
up to 2A (1.5A for the 3x3 DFN package) with an external
resistor or a logic input. The charge voltage VCH has 1%
accuracy over the entire recommended operating condition
range. The charger always preconditions the battery with
10% of the programmed current at the beginning of a charge
cycle, until the battery voltage is verified to be above the
minimum fast charge voltage, VMIN. This low-current
preconditioning charge mode is named trickle mode. The
verification takes 15 cycles of an internal oscillator whose
period is programmable with the timing capacitor. A thermalfoldback feature removes the thermal concern typically seen
in linear chargers. The charger reduces the charge current
automatically as the IC internal temperature rises above
100°C to prevent further temperature rise. The thermalfoldback feature guarantees safe operation when the printed
circuit board (PCB) is space limited for thermal dissipation.
A TEMP pin monitors the battery temperature to ensure a
safe charging temperature range. The temperature range is
programmable with an external negative temperature
coefficient (NTC) thermistor. The TEMP pin is also used to
detect the removal of the battery.
The charger offers a safety timer for setting the fast charge
time (TIMEOUT) limit to prevent charging a dead battery for
an extensively long time. The TIMEOUT limit can be
Trickle
Mode
VIN
VCH
Constant Current
Mode
Constant Voltage
Mode
disabled as needed by the TOEN pin. The trickle mode is
limited to 1/8 of TIMEOUT and cannot be disabled by the
TOEN pin.
The charger automatically re-charges the battery when the
battery voltage drops below a recharge threshold. When the
wall adapter is not present, the ISL6292 draws less than 1µA
current from the battery.
Three indication pins are available from the charger to
indicate the charge status. The V2P8 outputs a 2.8V dc
voltage when the input voltage is above the power-on reset
(POR) level and can be used as the power-present
indication. This pin is capable of sourcing a 2mA current, so
it can also be used to bias external circuits. The STATUS pin
is an open-drain logic output that turns LOW at the beginning
of a charge cycle until the end-of-charge (EOC) condition is
qualified. The EOC condition is: the battery voltage rises
above the recharge threshold and the charge current falls
below a user-programmable EOC current threshold. Once
the EOC condition is qualified, the STATUS output rises to
HIGH and is latched. The latch is released at the beginning
of a charge or re-charge cycle. The open-drain FAULT pin
turns low when any fault conditions occur. The fault
conditions include the external battery temperature fault, a
charge time fault, or the battery removal.
Figure 17 shows the typical charge curves in a traditional
linear charger powered with a constant-voltage adapter.
From the top to bottom, the curves represent the constant
input voltage, the battery voltage, the charge current and the
power dissipation in the charger. The power dissipation PCH
is given by the following equations:
P CH = ( V IN -V BAT ) ⋅ I CHARGE
where ICHARGE is the charge current. The maximum power
dissipation occurs during the beginning of the CC mode. The
Trickle
Mode
Inhibit
Input Voltage
Battery Voltage
(EQ. 1)
VIN
VCH
VMIN
VMIN
IREF
IREF
ILIM
Constant Current
Mode
Constant Voltage
Mode
Inhibit
Input Voltage
Battery Voltage
Charge Current
Charge Current
IREF/10
IREF/10
P1
P2
P3
Power Dissipation
TIMEOUT
FIGURE 17. TYPICAL CHARGE CURVES USING A
CONSTANT-VOLTAGE ADAPTER
9
P1
P2
Power Dissipation
TIMEOUT
FIGURE 18. TYPICAL CHARGE CURVES USING A CURRENTLIMITED ADAPTER
FN9105.6
July 25, 2005
ISL6292
maximum power the IC is capable of dissipating is
dependent on the thermal impedance of the printed-circuit
board (PCB). Figure 17 shows, with dotted lines, two cases
that the charge currents are limited by the maximum power
dissipation capability due to the thermal foldback.
When using a current-limited adapter, the thermal situation
in the ISL6292 is totally different. Figure 18 shows the typical
charge curves when a current-limited adapter is employed.
The operation requires the IREF to be programmed higher
than the limited current ILIM of the adapter, as shown in
Figure 18. The key difference of the charger operating under
such conditions occurs during the CC mode.
The Block Diagram, Figure 16, aids in understanding the
operation. The current loop consists of the current amplifier
CA and the sense MOSFET QSEN. The current reference IR
is programmed by the IREF pin. The current amplifier CA
regulates the gate of the sense MOSFET QSEN so that the
sensed current ISEN matches the reference current IR. The
main MOSFET QMAIN and the sense MOSFET QSEN form a
current mirror with a ratio of 100,000:1, that is, the output
charge current is 100,000 times IR. In the CC mode, the
current loop tries to increase the charge current by
enhancing the sense MOSFET QSEN, so that the sensed
current matches the reference current. On the other hand,
the adapter current is limited, the actual output current will
never meet what is required by the current reference. As a
result, the current error amplifier CA keeps enhancing the
QSEN as well as the main MOSFET QMAIN, until they are
fully turned on. Therefore, the main MOSFET becomes a
power switch instead of a linear regulation device. The
power dissipation in the CC mode becomes:
P CH = R DS ( ON ) ⋅ I CHARGE
2
(EQ. 2)
where rDS(ON) is the resistance when the main MOSFET is
fully turned on. This power is typically much less than the
peak power in the traditional linear mode.
The worst power dissipation when using a current-limited
adapter typically occurs at the beginning of the CV mode, as
shown in Figure 18. The equation EQ. 1 applies during the
CV mode. When using a very small PCB whose thermal
impedance is relatively large, it is possible that the internal
temperature can still reach the thermal foldback threshold. In
that case, the IC is thermally protected by lowering the
charge current, as shown with the dotted lines in the charge
current and power curves. Appropriate design of the adapter
can further reduce the peak power dissipation of the
ISL6292. See the Application Information section for more
information.
Figure 19 illustrates the typical signal waveforms for the
linear charger from the power-up to a recharge cycle. More
detailed Applications Information is given below.
Applications Information
Power on Reset (POR)
The ISL6292 resets itself as the input voltage rises above
the POR rising threshold. The V2P8 pin outputs a 2.8V
voltage, the internal oscillator starts to oscillate, the internal
timer is reset, and the charger begins to charge the battery.
The two indication pins, STATUS and FAULT, indicate a
LOW and a HIGH logic signal respectively. Figure 19
illustrates the start up of the charger between t0 to t2.
The ISL6292 has a typical rising POR threshold of 3.4V and
a falling POR threshold of 2.4V. The 2.4V falling threshold
guarantees charger operation with a current-limited adapter
to minimize the thermal dissipation.
Charge Cycle
A charge cycle consists of three charge modes: trickle mode,
constant current (CC) mode, and constant voltage (CV)
mode. The charge cycle always starts with the trickle mode
until the battery voltage stays above VMIN (2.8V typical) for
15 consecutive cycles of the internal oscillator. If the battery
voltage drops below VMIN during the 15 cycles, the 15-cycle
counter is reset and the charger stays in the trickle mode.
The charger moves to the CC mode after verifying the
battery voltage. As the battery-pack terminal voltage rises to
the final charge voltage VCH, the CV mode begins. The
terminal voltage is regulated at the constant VCH in the CV
mode and the charge current is expected to decline. After
the charge current drops below IMIN (programmable for the
4x4 and 5X5 package and programmed to 1/10 of IREF for
the 3x3 package, see End-of-Charge Current for more
detail), the ISL6292 indicates the end-of-charge (EOC) with
the STATUS pin. The charging actually does not terminate
until the internal timer completes its length of TIMEOUT in
order to bring the battery to its full capacity. Signals in a
charge cycle are illustrated in Figure 19 between points t2 to
t5.
VIN
POR Threshold
V2P8
Charge Cycle
Charge Cycle
STATUS
15 Cycles to
1/8 TIMEOUT
FAULT
VRECHRG
VBAT
15 Cycles
2.8V VMIN
IMIN
ICHARGE
t0
t1 t2 t3
t4
t5
t6 t7
t8
FIGURE 19. OPERATION WAVEFORMS
10
FN9105.6
July 25, 2005
ISL6292
The following events initiate a new charge cycle:
Disabling TIMEOUT Limit
• POR,
The TIMEOUT limit for the fast charge modes can be
disabled by pulling the TOEN pin to LOW or shorting it to
GND. When this happens, the charger becomes a currentlimited LDO (low-dropout) supply with its voltage regulated at
the final charge voltage VCH and the current limit determined
by the IREF pin. If the LDO load current drops below the
end-of-charge current (refer to End-of-Charge section), the
STATUS pin will indicate.
• a new battery being inserted (detected by TEMP pin),
• the battery voltage drops below a recharge threshold after
completing a charge cycle,
• recovery from an battery over-temperature fault,
• or, the EN pin is toggled from GND to floating.
Further description of these events are given later in this
data sheet.
Recharge
After a charge cycle completes, charging is prohibited until
the battery voltage drops to a recharge threshold, VRECHRG
(see Electrical Specifications). Then a new charge cycle
starts at point t6 and ends at point t8, as shown in Figure 19.
The safety timer is reset at t6.
Internal Oscillator
The internal oscillator establishes a timing reference. The
oscillation period is programmable with an external timing
capacitor, CTIME, as shown in Typical Applications. The
oscillator charges the timing capacitor to 1.5V and then
discharges it to 0.5V in one period, both with 10µA current.
The period TOSC is:
6
T OSC = 0.2 ⋅ 10 ⋅ C TIME
( sec onds )
(EQ. 3)
A 1nF capacitor results in a 0.2ms oscillation period. The
accuracy of the period is mainly dependent on the accuracy
of the capacitance and the internal current source.
Total Charge Time
The total charge time for the CC mode and CV mode is
limited to a length of TIMEOUT. A 22-stage binary counter
increments each oscillation period of the internal oscillator to
set the TIMEOUT. The TIMEOUT can be calculated as:
TIMEOUT = 2
22
C TIME
⋅ T OSC = 14 ⋅ -----------------1nF
( minutes )
(EQ. 4)
A 1nF capacitor leads to 14 minutes of TIMEOUT. For
example, a 15nF capacitor sets the TIMEOUT to be 3.5
hours. The charger has to reach the end-of-charge condition
before the TIMEOUT, otherwise, a TIMEOUT fault is issued.
The TIMEOUT fault latches up the charger. There are two
ways to release such a latch-up: either to recycle the input
power, or toggle the EN pin to disable the charger and then
enable it again.
The trickle mode charge has a time limit of 1/8 TIMEOUT. If
the battery voltage does not reach VMIN within this limit, a
TIMEOUT fault is issued and the charger latches up. The
charger stays in trickle mode for at least 15 cycles of the
internal oscillator and, at most, 1/8 of TIMEOUT, as shown in
Figure 19.
11
The trickle charge time limit, however, is not disabled even
when the TOEN pin is pulled to LOW. The charger operates
in the trickle mode at the beginning of a charge cycle even if
the TIMEOUT is disabled. Leaving the TOEN pin floating is
recommended to enable the TIMEOUT. Driving the TOEN
pin above 3.0V is not recommended.
Charge Current Programming
The charge current is programmed by the IREF pin. There
are three ways to program the charge current:
1. driving the IREF pin above 1.3V
2. driving the IREF pin below 0.4V,
3. or using the RIREF as shown in the Typical Applications.
The voltage of IREF is regulated to a 0.8V reference voltage
when not driven by any external source. The charging
current during the constant current mode is 100,000 times
that of the current in the RIREF resistor. Hence, depending
on how IREF pin is used, the charge current is,



I REF = 



500mA
5
0.8V
----------------- × 10 ( A )
R IREF
100mA
V IREF > 1.3V
R IREF
(EQ. 5)
V IREF < 0.4V
The 500mA current is a guaranteed maximum value for
high-power USB port, with the typical value of 450mA. The
100mA current is also a guaranteed maximum value for the
low-power USB port. This design accommodates the USB
power specification.
The internal reference voltage at the IREF pin is capable of
sourcing less than 100µA current. When pulling down the
IREF pin with a logic circuit, the logic circuit needs to be able
to sink at least 100µA current.
When the adapter is current limited, it is recommended that
the reference current be programmed to at least 30% higher
than the adapter current limit (which equals the charge
current). In addition, the charge current should be at least
350mA so that the voltage difference between the VIN and
the VBAT pins is higher than 100mV. The 100mV is the
offset voltage of the input-output voltage comparator shown
in the block diagram.
FN9105.6
July 25, 2005
ISL6292
End-of-Charge (EOC) Current
The end-of-charge current IMIN sets the level at which the
charger starts to indicate the end of the charge with the
STATUS pin, as shown in Figure 19. The charger actually
does not terminate charging until the end of the TIMEOUT,
as described in the Total Charge Time section. The IMIN is
set in two ways, by connecting a resistor between the IMIN
pin and ground, or by connecting the IMIN pin to the V2P8
pin. When programming with the resistor, the IMIN is set in
the equation below.
V REF
4
0.8V
I MIN = 10000 ⋅ ---------------- = ---------------- ×10 ( A )
R IMIN R IMIN
(EQ. 6)
where RIMIN is the resistor connected between the IMIN pin
and the ground. When connected to the V2P8 pin, the IMIN
is set to 1/10 of IREF, except when the IREF pin is shorted to
GND. Under this exception, IMIN is 5mA. For the ISL6292 in
the 3X3 DFN package, the IMIN pin is bonded internally to
V2P8.
charge unless the battery voltage is already above the
recharge threshold.
2.8V Bias Voltage
The ISL6292 provides a 2.8V voltage for biasing the internal
control and logic circuit. This voltage is also available for
external circuits such as the NTC thermistor circuit. The
maximum allowed external load is 2mA.
NTC Thermistor
The ISL6292 uses two comparators (CP2 and CP3) to form a
window comparator, as shown in Figure 22. When the TEMP
pin voltage is “out of the window,” determined by the VTMIN
and VTMAX, the ISL6292 stops charging and indicates a fault
condition. When the temperature returns to the set range, the
charger re-starts a charge cycle. The two MOSFETs, Q1 and
Q2, produce hysteresis for both upper and lower thresholds.
The temperature window is shown in Figure 21.
2.8V
Charge Current Thermal Foldback
Over-heating is always a concern in a linear charger. The
maximum power dissipation usually occurs at the beginning
of a charge cycle when the battery voltage is at its minimum
but the charge current is at its maximum. The charge current
thermal foldback function in the ISL6292 frees users from
the over-heating concern.
Figure 20 shows the current signals at the summing node of
the current error amplifier CA in the Block Diagram. IR is the
reference. IT is the current from the Temperature Monitoring
block. The IT has no impact on the charge current until the
internal temperature reaches approximately 100°C; then IT
rises at a rate of 1µA/°C. When IT rises, the current control
loop forces the sensed current ISEN to reduce at the same
rate. As a mirrored current, the charge current is 100,000
times that of the sensed current and reduces at a rate of
100mA/°C. For a charger with the constant charge current
set at 1A, the charge current is reduced to zero when the
internal temperature rises to 110°C. The actual charge
current settles between 100°C to 110°C.
VTMIN (1.4V)
VTMIN- (1.2V)
TEMP
Pin
Voltage
VTMAX+ (0.406V)
VTMAX (0.35V)
0V
Under
Temp
Over
Temp
FIGURE 21. CRITICAL VOLTAGE LEVELS FOR TEMP PIN
2.8V
V2P8
ISL6292
Battery
Removal
CP1
IR
-
R1
40K
VRMV
R2
60K
+
Under
Temp
IT
CP2
-
RU
VTMIN
+
To TEMP Pin
R3
75K
TEMP
Q1
ISEN
Over
Temp
100OC
Temperature
FIGURE 20. CURRENT SIGNALS AT THE AMPLIFIER CA INPUT
Usually the charge current should not drop below IMIN
because of the thermal foldback. For some extreme cases if
that does happen, the charger does not indicate end-of12
CP3 -
+
RT
R4
25K
VTMAX
Q2
R5
4K
GND
FIGURE 22. THE INTERNAL AND EXTERNAL CIRCUIT FOR
THE NTC INTERFACE
FN9105.6
July 25, 2005
ISL6292
As the TEMP pin voltage rises from low and exceeds the
1.4V threshold, the under temperature signal rises and does
not clear until the TEMP pin voltage falls below the 1.2V
falling threshold. Similarly, the over-temperature signal is
given when the TEMP pin voltage falls below the 0.35V
threshold and does not clear until the voltage rises above
0.406V. The actual accuracy of the 2.8V is not important
because all the thresholds and the TEMP pin voltage are
ratios determined by the resistor dividers, as shown in
Figure 22.
The temperature hysteresis can be estimated. At the low
temperature, the hysteresis is approximately,
The NTC thermistor is required to have a resistance ratio of
7:1 at the low and the high temperature limits, that is,
where the 0.039 is the NTC at 47°C.
R COLD
-------------------- = 7
R HOT
(EQ. 7)
This is because at the low temperature limit, the TEMP pin
voltage is 1.4V, which is 1/2 of the 2.8V bias. Thus,
R COLD = R U
(EQ. 8)
where RU is the pull-up resistor as shown in Figure 22. On
the other hand, at the high temperature limit the TEMP pin
voltage is 0.35V, 1/8 of the 2.8V bias. Therefore,
RU
R HOT = -------7
(EQ. 9)
Various NTC thermistors are available for this application.
Table 1 shows the resistance ratio and the negative
temperature coefficient of the curve-1 NTC thermistor from
Vishay (http://www.vishay.com) at various temperatures. The
resistance at 3°C is approximately seven times the
resistance at 47°C, that is:
R 3o C
---------------- = 7
R 47 o C
(EQ. 10)
1.4V-1.2V
T hysLOW ≈ -------------------------------- ≈ 3
1.4V ⋅ 0.051
0.406V-0.35V
T hysHIGH ≈ -------------------------------------- ≈ 4
0.35V ⋅ 0.039
NTC (%/°C)
0
3.266
5.1
3
2.806
5.1
5
2.540
5.0
25
1.000
4.4
45
0.4368
4.0
47
0.4041
3.9
50
0.3602
3.9
13
(oC)
(EQ. 12)
For applications that do not need to monitor the battery
temperature, the NTC thermistor can be replaced with a
regular resistor of a half value of the pull up resistor RU.
Another option is to connect the TEMP pin to the IREF pin
that has a 0.8V output. With such connection, the IREF pin
can no longer be programmed with logic inputs.
Battery Removal Detection
The ISL6292 assumes that the thermistor is co-packed with
the battery and is removed together with the battery. When
the charger senses a TEMP pin voltage that is 2.1V or
higher, it assumes that the battery is removed. The battery
removal detection circuit is also shown in Figure 22. When a
battery is removed, a FAULT signal is indicated and charging
is halted. When a battery is inserted again, a new charge
cycle starts.
Indications
The ISL6292 has three indications: the input presence, the
charge status, and the fault indication. The input presence is
indicated by the V2P8 pin while the other two indications are
presented by the STATUS pin and FAULT pin respectively.
Figure 23 shows the V2P8 pin voltage vs. the input voltage.
Table 2 summarizes the other two pins.
3.4V
2.4V
TABLE 1. RESISTANCE RATIO OF VISHAY’S CURVE-1 NTC
RT/R25°C
(EQ. 11)
where 0.051 is the NTC at 3°C. Similarly, the high
temperature hysteresis is,
Therefore, if 3°C is the low temperature limit, then the high
temperature limit is approximately 47°C. The pull-up resistor
RU can choose the same value as the resistance at 3°C.
TEMPERATURE (°C)
(oC)
VIN
2.8V
V2P8
FIGURE 23. THE V2P8 PIN OUTPUT vs THE INPUT VOLTAGE
AT THE VIN PIN. VERTICAL: 1V/DIV,
HORIZONTAL: 100ms/DIV.
FN9105.6
July 25, 2005
ISL6292
Shutdown
The ISL6292 can be shutdown by pulling the EN pin to
ground. When shut down, the charger draws typically less
than 30µA current from the input power and the 2.8V output
at the V2P8 pin is also turned off. The EN pin needs be
driven with an open-drain or open-collector logic output, so
that the EN pin is floating when the charger is enabled.
TABLE 2. STATUS INDICATIONS
FAULT STATUS
High
Charge completed with no fault (Inhibit) or
Standby
High
Low
Charging in one of the three modes
Low
High
Fault
The adapter is equivalent to a voltage source with output
resistance when running in the constant-voltage region;
because of this characteristic. As the charge current drops,
the adapter output moves from point B to point C, shown in
Figure 24.
The battery pack can be approximated as an ideal cell with a
lumped-sum resistance in series, also shown in Figure 24.
The ISL6292 charger sits between the adapter and the
battery.
INDICATION
High
current-voltage characteristics curve, such as point A, to
higher voltage until reaching the breaking point B, as shown
in Figure 24.
C
VNL
*Both outputs are pulled up with external resistors.
VFL
B
Input and Output Capacitor Selection
Figure 24 shows the ideal current-voltage characteristics of
a current-limited adapter. VNL is the no-load adapter output
voltage and VFL is the full load voltage at the current limit
ILIM. Before its output current reaches the limit ILIM, the
adapter presents the characteristics of a voltage source. The
slope rO represents the output resistance of the voltage
supply. For a well regulated supply, the output resistance
can be very small, but some adapters naturally have a
certain amount of output resistance.
The adapter is equivalent to a current source when running
in the constant-current region. Being a current source, its
output voltage is dependent on the load, which, in this case,
is the charger and the battery. As the battery is being
charged, the adapter output rises from a lower voltage in the
ILIM
Adapter
Charger
RDS(ON)
VPACK
rO
VNL
I
RPACK
VCELL
Battery
Pack
(A) THE EQUIVALENT CIRCUIT IN THE
CONSTANT CURRENT REGION
VCELL
A
ILIM
FIGURE 24. THE IDEAL I-V CHARACTERISTICS OF A
CURRENT LIMITED ADAPTER
Working with Current-Limited Adapter
As described earlier, the ISL6292 minimizes the thermal
dissipation when running off a current-limited ac adapter, as
shown in Figure 18. The thermal dissipation can be further
reduced when the adapter is properly designed. The
following demonstrates that the thermal dissipation can be
minimized if the adapter output reaches the full-load output
voltage (point B in Figure 24) before the battery pack voltage
reaches the final charge voltage (4.1V or 4.2V). The
assumptions for the following discussion are: the adapter
current limit = 750mA, the battery pack equivalent
resistance = 200mΩ, and the charger ON resistance is
350mΩ.
Charger
VADAPTER
RPACK
ILIM
VNL
Current-Limited Adapter
VADAPTER
VPACK
rO
Typically any type of capacitors can be used for the input
and the output. Use of a 0.47µF or higher value ceramic
capacitor for the input is recommended. When the battery is
attached to the charger, the output capacitor can be any
ceramic type with the value higher than 0.1µF. However, if
there is a chance the charger will be used as an LDO linear
regulator, a 10µF tantalum capacitor is recommended.
Adapter
rO = (VNL - VFL)/ILIM
RDS(ON)
I
VCELL
VPACK
Adapter
Charger
rO
VADAPTER 4.2V DC
Output
VNL
RPACK
Battery
Pack
(B) THE EQUIVALENT CIRCUIT IN THE
RESISTANCE-LIMIT REGION
VPACK
I
RPACK
Battery
Pack
VCELL
(C) THE EQUIVALENT CIRCUIT WHEN THE
PACK VOLTAGE REACHES THE FINAL
CHARGE VOLTAGE
FIGURE 25. THE EQUIVALENT CIRCUIT OF THE CHARGING SYSTEM WORKING WITH CURRENT LIMITED ADAPTERS
14
FN9105.6
July 25, 2005
ISL6292
When charging in the constant-current region, the pass
element in the charger is fully turned on. The charger is
equivalent to the on-resistance of the internal P-channel
MOSFET. The entire charging system is equivalent to the
circuit shown in Figure 25 (A). The charge current is the
constant current limit ILIM, and the adapter output voltage
can be easily found out as,
V Adapter = I LIM ⋅ R DS ( ON ) + V PACK
(EQ. 13)
where VPACK is the battery pack voltage. The power
dissipation in the charger is given in EQ. 2, where ICHARGE
= ILIM.
A critical condition of the adapter design is that the adapter
output reaches point B in Figure 24 at the same time as the
battery pack voltage reaches the final charge voltage (4.1V
or 4.2V), that is:
V Critical = I LIM ⋅ R DS ( ON ) + V CH
(EQ. 14)
For example, if the final charge voltage is 4.2V, the rDS(ON)
is 350mΩ, and the current limit ILIM is 750mA, the critical
adapter full-load voltage is 4.4625V.
When the above condition is true, the charger enters the
constant-voltage mode simultaneously as the adapter exits
the current-limit mode. The equivalent charging system is
shown in Figure 25 (C). Since the charge current drops at a
higher rate in the constant-voltage mode than the increase
rate of the adapter voltage, the power dissipation decreases
as the charge current decreases. Therefore, the worst case
thermal dissipation occurs in the constant-current charge
mode. Figure 26 (A) shows the I-V curves of the adapter
output, the battery pack voltage and the cell voltage during
the charge. The 5.9V no-load voltage is just an example
value higher than the full-load voltage. The cell voltage
4.05V uses the assumption that the pack resistance is
200mΩ. Figure 27 (A) illustrates the adapter voltage, battery
pack voltage, the charge current and the power dissipation in
the charger respectively in the time domain.
If the battery pack voltage reaches 4.2V (or 4.1V) before the
adapter reaches point B in Figure 24, a voltage step is
expected at the adapter output when the pack voltage
reaches the final charge voltage. As a result, the charger
power dissipation is also expected to have a step rise. This
case is shown in Figure 18 as well as Figure 27 (C). Under
this condition, the worst case thermal dissipation in the
charger happens when the charger enters the constant
voltage mode.
If the adapter voltage reaches the full-load voltage before the
pack voltage reaches 4.2V (or 4.1V), the charger will
experience the resistance-limit situation. In this situation, the
ON resistance of the charger is in series with the adapter output
resistance. The equivalent circuit for the resistance-limit region
15
is shown in Figure 25(B). Eventually, the battery pack voltage
will reach 4.2V (or 4.1V) because the adapter no-load voltage is
higher than 4.2V (or 4.1V), then Figure 25(C) becomes the
equivalent circuit until charging ends. In this case, the worstcase thermal dissipation also occurs in the constant-current
charge mode. Figure 26 (B) shows the I-V curves of the
adapter output, the battery pack voltage and the cell voltage for
the case VFL = 4V. In the case, the full-load voltage is lower
than the final charge voltage (4.2V), but the charger is still able
to fully charge the battery as long as the no-load voltage is
above 4.2V. Figure 27 (B) illustrates the adapter voltage,
battery pack voltage, the charge current and the power
dissipation in the charger respectively in the time domain.
Based on the above discussion, the worst-case power
dissipation occurs during the constant-current charge mode
if the adapter full-load voltage is lower than the critical
voltage given in EQ. 14. Even if that is not true, the power
dissipation is still much less than the power dissipation in the
traditional linear charger. Figure 28 and 29 are scopecaptured waveforms to demonstrate the operation with a
current-limited adapter.
The waveforms in Figure 28 are the adapter output voltage
(1V/div), the battery voltage (1V/div), and the charge current
(200mA/div) respectively. The time scale is 1ks/div. The
adapter current is limited to 600mA and the charge current is
programmed to 1A. Note that the voltage difference is only
approximately 200mV and the adapter voltage tracks the
battery voltage in the CC mode. Figure 28 also shows the
resistance-limit mode before entering the CV mode.
5.9V
4.2V
(A)
VADAPTER
4.4625V
VPACK
4.2V
VCELL
4.05V
0.75A
VPACK
VNL
(B)
VADAPTER
4.2V
4.0V
3.775V
4.2V
VCELL
3.625V
0.55A
0.75A
FIGURE 26. THE I-V CHARACTERISTICS OF THE CHARGER
WITH DIFFERENT CURRENT LIMITED
ADAPTERS
FN9105.6
July 25, 2005
ISL6292
VIN
VIN
VPACK
VIN
VPACK
Charge
Current
Charge
Current
Charge
Current
Power
Power
Power
TIME
TIME
Const. Cur
Constant Voltage
VPACK
Const. Cur
Res
Limit
(A)
TIME
Constant Voltage
Const. Cur
Constant Voltage
(C)
(B)
FIGURE 27. THE OPERATING CURVES WITH THREE DIFFERENT CURRENT LIMITED ADAPTERS
Figure 29 shows the actual captured waveforms depicted in
Figure 27 (C). The constant charge current is 750mA. A step
in the adapter voltage during the transition from CC mode to
CV mode is demonstrated.
IREF Programming Using Current-Limited Adapter
The ISL6292 has 10% tolerance for the charge current.
Typically the current-limited adapter also has 10% tolerance.
In order to guarantee proper operation, it is recommended
that the nominal charge current be programmed at least
30% higher than the nominal current limit of the adapter.
Board Layout Recommendations
The ISL6292 internal thermal foldback function limits the
charge current when the internal temperature reaches
approximately 100°C. In order to maximize the current
capability, it is very important that the exposed pad under the
package is properly soldered to the board and is connected
to other layers through thermal vias. More thermal vias and
more copper attached to the exposed pad usually result in
better thermal performance. On the other hand, the number
of vias is limited by the size of the pad. The exposed pads for
the 5x5 and 4x4 QFN packages are able to have 9 and 5
vias respectively. The 3x3 DFN package allows 8 vias be
placed in two rows. Since the pins on the 3x3 DFN package
are on only two sides, as much top layer copper as possible
should be connected to the exposed pad to minimize the
thermal impedance. Refer to the ISL6292 evaluation boards
for layout examples.
CV Mode
CC Mode
Resistance Limit Mode
FIGURE 28. SCOPE CAPTURED WAVEFORMS SHOWING THE
THREE MODES
1hour
FIGURE 29. SCOPE CAPTURED WAVEFORMS SHOWING THE
CASE THAT THE FULL-LOAD ADAPTER
VOLTAGE IS HIGHER THAN THE CRITICAL
VOLTAGE
16
FN9105.6
July 25, 2005
ISL6292
Dual Flat No-Lead Plastic Package (DFN)
2X
0.15 C A
D
A
L10.3x3
10 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE
MILLIMETERS
2X
0.15 C B
E
6
INDEX
AREA
SYMBOL
MIN
0.80
0.90
1.00
-
-
-
0.05
-
0.28
5,8
2.05
7,8
1.65
7,8
0.20 REF
0.18
D
1.95
E
SIDE VIEW
C
SEATING
PLANE
A3
1
e
1.60
-
0.50 BSC
-
k
0.25
-
-
L
0.30
0.35
0.40
N
10
Nd
5
3. Nd refers to the number of terminals on D.
4. All dimensions are in millimeters. Angles are in degrees.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
NX L
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
NX b
5
(Nd-1)Xe
REF.
3
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
E2/2
N-1
8
2
2. N is the number of terminals.
E2
e
-
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
NX k
8
1.55
NOTES:
D2/2
2
N
-
Rev. 3 6/04
D2
(DATUM B)
2.00
8
7
6
INDEX
AREA
(DATUM A)
0.08 C
-
3.00 BSC
E2
0.10 C
0.23
3.00 BSC
D2
A
NOTES
A
A3
B
MAX
A1
b
TOP VIEW
NOMINAL
0.10 M C A B
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
BOTTOM VIEW
C
L
0.415
NX (b)
(A1)
0.200
5
L
NX L
e
SECTION "C-C"
C
NX b
C C
TERMINAL TIP
FOR ODD TERMINAL/SIDE
17
FN9105.6
July 25, 2005
ISL6292
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L16.4x4
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220-VGGC ISSUE C)
MILLIMETERS
SYMBOL
MIN
NOMINAL
MAX
NOTES
A
0.80
0.90
1.00
-
A1
-
-
0.05
-
A2
-
-
1.00
A3
b
0.23
D
0.28
9
0.35
5, 8
4.00 BSC
D1
D2
9
0.20 REF
-
3.75 BSC
1.95
2.10
9
2.25
7, 8
E
4.00 BSC
-
E1
3.75 BSC
9
E2
1.95
e
2.10
2.25
7, 8
0.65 BSC
-
k
0.25
-
-
-
L
0.50
0.60
0.75
8
L1
-
-
0.15
10
N
16
2
Nd
4
3
Ne
4
3
P
-
-
0.60
9
θ
-
-
12
9
Rev. 5 5/04
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
18
FN9105.6
July 25, 2005
ISL6292
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L16.5x5B
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220VHHB ISSUE C)
MILLIMETERS
SYMBOL
MIN
NOMINAL
A
0.80
A1
-
A2
-
A3
b
NOTES
0.90
1.00
-
-
0.05
-
-
1.00
9
0.20 REF
0.28
D
0.33
9
0.40
5, 8
5.00 BSC
D1
D2
MAX
-
4.75 BSC
2.95
3.10
9
3.25
7, 8
E
5.00 BSC
-
E1
4.75 BSC
9
E2
2.95
e
3.10
3.25
7, 8
0.80 BSC
-
k
0.25
-
-
-
L
0.35
0.60
0.75
8
L1
-
-
0.15
10
N
16
2
Nd
4
3
Ne
4
3
P
-
-
0.60
9
θ
-
-
12
9
Rev. 1 10/02
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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19
FN9105.6
July 25, 2005