INTERSIL HGTG10N120BND

HGTG10N120BND
Data Sheet
January 2000
35A, 1200V, NPT Series N-Channel IGBT
with Anti-Parallel Hyperfast Diode
The HGTG10N120BND is a Non-Punch Through (NPT)
IGBT design. This is a new member of the MOS gated high
voltage switching IGBT family. IGBTs combine the best
features of MOSFETs and bipolar transistors. This device
has the high input impedance of a MOSFET and the low onstate conduction loss of a bipolar transistor. The IGBT used
is the development type TA49290. The Diode used is the
development type TA49189.
File Number
4579.3
Features
• 35A, 1200V, TC = 25oC
• 1200V Switching SOA Capability
• Typical Fall Time. . . . . . . . . . . . . . . . 140ns at TJ = 150oC
• Short Circuit Rating
• Low Conduction Loss
Packaging
JEDEC STYLE TO-247
The IGBT is ideal for many high voltage switching
applications operating at moderate frequencies where low
conduction losses are essential, such as: AC and DC motor
controls, power supplies and drivers for solenoids, relays
and contactors.
E
C
G
Formerly Developmental Type TA49302.
Ordering Information
PART NUMBER
HGTG10N120BND
PACKAGE
TO-247
BRAND
10N120BND
NOTE: When ordering, use the entire part number.
Symbol
G
E
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,598,461
4,682,195
4,803,533
4,888,627
4,417,385
4,605,948
4,684,413
4,809,045
4,890,143
4,430,792
4,620,211
4,694,313
4,809,047
4,901,127
1
4,443,931
4,631,564
4,717,679
4,810,665
4,904,609
4,466,176
4,639,754
4,743,952
4,823,176
4,933,740
4,516,143
4,639,762
4,783,690
4,837,606
4,963,951
4,532,534
4,641,162
4,794,432
4,860,080
4,969,027
4,587,713
4,644,637
4,801,986
4,883,767
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000
HGTG10N120BND
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
HGTG10N120BND
UNITS
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES
1200
V
Collector Current Continuous
At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25
At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM
Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM
Switching Safe Operating Area at TJ = 150oC (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . SSOA
Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Short Circuit Withstand Time (Note 2) at VGE = 15V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC
Short Circuit Withstand Time (Note 2) at VGE = 12V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC
35
17
80
±20
±30
55A at 1200V
298
2.38
-55 to 150
260
8
15
A
A
A
V
V
W
W/oC
oC
oC
µs
µs
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Pulse width limited by maximum junction temperature.
2. VCE(PK) = 840V, TJ = 125oC, RG = 10Ω.
TC = 25oC, Unless Otherwise Specified
Electrical Specifications
PARAMETER
SYMBOL
Collector to Emitter Breakdown Voltage
Collector to Emitter Leakage Current
Collector to Emitter Saturation Voltage
Gate to Emitter Threshold Voltage
BVCES
ICES
VCE(SAT)
VGE(TH)
TEST CONDITIONS
IC = 250µA, VGE = 0V
VCE = BVCES
IC = 10A,
VGE = 15V
TC = 25oC
TC = 125oC
TC = 150oC
TC = 25oC
TC = 150oC
IC = 90µA, VCE = VGE
MIN
TYP
MAX
UNITS
1200
-
-
V
-
-
250
µA
-
170
-
µA
-
-
2.5
mA
-
2.45
2.7
V
-
3.7
4.2
V
6.0
6.8
-
V
-
-
±250
nA
55
-
-
A
IGES
VGE = ±20V
Switching SOA
SSOA
TJ = 150oC, RG = 10Ω, VGE = 15V,
L = 400µH, VCE(PK) = 1200V
Gate to Emitter Plateau Voltage
VGEP
IC = 10A, VCE = 0.5 BVCES
-
10.4
-
V
IC = 10A,
VCE = 0.5 BVCES
VGE = 15V
-
100
120
nC
VGE = 20V
-
130
150
nC
-
23
26
ns
-
11
15
ns
-
165
210
ns
-
100
140
ns
-
0.85
1.05
mJ
-
0.8
1.0
mJ
Gate to Emitter Leakage Current
On-State Gate Charge
QG(ON)
Current Turn-On Delay Time
td(ON)I
Current Rise Time
trI
Current Turn-Off Delay Time
td(OFF)I
Current Fall Time
tfI
Turn-On Energy
EON
Turn-Off Energy (Note 3)
EOFF
2
IGBT and Diode at TJ = 25oC
ICE = 10A
VCE = 0.8 BVCES
VGE = 15V
RG = 10Ω
L = 2mH
Test Circuit (Figure 20)
HGTG10N120BND
TC = 25oC, Unless Otherwise Specified (Continued)
Electrical Specifications
PARAMETER
SYMBOL
Current Turn-On Delay Time
td(ON)I
Current Rise Time
trI
Current Turn-Off Delay Time
td(OFF)I
Current Fall Time
tfI
Turn-On Energy
EON
Turn-Off Energy (Note 3)
EOFF
Diode Forward Voltage
VEC
Diode Reverse Recovery Time
trr
Thermal Resistance Junction To Case
RθJC
TEST CONDITIONS
MIN
TYP
MAX
UNITS
-
21
25
ns
-
11
15
ns
-
190
250
ns
-
140
200
ns
-
1.75
2.3
mJ
-
1.1
1.4
mJ
IEC = 10A
-
2.55
3.2
V
IEC = 10A, dIEC/dt = 200A/µs
-
57
70
ns
IEC = 1A, dIEC/dt = 200A/µs
-
32
40
ns
IGBT
-
-
0.42
oC/W
Diode
-
-
1.25
oC/W
IGBT and Diode at TJ = 150oC
ICE = 10A
VCE = 0.8 BVCES
VGE = 15V
RG = 10Ω
L = 2mH
Test Circuit (Figure 20)
NOTE:
3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
Unless Otherwise Specified
ICE , DC COLLECTOR CURRENT (A)
35
VGE = 15V
30
25
20
15
10
5
0
25
50
75
100
125
TC , CASE TEMPERATURE (oC)
FIGURE 1. DC COLLECTOR CURRENT vs CASE
TEMPERATURE
3
150
ICE , COLLECTOR TO EMITTER CURRENT (A)
Typical Performance Curves
60
50
TJ = 150oC, RG = 10Ω, VG = 15V, L = 400µH
40
30
20
10
0
0
200
400
600
800
1000
1200
1400
VCE , COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
HGTG10N120BND
TJ = 150oC, RG = 10Ω, L = 2mH, V CE = 960V
100
50
TC = 75oC, VGE = 15V, IDEAL DIODE
fMAX1 = 0.05 / (td(OFF)I + td(ON)I)
10 fMAX2 = (PD - PC) / (EON + EOFF)
TC
PC = CONDUCTION DISSIPATION 75oC
(DUTY FACTOR = 50%)
75oC
110oC
RØJC = 0.42oC/W, SEE NOTES
110oC
VGE
15V
12V
15V
12V
1
2
5
10
20
25
250
VCE = 840V, RG = 10Ω, TJ = 125oC
20
200
tSC
15
150
10
100
5
12
ICE , COLLECTOR TO EMITTER CURRENT (A)
DUTY CYCLE <0.5%, VGE = 12V
PULSE DURATION = 250µs
40
TC = 25oC
20
TC = 150oC
10
0
0
2
6
4
8
10
16
50
TC = -55oC
TC = 25oC
40
30
TC = 150oC
20
10
DUTY CYCLE <0.5%, VGE = 15V
PULSE DURATION = 250µs
0
0
2
4
6
8
10
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
5
2.0
RG = 10Ω, L = 2mH, VCE = 960V
EOFF, TURN-OFF ENERGY LOSS (mJ)
EON , TURN-ON ENERGY LOSS (mJ)
15
50
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
4
TJ = 150oC, VGE = 12V, VGE = 15V
3
2
1
TJ = 25oC, VGE = 12V, VGE = 15V
0
14
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
ICE, COLLECTOR TO EMITTER CURRENT (A)
ICE, COLLECTOR TO EMITTER CURRENT (A)
50
TC = -55oC
13
VGE , GATE TO EMITTER VOLTAGE (V)
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
30
ISC
ISC, PEAK SHORT CIRCUIT CURRENT (A)
Unless Otherwise Specified (Continued)
tSC , SHORT CIRCUIT WITHSTAND TIME (µs)
fMAX , OPERATING FREQUENCY (kHz)
Typical Performance Curves
0
5
10
15
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
4
20
RG = 10Ω, L = 2mH, VCE = 960V
1.5
TJ = 150oC, VGE = 12V OR 15V
1.0
TJ = 25oC, VGE = 12V OR 15V
0.5
0
0
5
10
15
20
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
HGTG10N120BND
Typical Performance Curves
Unless Otherwise Specified (Continued)
50
RG = 10Ω, L = 2mH, VCE = 960V
TJ = 25oC, TJ = 150oC, VGE = 12V
RG = 10Ω, L = 2mH, VCE = 960V
40
35
trI , RISE TIME (ns)
tdI , TURN-ON DELAY TIME (ns)
40
30
25
TJ = 25oC, TJ = 150oC, VGE = 12V
30
20
10
20
TJ = 25oC OR TJ = 150oC, VGE = 15V
TJ = 25oC, TJ = 150oC, VGE = 15V
15
0
10
5
15
0
20
0
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
300
15
20
RG = 10Ω, L = 2mH, VCE = 960V
RG = 10Ω, L = 2mH, VCE = 960V
350
250
300
tfI , FALL TIME (ns)
td(OFF)I , TURN-OFF DELAY TIME (ns)
10
FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT
400
VGE = 12V, VGE = 15V, TJ = 150oC
250
200
200
TJ = 150oC, VGE = 12V OR 15V
150
100
150
100
TJ = 25oC, VGE = 12V OR 15V
VGE = 12V, VGE = 15V, TJ = 25oC
50
0
10
5
15
0
20
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
20
VGE, GATE TO EMITTER VOLTAGE (V)
DUTY CYCLE <0.5%, VCE = 20V
PULSE DURATION = 250µs
80
60
TC = 25oC
20
0
TC = 150oC
7
8
9
TC = -55oC
11
10
12
13
VGE , GATE TO EMITTER VOLTAGE (V)
FIGURE 13. TRANSFER CHARACTERISTIC
5
14
10
15
20
FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER
CURRENT
100
40
5
ICE , COLLECTOR TO EMITTER CURRENT (A)
ICE , COLLECTOR TO EMITTER CURRENT (A)
ICE , COLLECTOR TO EMITTER CURRENT (A)
5
ICE , COLLECTOR TO EMITTER CURRENT (A)
15
IG (REF) = 1mA, RL = 60Ω, TC = 25oC
15
VCE = 1200V
VCE = 800V
10
VCE = 400V
5
0
0
20
40
60
80
100
QG , GATE CHARGE (nC)
FIGURE 14. GATE CHARGE WAVEFORMS
120
HGTG10N120BND
Unless Otherwise Specified (Continued)
4
C, CAPACITANCE (nF)
FREQUENCY = 1MHz
3
CIES
2
1
CRES
COES
0
0
5
10
15
20
25
ICE, COLLECTOR TO EMITTER CURRENT (A)
Typical Performance Curves
15
DUTY CYCLE <0.5%, TC = 110oC
PULSE DURATION = 250µs
12
VGE = 15V
9
VGE = 10V
6
3
0
0
1
FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
ZθJC , NORMALIZED THERMAL RESPONSE
3
2
4
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 16. COLLECTOR TO EMITTER ON-STATE VOLTAGE
100
0.5
0.2
0.1
10-1
0.05
0.02
t1
0.01
DUTY FACTOR, D = t1 / t2
PD
PEAK TJ = (PD X ZθJC X RθJC) + TC
SINGLE PULSE
10-2
10-5
10-4
10-3
10-2
t2
10-1
100
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 17. NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
100
t, RECOVERY TIMES (ns)
IF, FORWARD CURRENT (A)
70
150oC
10
25oC
TC = 25oC, dIEC / dt = 200A/µs
60
50
trr
40
30
ta
20
-55oC
tb
10
1
1
2
3
4
5
VF , FORWARD VOLTAGE (V)
FIGURE 18. DIODE FORWARD CURRENT vs FORWARD
VOLTAGE DROP
6
6
1
2
5
10
IF, FORWARD CURRENT (A)
FIGURE 19. RECOVERY TIMES vs FORWARD CURRENT
20
HGTG10N120BND
Test Circuit and Waveforms
HGTG10N120BND
90%
10%
VGE
EON
EOFF
VCE
L = 2mH
90%
RG = 10Ω
+
-
ICE
VDD = 960V
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
10%
td(OFF)I
trI
tfI
td(ON)I
FIGURE 21. SWITCHING TEST WAVEFORMS
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge built
in the handler’s body capacitance is not discharged through
the device. With proper handling and application procedures,
however, IGBTs are currently being extensively used in
production by numerous equipment manufacturers in military,
industrial and consumer applications, with virtually no
damage problems due to electrostatic discharge. IGBTs can
be handled safely if the following basic precautions are taken:
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (ICE) plots are possible using
the information shown for a typical unit in Figures 5, 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows fMAX1 or fMAX2 ; whichever is smaller at each
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD™ LD26” or equivalent.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGEM. Exceeding the rated VGE can result in
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to
voltage buildup on the input capacitor due to leakage
currents or pickup.
7. Gate Protection - These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I).
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. td(OFF)I and td(ON)I are defined in Figure 21.
Device turn-off delay can establish an additional frequency
limiting condition for an application other than TJM . td(OFF)I
is important when controlling output ripple under a lightly
loaded condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The
allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC.
The sum of device switching and conduction losses must not
exceed PD. A 50% duty factor was used (Figure 3) and the
conduction losses (PC) are approximated by
PC = (VCE x ICE)/2.
EON and EOFF are defined in the switching waveforms
shown in Figure 21. EON is the integral of the instantaneous
power loss (ICE x VCE) during turn-on and EOFF is the
integral of the instantaneous power loss (ICE x VCE) during
turn-off. All tail losses are included in the calculation for
EOFF; i.e., the collector current equals zero (ICE = 0).
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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