Dual Output Monolithic Supply with Integrated 3A Power Switches and Operation to 2.5MHz in a 7mm × 4mm DFN

Dual Output Monolithic Supply with Integrated 3A Power
Switches and Operation to 2.5MHz in a 7mm × 4mm DFN
Mehdi Alimadadi
There is no shortage of ICs to help designers build switching DC/DC switching power
supplies. Choices range from versatile controllers requiring a number of external
components, to fully integrated, monolithic solutions that benefit from a low external
parts count to minimize overall solution size. The LT8582 dual-channel converter offers
the versatility of a controller IC in a complete, monolithic dual-channel solution.
The LT8582 integrates two complete,
independent converters, including high
power 3A, 42V power switches. It can
operate up to 2.5MHz, and with its tiny
7mm × 4mm DFN package, fits into the
smallest spaces. It includes several features
that give designers the ability to optimize
the converter, such as soft-start, single-pin
feedback, single-resistor frequency setting,
master/slave power switches, separate
maximum commanded and fault current
limits, external PFET control for output
or input disconnect, FAULT protection,
PG pin for power supply sequencing, and
CLKOUT signal for out-of-phase synchronizing and die temperature monitoring.
FLEXIBILITY AND SIMPLICITY
Each channel of the LT8582 can be
independently configured in a boost,
SEPIC, inverting or flyback topology.
Figure 1 shows a few common combinations that could be used in commercial or industrial applications, such
as local power supplies, LCD/E-ink displays, and engine control units (ECU).
The LT8582 is rugged, with solid performance. Even with all of its advanced
features, it is easy to use—designers
can choose to apply features to fit a
variety of applications. Its wide input
operating voltage of 2.5V to 22V, and
12 | April 2012 : LT Journal of Analog Innovation
CLKOUT PIN, SYNCHRONIZING AND
TEMPERATURE MONITORING
the 3A, 42V switches on each channel
add to the versatility of the chip.
HIGH SWITCHING FREQUENCY
The LT8582’s constant frequency oscillator,
programmable from 200kHz to 2.5MHz
using one resistor, employs frequency
foldback to better control the inductor
current during converter start-up. This
wide frequency range allows the switching noise to be placed so that sensitive
frequencies are avoided. While lower
switching frequencies offer better efficiency, higher switching frequencies help
reduce the size of passive components. The
switching frequency can be synchronized
to an external clock by connecting a clock
signal to the SYNC pin. Grounding the
SYNC pin enables the internal oscillator.
The LT8582 has two CLKOUT signals, one
for each channel. CLKOUT for channel 1
has a fixed 50% duty cycle and is 180°
out of phase with the power switch.
This can be used to sychronize channel
2 antiphase to channel 1, reducing the
converter’s overall input current ripple.
The CLKOUT signal for channel 2 features
a duty cycle that varies with die temperature (3% per 10°C) and is in phase
with the power switch. This can be used
for monitoring the die temperature.
FAULT PROTECTION AND
THE GATE PIN
The LT8582 has internal circuitry to detect
switch overcurrent, VIN overvoltage and
die overtemperature (> ~165°C). The chip’s
Figure 1. Common dual power topology combinations
VIN
D1
L1
VOUT1
VIN
LT8582
INVERTING
D2
L2A
C4
D1
VOUT1
LT8582
BOOST
VIN
L1A
C3
L2B
C1
SEPIC
C2
INVERTING
VOUT2
VIN
L1B
C1
D2
L2A
C3
C2
L2B
VOUT2
design features
The LT8582 integrates two complete, independent converters, including
high power 3A, 42V power switches. It can operate up to 2.5MHz, and with
its tiny 7mm × 4mm DFN package, fits into the smallest spaces.
VIN
L1
M1
M2
R1
M2
VIN
VOUT
M1
R1
R2
GATEx
LT8582 CHx
L1
GATEx
GATEx
VIN
LT8582 CHx
LT8582 CHx
Figure 2. Controlling external PFETs for input disconnect (left) and output disconnect (right)
When a fault is detected, the LT8582 stops
switching and the GATE pin becomes high
impedance. The external PFET is then
turned off by the external RGATE resistor. The RGATE resistor must be selected
so that sufficient VGS is available for the
PFET to fully enhance into triode under
normal operation. When the fault is
removed, the LT8582 enters a timeout
period, allowing components to cool
down before a restart sequence begins.
Figure 4. A 1.5MHz
+5V to ±12V dual
converter using one
LT8582
VIN
5V
this feature allows converter start-up to
be very smooth, even for hot-plug events.
Figure 4 illustrates how the GATE pin
provides short-circuit protection for
a boost converter. The circuit produces ±12V output from 5V input supply by utilizing channel 1 of the chip
as a boost converter and channel 2 as
a dual inductor, inverting converter.
L1
4.7µH
CIN1
4.7µF
215k
LTspice IV
circuits.linear.com/538
100k
D1
SWA1
FBX1
VIN1
PG1
LT8582
*MAX TOTAL OUTPUT POWER: 14.4W
130k
SS1
CLKOUT1
RT1
PG2
6.49k
53.6k
CIN2
4.7µF
4.7nF
53.6k
RT2
SS2
VIN2
VC2
2.2nF
0.1µF
47pF
14.7k
COUT3
10µF
25V
X7R
1206
143k
FBX2
L2
4.7µH
COUT2
10µF
25V
X7R
1206
GND
SHDN2
SWA2
47pF
VOUT1
12V
550mA*
0.1µF
GATE2
CIN1, CIN2: 4.7µF, 16V, X7R, 1206
C1: 2.2µF, 25V, X7R, 1206
D1, D2: DIODES INC. PD3S230H
L1: COILCRAFT XAL6060-472ML
L2, L3: COILCRAFT MSD7342-472
M1: FAIRCHILD FDMC510P
6.04k
VC1
SYNC1
SYNC2
215k
COUT1
10µF
25V
X7R
1206
GATE1
SHDN1
CLKOUT2
100k
SWB1
M1
SWB2
C1
2.2µF
L3
4.7µH
•
Reverse input voltage protection and
output short circuit protection can be
achieved, as shown in Figure 3, using
two external PFETs and the GATE pin. At
start-up, the channel’s supply voltage is
provided through the body diode of M2
while M1 keeps the power path disconnected. When the GATE pin is pulled down,
both PFETs turn on. If the input voltage
is reversed, the channel and the power
path are disconnected from the input
supply by M2. If the output is shorted,
the power path is disconnected from
the input supply by M1. The GATE pin
can be left floating when not in use.
Another use of the GATE pin is to limit
the converter start-up current. During
start-up, the GATE pin current increases
linearly with SS pin voltage, to a maximum current of ~1m A when the SS voltage
exceeds 500mV. This allows the external
PFET to slowly turn on and gradually
ramp up the output voltage. Together
with frequency foldback and soft-start,
•
GATE pin is a pull-down current source and
can control an external PFET during the
fault. The external PFET can disconnect the
input or the output, as shown in Figure 2.
Figure 3. Reverse battery and output short
protection
D2
VOUT2
–12V
550mA*
April 2012 : LT Journal of Analog Innovation | 13
Each channel of the LT8582 can be independently
configured in a boost, SEPIC, inverting or flyback topology.
A common weak point of the boost
topology is that it has a direct DC path
from input to output through the inductor and diode. An output short can result
in an uncontrolled increase of current
through the converter, likely destroying
one or more components in the DC path
and the power switch if it switches during this time. The LT8582 addresses this
issue by disconnecting the DC path if the
part senses an overcurrent condition.
For the dual inductor inverting and
SEPIC topologies, because of the series
capacitor in the power path, there is no
direct DC path between input and output
and the external PFET is not required.
The circuit in Figure 4 is running at a high
switching frequency of 1.5MHz. If thermal
issues arise, using larger ground planes and
better air flow helps remove extra heat.
D6
Figure 5. High voltage VFD
and filament bias supplies
D4
VOUT2
66V
C5
120mA*
2.2µF
D3
C3
2.2µF
L1
22µH
D2
CIN1
4.7µF
D1
CIN1, CIN2: 4.7µF, 25V, X7R, 1206
C1 TO C6: 2.2µF, 50V, X7R, 1206
C7: 2.2µF, 25V, X7R, 0805
C8: 10µF, 25V, X7R, 1210
D1 TO D6: CENTRAL SEMI CMMSH2-40
D7: 10V, CENTRAL SEMI CMHZ5240B
D8: CENTRAL SEMI CTLSH5-40M833
D9: CENTRAL SEMI CTLSH2-40M832
L1: WÜRTH 744771122
L2, L3: WÜRTH 744870100
M1: VISHAY SI7611DN
M1**
D7**
C1
2.2µF
D8**
8.06k**
SWA1 SWB1
576k
100k
FBX1
VIN1
GATE1
SHDN1
PG1
LT8582
SS1
CLKOUT1
RT1
SYNC2
SHDN2
VIN2
21k
80.6k
1.5nF
GND
80.6k
1.5nF
RT2
2.2µF
SS2
VC2
C8
10µF
×2
113k
C7
2.2µF
D9
•
SWB2
47pF
11.8k
FBX2
SWA2
47pF
2.2µF
GATE2
L2
10µH
*CHANNEL 1 MAX OUTPUT POWER 8W
**OPTIONAL FOR OUTPUT SHORT PROTECTION
CIN2
4.7µF
•
L3
10µH
VOUT3
10.5V
0.85A
90
2.0
80
1.6
70
1.2
60
0.8
50
0
2
6
4
OUTPUT POWER (W)
8
10
POWER LOSS (W)
576k
PG2
C2
2.2µF
VC1
SYNC1
CLKOUT2
100k
383k
EFFICIENCY (%)
VIN
9V TO 16V
Each channel of the LT8582 incorporates
a master and a slave switch, which are
rated at 1.7A and 1.3A, respectively. The
switches are driven in phase and only
the current through the master switch
is sensed by the internal current comparator. Normally, these switches are tied
together; when separated, they can be used
for building high voltage charge pumps,
as shown in Figure 5. The charge pump
VOUT1
100V
C6
80mA*
2.2µF
D5
C4
2.2µF
MASTER/SLAVE POWER SWITCH
0.4
Figure 6. Charge pump efficiency vs output power
14 | April 2012 : LT Journal of Analog Innovation
design features
Normally, the master and slave switches of each channel are tied together;
when separated, they can be used for building high voltage charge pumps.
The high output voltage can be used for low current loads such as vacuum
fluorescent displays (VFDs). In this case, the second channel of the LT8582
can be configured as a SEPIC converter to bias the filament of the VFD.
Figure 7. Charging/discharging supercapacitors in a
backup power supply
GATE1
VIN
CH1
SEPIC
VIN1
VOUT1
LT8582
VIN2
CH2
BOOST
VOUT2
VOUT
SUPERCAPS
circuit generates output voltages that are
higher than what the IC can tolerate.
not need series resistors that are typically
used to limit the capacitive current spikes.
The first stage of the charge pump circuit
is based on boost topology and uses the
channel’s master switch. The channel’s
slave switch is used to drive the other
charge pump stages, multiplying the
output voltage of the boost stage. The
benefit of this configuration is that the
master switch is immune from capacitive current spikes, allowing the LT8582
to sense the inductor current distinctly.
Moreover, the charge pump diodes do
The high output voltage can be used
for low current loads such as vacuum
fluorescent displays (VFDs). In this case,
the second channel of the LT8582 can be
configured as a SEPIC converter to bias
the filament of the VFD. Here, the master
and slave switches of channel 2 can be
tied together to increase output current.
Figure 6 shows the efficiency of the charge
pump circuit at various power levels.
Figure 8. Backup power supply using supercapacitors
VOUT
VIN (VIN > 11.4V)
11V (VIN < 11.4V)
M1
L1
5µH
6.04k
D1
VOUT1
10V
•
VIN
12V ±5%
C1
2.2µF
CIN1
4.7µF
•
SWA1
100k
73.2k
FBX1
PG1
GATE1
SHDN1
LT8582
11k
CLKOUT1
CLKOUT2
SYNC2
100k
L2
5µH
130k
COUT2
10µF
VC1
SS1
SYNC1
VOUT1
SWB1
VIN1
15.4k
80.6k
1.2k
1/4W
CS1
60F
1.2k
1/4W
CS2
60F
1.2k
1/4W
CS3
60F
1.2k
1/4W
CS4
60F
1nF
GND
80.6k
RT2
SS2
SHDN2
VC2
100pF
12.7k
GATE2
SWB2
3.3nF
0.47µF
105k
FBX2
SWA2
100pF
0.47µF
RT1
PG2
VIN2
L3
2.2µH
COUT1
4.7µF
D2
COUT3
22µF
×2
CIN1, CIN2: 4.7µF, 16V, X7R, 1206
COUT1: 4.7µF, 25V, X7R, 1206
COUT2: 10µF, 25V, X7R, 1210
COUT3: 22µF, 16V, X7R, 1210
C1: 2.2µF, 25V, X7R, 0805
CS1 TO CS4: 60F, 2.5V, COOPER HB1840-2R5606-R
D1, D2: CENTRAL SEMI CTLSH5-40M833
L1, L2: COOPER CTX5-1A
L3: COOPER HCM0703-2R2
M1: VISHAY SI7123DN
CIN2
4.7µF
April 2012 : LT Journal of Analog Innovation | 15
The VC current limit feature can be used in situations
where the load voltage may be low for an extended
period of time, such as when charging supercapacitors.
FAULT AND VC CURRENT LIMITS
The LT8582 has two distinct current limits:
the VC current limit, which is the maximum current that can be commanded, and
the FAULT current limit, which is the maximum current in case of converter overcurrent. The FAULT current limit is internally
set higher than the VC current limit. When
the FAULT current limit is reached, the chip
goes into fault mode and stops switching. However, when the VC current limit
is reached, the chip reduces the switch
duty cycle, reducing the output voltage.
The VC current limit feature can be used
in situations where the load voltage may
be low for an extended period of time,
such as when charging supercapacitors.
Figure 7 demonstrates how the VC current
limit along with the GATE pin can be used
to build a backup power supply using one
LT8582 and a bank of four supercapacitors.
The actual circuit is shown in Figure 8.
Here, channel 1 of the LT8582 is configured
as a SEPIC converter and is used to charge
the supercapacitor bank when VIN is
IL1 + IL2
2A/DIV
present. At this time, the GATE pin of channel 1 is enabled and the external PFET provides a path for the load current from the
input to the output. Once the input supply
is disconnected, channel 2 of the LT8582
which is configured as a boost converter,
provides voltage to the load without any
delay, while the external PFET disconnects the input from the output, preventing energy from going back into VIN .
The complete backup power supply
circuit is shown in Figure 8. With the
component values shown, the supercapacitor bank is charged to 10V when
VIN is above ~11.4V. Once VIN falls below
~11.2V, the circuit holds up VOUT at
11V for about 90 seconds with 500m A of
load current. The waveforms of interest during charging/discharging the
supercapacitors are shown in Figure 9.
PG PIN AND EVENT-BASED
SEQUENCING
The PG pin is an open drain active high
pin that indicates the output voltage is
close to regulation. For most applications
IL1 + IL2
2A/DIV
IL3
2A/DIV
VOUT ≈ VIN
5V/DIV
VOUT1
5V/DIV
IL3
2A/DIV
VOUT ≈ VIN
5V/DIV
VOUT1
5V/DIV
20s/DIV
20s/DIV
Figure 9. Waveforms of interest during charging (left) and discharging (right) the supercapacitors
16 | April 2012 : LT Journal of Analog Innovation
LT8582
CH1
MASTER
SHDN1
CH2
SLAVE
PG1
SHDN2
VIN
RUVLO1
RUVLO2
SHDNSYS
10k
SET RUVLO1 AND RUVLO2 SUCH THAT
VIN1UVLO < VIN2UVLO
SEE CONFIGURABLE UNDERVOLTAGE LOCKOUT
SECTION FOR DETAILS
Figure 10. Sequenced power supplies
this corresponds to an output voltage 8% from the target output voltage.
The SHDN pin is used to enable/disable
the channel. Driving the SHDN pin to
ground disables the channel while driving SHDN above 1.3V enables the channel.
Figure 10 shows how these two pins can
be used to turn on power supplies in
sequence as may be required in systems
with multiple voltage levels. When channel
1’s output voltage is close to regulation,
the PG pin of channel 1 releases channel
2’s SHDN pin, which enables channel 2.
To ensure that the status of channel 1’s
PG pin is valid while it is being sensed
by channel 2, channel 1 has to become
active first, i.e., VIN1 UVLO should be
set lower than VIN2 UVLO. To provide a
global shutdown signal for the system,
the SHDNSYS signal drives two NFETs that
disable both channels when it is high.
The complete circuit diagram
and start-up waveforms are presented in Figures 11 and 12.
design features
C1
2.2µF
L1
8.2µH
D1
CIN1
10µF
SWA1
SWB1
•
L2
8.2µH
VIN1
SHDNSYS
10k
10k
130k
FBX1
SHDN1
M1
VOUT1
12V
0.3A (VIN = 3V)
0.5A (VIN = 5V)
1A (VIN = 12V)
•
VIN
3V to 19V
115k
PG1
M2
GATE1
SYNC1
SS1
CLKOUT1
RT1
CLKOUT2
SYNC2
100k
COUT1
10µF
×2
VC1
LT8582
20k
107k
107k
1.5nF
RT2
SHDN2
SS2
VIN2
VC2
0.1µF
IL1 + IL2
2A/DIV
C2
2.2µF
•
D2
CIN2
10µF
•
VOUT2
2V/DIV
IL3 + IL4
2A/DIV
COUT2
22µF
×2
45.3k
FBX2
SWB2
47pF
14.7k
GATE2
SWA2
1.5nF
GND
PG2
L3
6.8µH
VOUT1
5V/DIV
47pF
0.1µF
L4
6.8µH
2ms/DIV
Figure 12. Start-up waveforms at VIN = 12V
VOUT2
5V
0.7A (VIN = 3V)
1A (VIN = 5V)
1.45A (VIN = 12V)
CIN1, CIN2: 10µF, 25V, X7R, 1210
COUT1: 10µF, 25V, X7R, 1210
COUT2: 22µF, 16V, X7R, 1210
C1,C2 : 2.2µF, 25V, X7R, 0805
D1, D2: CENTRAL SEMI CTLSH2-40M832
L1, L2: COOPER DRQ125-8R2
L3, L4: COOPER DRQ125-6R8
M1, M2: 2N7002
Figure 11. Sequenced 12V and 5V dual outputs
FB PIN AND SINGLE RESISTOR
VOLTAGE FEEDBACK
The LT8582 needs only one feedback pin
for both positive and negative output
voltages. In addition, only one external resistor from VOUT to FB is required
Figure 13. Tracking power supplies using one extra
resistor
VOUT1
CH1
BOOST
RFB1
+
C1
FBX1
LT8582
FBX2
CH2
INVERTING
RFB2
This feedback structure can be used to
design simple tracking power supplies
without using a tracking controller chip.
As shown in Figure 13, only one extra
resistor connected between the two feedback pins of LT8582 is needed for this.
RFB1, RFB12 and RFB2 form a resistor voltage divider. The more current through
them, the better the tracking. Thus,
the current through the connecting
RFB12
+
to set the output voltage. The internal feedback circuitry automatically
selects the correct reference voltage,
1.204V or 7mV for topologies with positive or negative outputs, respectively.
C2
resistor RFB12 must be relatively higher
than the FB1 and FB2 currents, so:
IFB12 =
1.204 – 7m
>> 83.3µ
RFB12
After selecting RFB12, the feedback resistors
RFB1 and RFB2 can be calculated as follows:
RFB1 =
RFB2 =
VOUT1 – 1.204
1.197
83.3µ +
RFB12
7m − VOUT 2
1.197
83.3µ +
RFB12
For the circuit shown in Figure 14,
plotting the output voltages vs
load currents yields Figure 15.
VOUT2
April 2012 : LT Journal of Analog Innovation | 17
The LT8582 only needs one feedback pin for both positive and negative output voltages.
In addition, only one external resistor from VOUT to FB is needed to set the output
voltage. The internal feedback circuitry automatically selects the correct reference
voltage, 1.204V or 7mV for topologies with positive or negative outputs, respectively.
L1
10µH
VIN
2.7V TO 5.5V
CIN1
10µF
D1
SWA1
PG1
6.04k
FBX1
LT8582
SS1
CLKOUT1
RT1
SYNC2
PG2
SHDN2
VIN2
COUT1
10µF
×2
VC1
SYNC1
CLKOUT2
6.65k
107k
107k
RT2
100pF
6.65k
SS2
VC2
COUT2
10µF
×2
53.6k
SWB2
C1
4.7µF
L3
15µH
•
CIN2
10µF
6.8nF
0.1µF
VOUT2
–15V
0.27A(VIN = 2.7V)
0.37A(VIN = 3.6V)
0.46A(VIN = 4.5V)
0.54A(VIN = 5.5V)
•
Figure 14. Dual tracking power supplies
using one LT8582
CIN1, CIN2: 10µF, 16V, X7R, 1206
COUT1, COUT2: 10µF, 25V, X7R, 1210
C1: 4.7µF, 50V, X7R, 1206
D1, D2: DIODES INC. PD3S230H
L1: COILCRAFT XAL6060-103ME
L2, L3: COILCRAFT MSD1260-153
6.8nF
GND
FBX2
SWA2
100pF
0.1µF
GATE2
L2
15µH
FBX2
GATE1
SHDN1
100k
49.9k
SWB1
VIN1
VOUT1
15V
0.3A(VIN = 2.7V)
0.42A(VIN = 3.6V)
0.56A(VIN = 4.5V)
0.69A(VIN = 5.5V)
D2
CONCLUSION
18 | April 2012 : LT Journal of Analog Innovation
The LT8582 is easy to use and robust.
Because of its high switching frequency
and monolithic structure, it can be used
to fit power converters into the tightest
spaces. The LT8582 is available in a tiny
24-pin 7mm × 4mm DFN package. n
Figure 15. Tracking output voltages vs load current
(load between the two outputs)
15.30
15.25
15V
15.20
MAGNITUDE VOUT (V)
The LT8582 is a dual independent monolithic converter with two 3A, 42V power
switches. In addition to popular features
such as soft-start, single-pin feedback and
single-resistor oscillator, it includes unique
features such as the master/slave power
switches, separate maximum commanded
and fault current limits, external PFET control for output or input disconnect,
FAULT protection, PG pin for power supply
sequencing, and CLKOUT signal for out-ofphase synchronizing and die temperature
monitoring. These features enable the
LT8582 to be used in a variety of applications, from typical dual rail voltage regulators to supercapacitor backup supplies.
15.15
15.10
–15V
15.05
15.10
14.95
14.90
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
LOAD CURRENT (A)
Similar pages