HA4600 ® Data Sheet December 22, 2005 FN3990.8 480MHz, SOT-23, Video Buffer with Output Disable Features The HA4600 is a very wide bandwidth, unity gain buffer ideal for professional video switching, HDTV, computer monitor routing, and other high performance applications. The circuit features very low power dissipation (105mW Enabled, 1mW Disabled), excellent differential gain and phase, and very high off isolation. When disabled, the output is switched to a high impedance state, making the HA4600 ideal for routing matrix equipment and video multiplexers. • Low Power Dissipation. . . . . . . . . . . . . . . . . . . . . 105mW The HA4600 also features fast switching and symmetric slew rates. A typical application for the HA4600 is interfacing Intersil’s wide range of video crosspoint switches. For applications requiring a tally output (enable indicator), please refer to the HA4201 data sheet. • Micro Package Available . . . . . . . . . . . . . . . . . . . SOT-23 • Symmetrical Slew Rates . . . . . . . . . . . . . . . . . . 1700V/µs • 0.1dB Gain Flatness. . . . . . . . . . . . . . . . . . . . . . . 250MHz • Off Isolation (100MHz) . . . . . . . . . . . . . . . . . . . . . . . 85dB • Differential Gain and Phase . . . . . . . 0.01%/0.01 Degrees • High ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . >1800V • TTL Compatible Enable Input • Improved Replacement for GB4600 • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • Professional Video Switching and Routing Pinouts • Video Multiplexers HA4600 (PDIP, SOIC) TOP VIEW • HDTV • Computer Graphics • RF Switching and Routing EN 1 8 GND • PCM Data Routing V- 2 7 IN Ordering Information V+ 3 6 NC OUT 4 5 NC HA4600 (SOT-23) TOP VIEW EN V- 1 6 OUT 2 5 V+ GND 3 4 IN Truth Table PART MARKING TEMP. RANGE (°C) HA4600CP HA4600CP 0 to 70 8 Ld PDIP E8.3 HA4600CPZ (Note) HA4600CPZ 0 to 70 8 Ld PDIP* (Pb-free) E8.3 HA4600CB 4600CB 0 to 70 8 Ld SOIC M8.15 HA4600CB96 4600CB 0 to 70 8 Ld SOIC Tape and Reel M8.15 HA4600CBZ (Note) 4600CBZ 0 to 70 8 Ld SOIC (Pb-free) M8.15 HA4600CBZ96 4600CBZ (Note) 0 to 70 8 Ld SOIC Tape M8.15 and Reel (Pb-free) HA4600CH96 0 to 70 6 Ld SOT-23 Tape P6.064 and Reel 0 to 70 6 Ld SOT-23 Tape P6.064 and Reel (Pb-free) PART NUMBER 46 HA4600CHZ96 46Z (Note) EN OUT 0 High Z 1 Active 1 PACKAGE PKG. DWG. # *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2000, 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. HA4600 Absolute Maximum Ratings Thermal Information Voltage Between V+ and V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Digital Input Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . ±25mA Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . 1800V Thermal Resistance (Typical, Note 1) Operating Conditions Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C θJA (°C/W) PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 210 Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . 175°C Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C (SOIC and SOT-23 - Lead Tips Only) *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured with the component mounted on an evaluation PC board in free air. 2. If an input signal is applied before the supplies are powered up, the input current must be limited to this maximum value. Electrical Specifications VSUPPLY = ±5V, RL = 10kΩ, VEN = 2.0V, Unless Otherwise Specified PARAMETER TEST CONDITIONS TEMP. (°C) MIN TYP MAX UNITS Full ±4.5 ±5.0 ±5.5 V VEN = 2V 25, 70 - 10.5 13 mA VEN = 2V 0 - - 14.5 mA VEN = 0.8V 25, 70 - 100 115 µA VEN = 0.8V 0 - 100 125 µA 25, 70 ±2.7 ±2.8 - V 0 ±2.4 ±2.5 - V Output Current Full 15 20 - mA Input Bias Current Full - 30 50 µA Output Offset Voltage 25 -10 - 10 mV Output Offset Voltage Drift (Note 3) Full - 25 50 µV/°C Turn-On Time 25 - 160 - ns Turn-Off Time 25 - 320 - ns Input Logic High Voltage Full 2 - - V Input Logic Low Voltage Full - - 0.8 V 0V to 4V Full -2 - 2 µA 1VP-P Full - 0.04 0.05 dB DC SUPPLY CHARACTERISTICS Supply Voltage Supply Current (VOUT = 0V) ANALOG DC CHARACTERISTICS Output Voltage Swing without Clipping VOUT = VIN ± VIO ± 20mV SWITCHING CHARACTERISTICS DIGITAL DC CHARACTERISTICS EN Input Current AC CHARACTERISTICS Insertion Loss 2 FN3990.8 December 22, 2005 HA4600 Electrical Specifications VSUPPLY = ±5V, RL = 10kΩ, VEN = 2.0V, Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS TEMP. (°C) MIN TYP MAX UNITS RS = 82Ω, CL = 10pF 25 - 480 - MHz RS = 43Ω, CL = 15pF 25 - 380 - MHz RS = 36Ω, CL = 21pF 25 - 370 - MHz RS = 82Ω, CL = 10pF 25 - 250 - MHz RS = 43Ω, CL = 15pF 25 - 175 - MHz RS = 36Ω, CL = 21pF 25 - 170 - MHz Input Resistance Full 200 400 - kΩ Input Capacitance Full - 1.0 - pF Enabled Output Resistance Full - 15 - Ω -3dB Bandwidth ±0.1dB Flat Bandwidth Disabled Output Capacitance VEN = 0.8V Full - 2.0 - pF Differential Gain (Note 3) 4.43MHz 25 - 0.01 0.02 % Differential Phase (Note 3) 4.43MHz 25 - 0.01 0.02 Degrees Off Isolation 1VP-P, 100MHz, VEN = 0.8V, RL = 10Ω Full - 85 - dB Slew Rate (1.5VP-P, +SR/-SR) RS = 82Ω, CL = 10pF 25 - 1750/1770 - V/µs RS = 43Ω, CL = 15pF 25 - 1460/1360 - V/µs RS = 36Ω, CL = 21pF 25 - 1410/1360 - V/µs Total Harmonic Distortion (Note 3) Full - 0.01 0.1 % Disabled Output Resistance Full - 12 - MΩ NOTE: 3. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation. AC Test Circuit HA4600 500Ω RS Keep input and output traces as short as possible, because trace inductance and capacitance can easily become the performance limiting items. 510Ω 400Ω - + VIN 75Ω CX 75Ω HFA1100 VOUT 10kΩ NOTE: CL = CX + Test Fixture Capacitance. PC Board Layout The frequency response of this circuit depends greatly on the care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value (0.1µF) chip capacitor works well in most cases. 3 FN3990.8 December 22, 2005 HA4600 Application Information General The HA4600 is a unity gain buffer that is optimized for high performance video applications. The output disable function makes it ideal for the matrix element in small, high input-tooutput isolation switchers and routers. This buffer contains no feedback or gain setting resistors, so the output is a true high impedance load when the IC is disabled (EN = 0). The HA4600 also excels as an input buffer for routers with a large number of outputs (i.e. each input must connect to a large number of outputs) and delivers performance superior to most video amplifiers at a fraction of the cost. As an input buffer, the HA4600’s low input capacitance and high input resistance provide excellent video terminations when used with an external 75Ω resistor. latch-up, the input currents during power up must not exceed the values listed in the Absolute Maximum Ratings. Intersil’s Crosspoint Family Intersil offers a variety of 1 x 1 and 4 x 1 crosspoint switches. In addition to the HA4600, the 1 x 1 family includes the HA4201 which is an essentially similar device that includes a Tally output (enable indicator). The 4 x 1 family is comprised of the HA4314, HA4404, and HA4344. The HA4314 is a 14 lead basic 4 x 1 crosspoint. The HA4404 is a 16 lead device with Tally outputs to indicate the selected channel. The HA4344 is a 16 lead crosspoint with synchronized control lines (A0, A1, CS). With synchronization, the control information for the next channel switch can be loaded into the crosspoint without affecting the current state. On a subsequent clock edge the stored control state effects the desired channel switch. Frequency Response Most applications utilizing the HA4600 require a series output resistor, RS, to tune the response for the specific load capacitance, CL, driven. Bandwidth and slew rate degrade as CL increases (as shown in the Electrical Specification table), so give careful consideration to component placement to minimize trace length. As an example, -3dB bandwidth decreases to 160MHz for CL = 100pF, RS = 0Ω. In big matrix configurations where CL is large, better frequency response is obtained by cascading two levels of crosspoints in the case of multiplexed outputs (see Figure 2), or distributing the load between two drivers if CL is due to bussing and subsequent stage input capacitance. Control Signals EN - The ENABLE input is a TTL/CMOS compatible, active high input. When driven low this input forces the output to a true high impedance state and reduces the power dissipation by two orders of magnitude. The EN input has no on-chip pull-up resistor, so it must be connected to a logic high (recommend V+) if the enable function isn’t utilized. Switcher/Router Applications Figure 1 illustrates one possible implementation of a wideband, low power, 4 x 4 switcher/router. A 4 x 4 switcher/router allows any of the four outputs to be driven by any one of the four inputs (e.g. each of the four inputs may connect to a different output, or an input may connect to multiple outputs). This application utilizes the HA4600 for the input buffer, the HA4404 (4 x 1 crosspoint switch) as the switch matrix, and the HFA1112 (programmable gain buffer) as the gain of two output driver. Figure 2 details a 16 x 1 switcher (basically a 16:1 MUX) which uses the HA4600 in a cascaded stage configuration to minimize capacitive loading at each output node, thus increasing system bandwidth. Power Up Considerations No signals should be applied to the analog or digital inputs before the power supplies are activated. Latch-up may occur if the inputs are driven at the time of power up. To prevent 4 FN3990.8 December 22, 2005 HA4600 INPUT BUFFERS EN SOURCE0 75Ω OUT SWITCH MATRIX RS HA4600 IN0 IN0 T0 75Ω RS IN3 IN3 T0 CS HA4404 OUT RS T3 IN0 HA4404 OUT OUT 75Ω T0 CS HA4404 HA4404 SOURCE2 IN0 CS CS SOURCE1 T0 10kΩ OUT RS T3 IN3 RS T3 IN3 T3 EN SOURCE3 75Ω OUT HA4600 10kΩ RS + OUTPUT BUFFERS X2 (HFA1112 OR HFA1115) 75Ω - + - + - + X2 X2 X2 75Ω 75Ω 75Ω OUT1 OUT0 OUT2 - OUT3 FIGURE 1. 4 x 4 SWITCHER/ROUTER APPLICATION SWITCHING MATRIX SOURCE0 ISOLATION MUX OUTPUT BUFFER IN0 75Ω IN1 IN2 T0 IN3 SOURCE3 10kΩ 75Ω T3 RS OUT IN0 OUT 75Ω IN1 T0 SOURCE4 EN RS RS HA4600 IN2 T3 IN3 SOURCE7 HFA1112 OR HFA1115 75Ω 75Ω - OUT + HA4404 X2 IN0 SOURCE8 75Ω IN1 IN2 SOURCE11 T0 IN3 75Ω 10kΩ T3 RS EN OUT IN0 OUT 75Ω IN1 T0 SOURCE12 IN2 RS RS HA4600 T3 IN3 SOURCE15 75Ω HA4404 FIGURE 2. 16 x 1 SWITCHER APPLICATION 5 FN3990.8 December 22, 2005 HA4600 Typical Performance Curves VSUPPLY = ±5V, TA = 25°C, RL = 10kΩ, Unless Otherwise Specified 1.25 1.0 1.20 INPUT CAPACITANCE (pF) OUTPUT VOLTAGE (V) 0.75 0.5 0.25 0 -0.25 -0.5 1.15 1.10 1.05 1.0 0.95 0.90 0.85 0.80 -0.75 0.75 1 -1.0 10 FREQUENCY (MHz) TIME (5ns/DIV.) FIGURE 3. LARGE SIGNAL PULSE RESPONSE 0.4 9 0.3 GAIN (dB) 3 0 -3 RS = 36Ω CL = 21pF -6 0 -0.1 RS = 82Ω CL = 10pF -0.2 -0.3 -12 -0.4 10 100 FREQUENCY (MHz) 10 1 750 RS = 43Ω CL = 15pF 0.1 -9 1 RS = 36Ω CL = 21pF 0.2 RS = 82Ω R = 43Ω CL = 10pF S CL = 15pF 100 500 FREQUENCY (MHz) FIGURE 6. GAIN FLATNESS FIGURE 5. FREQUENCY RESPONSE VIN = 1VP-P RL = 10Ω -50 -60 OFF ISOLATION (dB) GAIN (dB) FIGURE 4. INPUT CAPACITANCE vs FREQUENCY 12 6 500 100 PDIP, SOIC -70 -80 SOT-23 -90 -100 -110 PDIP, SOIC -120 -130 1 10 100 FREQUENCY (MHz) 500 FIGURE 7. OFF ISOLATION 6 FN3990.8 December 22, 2005 HA4600 Die Characteristics DIE DIMENSIONS: SUBSTRATE POTENTIAL (Powered Up): 51 mils x 36 mils x 19 mils 1290µm x 910µm x 483µm METALLIZATION: Type: Metal 1: AICu (1%)/TiW Thickness: Metal 1: 6kÅ ±0.8kÅ Type: Metal 2: AICu (1%) Thickness: Metal 2: 16kÅ ±1.1kÅ VPASSIVATION: Type: Nitride Thickness: 4kÅ ±0.5kÅ TRANSISTOR COUNT: 53 Metallization Mask Layout HA4600 EN GND V- IN V+ OUT NC All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 7 FN3990.8 December 22, 2005