A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC Features and Benefits Description ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ AEC-Q100 automotive qualified Precisely aligned dual Hall elements Tightly matched magnetic switchpoints Speed and direction outputs Individual Hall element outputs (L package) Output short-circuit protection Operation from an unregulated power supply Wide operating temperature range Wide operating voltage range Integrated EMC-ESD protection Superior temperature stability and industry-leading jitter performance through use of advanced chopper stabilization topology 4-pin SIP (suffix K) Packages The A1233 is a dual-channel Hall-effect sensor IC ideal for use in speed and direction sensing applications incorporating encoder ring-magnet targets. The A1233 provides various output signals that indicate speed and direction of target rotation. The Hall elements are both photolithographically aligned to better than 1 μm. Maintaining accurate displacement between the two active Hall elements eliminates the major manufacturing hurdle encountered in fine-pitch detection applications. The A1233 is a highly sensitive, temperature-stable magnetic device ideal for use in harsh automotive and industrial environments. The Hall elements of the A1233 are spaced 1.63 mm apart, which provides excellent speed and direction information for small-geometry targets. Extremely low-drift amplifiers guarantee symmetry between the switches to maintain signal quadrature. An on-chip regulator allows the use of this device over a wide operating voltage range of 3.5 to 24 V. 8-pin SOIC (suffix L) End-of-line trimming of the Hall element switchpoints provides tight matching capability. The Allegro™ patented, highfrequency chopper stabilization technique cancels offsets in each channel, providing stable operation over the full specified temperature and voltage ranges. Continued on the next page… Not to scale Functional Block Diagram LDO Regulator VCC Programmable Trim L Package Only OUTA Amp LowPass Filter Low Noise Signal Recovery Dynamic Offset Cancellation Hall Element E1 Output Drive 2 Bit Channel A DIR Direction Logic Output Drive SPD 2 Bit Amp LowPass Filter Low Noise Signal Recovery Dynamic Offset Cancellation Channel B Hall Element E2 L Package Only Output Drive GND A1233-DS, Rev. 1 Output Drive OUTB A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC Description (continued) The A1233 has integrated protection against transients on the supply and output pins and short-circuit protection on all outputs. The A1233 is available in a 4-pin SIP and a plastic 8-pin SOIC surface-mount package. Both packages are lead (Pb) free, with 100% matte-tin leadframe plating. Selection Guide Part Number A1233LK-T Package Packing* 4-pin through hole SIP Bulk bag, 500 pieces/bag A1233LLTR-T 8-pin surface mount SOIC *Contact Allegro for additional packing options. Tape and reel, 3000 pieces/reel TA (°C) –40 to 150 Absolute Maximum Ratings Characteristic Symbol Supply Voltage Notes Rating Units 26.5 V VCC Reverse Battery Voltage VRCC –18 V VOUTPUT VCC V Reverse Output Voltage VROUT –0.5 V Reverse Output Current IROUT –10 mA IOUTPUT(Sink) 30 mA B Unlimited – Output Off Voltage Output Sink Current Magnetic Flux Density Operating Ambient Temperature TA –40 to 150 ºC Maximum Junction Temperature TJ(max) 165 ºC Tstg –65 to 170 ºC Storage Temperature Pin-Out Diagrams Range L Terminal List Table Number K L Name Description VCC 1 8 GND 1 1 VCC Input power supply; tie to GND with bypass capacitor DIR 2 7 NC 2 2 DIR Output signal indicating direction of target movement OUTA 3 6 NC SPD 4 5 OUTB – 3 OUTA Output from E1 via a Schmitt circuit 3 4 SPD Output signal indicating speed of target movement L Package 4 GND DIR 3 SPD 2 VCC 1 – 5 OUTB – 6, 7 NC 4 8 GND Output from E2 via a Schmitt circuit No connection Ground connection K Package Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC OPERATING CHARACTERISTICS: Valid over operating voltage and temperature ranges, unless otherwise noted; typical data applies to VCC = 12 V, and TA = 25ºC Characteristic Symbol Test Conditions Min. Typ. Max. Unit1 ELECTRICAL CHARACTERISTICS VCC Supply Voltage2 Output Leakage Current Supply Current IOUTPUT(OFF) ICC(OFF), ICC(ON) Operating, TA ≤ 150°C 3.5 – 24 V – <1 10 μA 2.5 4.5 8.0 mA All outputs, Output = On, IOUTPUT(SINK) = 20 mA – 160 500 mV All outputs 30 – 70 mA – 520 – kHz All outputs, VOUT ≤ VCC(max) B < BRP(A) and B < BRP(B) , or B > BOP(A) and B > BOP(B) Low Output Voltage VOUTPUT(ON) Output Current Limit IOUTLIM Chopping Frequency fC Output Rise Time tr CLOAD = 20 pF, RLOAD = 820 Ω – 0.3 – µs Output Fall Time tf CLOAD = 20 pF, RLOAD = 820 Ω – 0.2 – µs Delay between direction output changing and speed output transition, VCC = 5 V, CLOAD = 12 pF, RLOAD = 820 Ω, RLOAD connected to 5 V – 2 5 µs Speed Output Delay ΔtDIRSPD Power-On Time tON B > BOP + 10 G or B < BRP – 10 G – 35 – µs Power-Off Time tOFF B > BOP + 10 G or B < BRP – 10 G – 36 – µs Power-On State POS B = 0 G (reference Typical Application diagram) – High – – Output Signal, VOUTPUT Continued on the next page... tf tr VOUTPUT(OFF) 90% VOUTPUT 10% VOUTPUT VOUTPUT(ON) Time Definition of Output Fall Time, tf , and Output Rise Time, tr Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC OPERATING CHARACTERISTICS (continued): Valid over operating voltage and temperature ranges, unless otherwise noted; typical data applies to VCC = 12 V, and TA = 25ºC Characteristic Symbol Test Conditions Min. Typ. Max. Unit1 TRANSIENT PROTECTION CHARACTERISTICS Supply Zener Voltage VZ ICC = ICC(max) + 3 mA, TA = 25°C 28 – – V Supply Zener Current3 IZ VS = 28 V – – 11 mA VRCC = –18 V, TJ < TJ(max) – 2 15 mA – – 3.4 V Reverse-Battery Current Undervoltage Lockout IRCC VUVLO MAGNETIC CHARACTERISTICS4 Operate Point (Channel A and Channel B) BOP B(A) > BOP(A), B(B) > BOP(B) –35 15 55 G Release Point (Channel A and Channel B) BRP B(A) < BOP(A), B(B) < BOP(B) –55 –15 35 G Hysteresis (Channel A and Channel B) Bhys BOP – BRP 10 30 60 G Operate Symmetry SYMOP(AB) BOP(A) – BOP(B) –50 – 50 G Release Symmetry SYMRP(AB) BRP(A) – BRP(B) –50 – 50 G 11 G (gauss) = 0.1 mT (millitesla). operating at maximum voltage, never exceed maximum junction temperature, TJ(max). Refer to power derating curve charts. 3 Maximum specification limit is equivalent to I CC(max) + 3 mA. 4 Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and as a positive value for south-polarity magnetic fields. This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the field is indicated by the absolute value of B, and the sign indicates the polarity of the field (for example, a –100 G field and a 100 G field have equivalent strength, but opposite polarity). 2 When Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC Thermal Characteristics: may require derating at maximum conditions; see application information Characteristic Symbol Package Thermal Resistance RθJA Value Unit Package K, single-sided PCB with copper limited to solder pads Test Conditions* 177 ºC/W Package L, single-sided PCB with copper limited to solder pads 140 ºC/W Package L, 4-layer PCB based on JEDEC standard 80 ºC/W Maximum Allowable VCC (V) *Additional thermal information available on Allegro website. Power Derating Curve 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 VCC(max) Package L (RθJA = 80 ºC/W) Package L (RθJA = 140 ºC/W) Package K (RθJA = 177 ºC/W) VCC(min) 20 40 60 80 100 120 140 160 180 Temperature (ºC) Power Dissipation versus Ambient Temperature 2000 Power Dissipation, PD (mW) 1800 1600 Package L (RθJA = 80 ºC/W) 1400 1200 1000 Package L (RθJA = 147 ºC/W) 800 600 400 Package K (RθJA = 177 ºC/W) 200 0 20 40 60 80 100 120 Temperature (°C) 140 160 180 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC Characteristic Performance Data Supply Current versus Supply Voltage 7.5 7.5 6.5 6.5 5.5 5.5 VCC = 24 V 4.5 VCC = 12 V VCC = 3.5 V 3.5 2.5 -60 ICC (mA) ICC (mA) Supply Current versus Ambient Temperature -40 -20 0 20 40 60 80 100 TA = 25°C 4.5 3.5 120 140 2.5 160 0 5 10 15 TA (°C) Low Output Voltage versus Ambient Temperature 35 350 25 300 BOP (G) VOUTPUT(ON) (mV) 45 400 250 200 150 15 5 -5 100 -15 50 -25 -40 -20 0 20 40 60 80 100 120 140 -35 -60 160 VCC (V) 3.5 12 24 -40 -20 0 20 TA (°C) 60 80 100 120 140 160 Switchpoint Hysteresis versus Ambient Temperature 35 60 25 50 45 BHYS (G) 5 VCC (V) 3.5 12 24 55 VCC (V) 3.5 12 24 15 BRP (G) 40 TA (°C) Release Point versus Ambient Temperature -5 -15 -25 40 35 30 25 -35 20 -45 15 -55 -60 30 55 450 0 -60 25 Operate Point versus Ambient Temperature VCC = 12 V 500 20 VCC (V) -40 -20 0 20 40 60 TA (°C) 80 100 120 140 160 10 -60 -40 -20 0 20 40 60 80 100 120 140 160 TA (°C) Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC Functional Description The integrated circuit contains an internal voltage regulator that powers the Hall elements and both the analog and digital circuitry. This regulator allows operation over a wide supply voltage range and provides some immunity to supply noise. The device also contains logic circuitry that decodes the direction of rotation of the ring magnet. Quadrature/Direction Detection Internal logic circuitry provides outputs representing the speed and direction of the magnetic field across the face of the package. For the direction signal to be appropriately updated, a quadrature relationship must be maintained between the target magnetic pole width, the pitch between the two Hall elements (E1 and E2) in the device, and, to a lesser extent, the magnetic switchpoints. For optimal design, the device should be actuated by a ring magnet that presents to the front of the device a field with a pole width two times the Hall element-to-element spacing. This will produce a sinusoidal magnetic field whose period (denoted as Τ) is then four times the element-to-element spacing. A quadrature relationship can also be maintained for a ring magnet with fields having a period that satisfies the relationship: nΤ/4 = 1.63 mm , where n is any odd integer. Therefore, ring magnets with polepair spacing equal to 6.52 mm (n = 1), 2.17 mm (n = 3), 1.3 mm (n = 5), and so forth, are permitted. The response of the device to the magnetic field produced by a rotating ring magnet is shown in figure 1. Note the phase shift between the two integrated Hall elements. Outputs The device provides up to four outputs: target direction (DIR pin), E1 element output (OUTA pin), E2 element output (OUTB pin), and target speed (SPD pin). DIR provides the direction output of the device and is defined as off (high) for targets moving in the direction from E1 to E2 and on (low) for the direction E2 to E1. SPD provides an XORed output of the two Hall elements (see figure 1). Because of internal delays, DIR is always updated before SPD and is updated at every transition of OUTA and OUTB (internal) allowing the use of up-down counters without the loss of pulses. Power-on State At power on, the logic circuitry is reset to pro- vide an off (high) state for all the outputs. If any of the channels is subjected to a field greater than BOP, the internal logic will set accordingly, and the outputs will switch to the expected state. Power-on Time This characteristic, tON, is the elapsed time from when the supply voltage reaches the device supply minimum until the device output becomes valid (see figure 2). Target changes direction of rotation +B Channel A 0 Magnetic Field at Hall Element E1 –B Channel B Magnetic Field at Hall Element E2 B > BOP + 10 G +B 0 –B OUTA OUTB SPD (OUTA XOR OUTB) DIR ΔtDIRSPD Figure 1 Figure 2 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC Application Information Operation with Fine-Pitch Ring Magnets. For targets with a cir- reduce both external noise and noise generated by the internal logic. cular pitch of less than 4 mm, a performance improvement can be observed by rotating the front face of the device (see below). This rotation decreases the effective Hall element-to-element spacing, provided that the Hall elements are not rotated beyond the width of the target. The simplest form of magnet that will operate these devices is a ring magnet. Other methods of operation, such as linear magnets, are possible. Extensive applications information on magnets and Hall-effect sensor ICs is also available in the “Hall-Effect IC Applications Guide” which can be found on the Allegro website, www.allegromicro.com. Applications. It is strongly recommended that an external 0.1 µF bypass capacitor be connected (in close proximity to the device) between the supply and ground of the device to Normal Coplanar Alignment Rotated Alignment D cos α D Target Profile of Rotation S N S E1 E1 E2 E2 α Target Circular Pitch, P Target Face Width, F F < D sin α Typical Application (Using regulated supply; K package configuration shown) VSPD VDIR RLOAD 2 DIR RLOAD VSupply 1 CLOAD A1233 VCC CLOAD SPD 3 A 100 Ω 0.1 µF GND 4 A Resistor is optional, depending on Conducted Immunity requirements Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC Power Derating The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems website.) The Package Thermal Resistance, RθJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RθJC, is relatively small component of RθJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN × IIN (1) ΔT = PD × RθJA (2) TJ = TA + ΔT (3) Example: Reliability for VCC at TA = 150°C. Observe the worst-case ratings for the device, specifically: RθJA = 177 °C/W, TJ(max) = 165°C, VCC(max) = 24 V, and ICC(max) = 8 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: ΔT(max) = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = ΔT(max) ÷ RθJA = 15°C ÷ 177 °C/W = 84.7 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 84.7 mW ÷ 8 mA = 10.59 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions. For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 4.5 mA, and RθJA = 177 °C/W, then: PD = VCC × ICC = 12 V × 4.5 mA = 54 mW ΔT = PD × RθJA = 54 mW × 177 °C/W = 9.6°C TJ = TA + ΔT = 25°C + 9.6°C = 34.6°C A worst-case estimate, PD(max), represents the maximum allowable power level, without exceeding TJ(max), at a selected RθJA and TA. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9 A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC Package K, 4-Pin SIP +0.08 5.21 –0.05 45° B E 1.63 E 1.55 ±0.05 1.79 D 1.32 E +0.08 3.43 –0.05 E1 E2 2.16 MAX Branded Face 2 3 1 D Standard Branding Reference View 0.84 REF N = Device part number Y = Last two digits of year of manufacture W = Week of manufacture For Reference Only; not for tooling use (reference DWG-9010) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 4 14.73 ±0.51 +0.06 0.38 –0.03 +0.07 0.41 –0.05 YYWW 45° A 1 NNNN Mold Ejector Pin Indent A Dambar removal protrusion (8X) B Gate and tie bar burr area C Branding scale and appearance at supplier discretion D Active Area Depth, .0.42 mm E Hall elements (E1 and E2); not to scale 1.27 NOM Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC Package L, 8-Pin SOIC 4.90 ±0.10 1.63 E 1.63 E 8 A 1 8° 0° 0.65 3.90 ±0.10 6.00 ±0.20 2 SEATING PLANE 0.10 C PCB Layout Reference View C NNNNNNN YYWW LLLLL 1.75 MAX 0.25 0.10 For Reference Only; not for tooling use (reference MS-012AA) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Branding scale and appearance at supplier discretion C C 2 SEATING PLANE GAUGE PLANE Branded Face 8X 1.27 BSC 1 1.27 0.40 0.25 BSC 0.51 0.31 5.60 1.04 REF E2 E 1.09 1.27 8 1.75 0.25 0.17 1.95 E E1 D 1 B Standard Branding Reference View N = Device part number = Supplier emblem Y = Last two digits of year of manufacture W = Week of manufacture L = Lot number Reference land pattern layout (reference IPC7351 SOIC127P600X175-8M); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances D Active Area Depth 0.40 NOM E Hall elements (E1 and E2); not to scale Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11 A1233 Dual-Channel Hall-Effect Direction Detection Sensor IC Revision History Revision Revision Date Description of Revision – January 15, 2013 1 September 21, 2015 Initial Release Added AEC-Q100 qualification under Features and Benefits Copyright ©2015, Allegro MicroSystems, LLC Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12