V24N1 - APRIL

April 2014
I N
T H I S
I S S U E
robust RS485/RS422
transceivers 9
high voltage surge stoppers
ease MIL-STD-1275D
compliance 15
Volume 24 Number 1
Active Clamp Synchronous
Controllers for Forward Converters
with 6.5V to 100V+ Inputs
Wei Gu, Randyco Prasetyo and Fei Guo
boost-then‑buck LED driver
for high PWM dimming
ratios 22
cost-effective high voltage
isoSPI™ coupling 26
ideal diode combines 200V
busses 30
The LT3752, LT3752‑1 and LT3753 are highly integrated, high
performance active clamp forward controllers that minimize external
component count, solution size and cost. Two of these controllers,
the LT3752 and LT3753, are designed for inputs up to 100V, while
the LT3752-1 is designed for applications with input voltages greater
than 100V—suitable for HV car battery and offline isolated power
supplies, industrial, automotive and military systems. All produce
compact, versatile and efficient solutions for single-IC output power
levels up to 400W. Higher power levels are
supported by stacking converter outputs
in series. See Table 1 (on page 4) for a
feature comparison of these devices.
NO-OPTO MODE OPERATION REGULATES WITH
ACCURATE PROGRAMMABLE VOLT-SECOND CLAMP
Figure 1 shows a complete 150W forward converter that
requires no opto-couplers thanks to the LT®3752’s accurate, programmable volt-second clamp. For a forward
converter operating in continuous conduction mode, the
output voltage is VOUT = VIN • N • D, where VIN is the input
voltage, N is the secondary to primary turns ratio and D
is the duty cycle. The duty cycle clamp on the OUT pin of
the LT3752, LT3752-1 and LT3753 inversely tracks VIN to
maintain constant VOUT over the input voltage range.
(continued on page 4)
The LT8614 Silent Switcher™ selected for EDN & EE Times ACE Award (page 3)
Caption
w w w. li n ea r.com
Linear in the News
In this issue...
COVER STORY
NEW LINEAR VIDEO PRESENTATIONS
Active Clamp Synchronous Controllers for Forward
Converters with 6.5V to 100V+ Inputs
Wei Gu, Randyco Prasetyo and Fei Guo
1
DESIGN FEATURES
RS485/RS422 Transceivers Operate from
3V to 5.5V Supplies and Withstand ±60V Faults
Ciaran Brennan
2.1A LDO+ Regulator Features Cable Drop Compensation and Monitors Current & Temperature
9
High Voltage Surge Stoppers Ease MIL-STD-1275D
Compliance by Replacing Bulky Passive Components
Dan Eddleman
15
20
Boost-then‑Buck LED Drivers Enable Wide PWM
Dimming Range with Wide-Ranging Input Voltages
22
safe area, allowing operation with high currents at high input-output differentials. The LT3081’s output voltage is adjustable from 0V to 37V and
it withstands reverse voltage. It includes a current monitor and temperature monitor outputs. The LT3081 is stable with no output or input capacitor, a feature unique to this device. www.linear.com/solutions/4521
Single-Ended to Differential Conversion Using Differential Op Amps
Low Cost isoSPI Coupling Circuitry for
High Voltage High Capacity Battery Systems
Jon Munson
functions, the LT3086 LDO+ can monitor and externally limit both temperature
and output current, has an accurate power good output and can compensate for
wire drops between the regulator and the load. www.linear.com/solutions/4522.
Bob Dobkin, Vice President Engineering & CTO—The LT3081 LDO+ features a wide
What’s New with LTspice IV?
Keith Szolusha and Taffy Wong
Bob Dobkin, Vice President Engineering & CTO— In addition to the usual LDO regulatory
1.5A LDO+ Regulator Monitors Current & Temperature
DESIGN IDEAS
Gabino Alonso
Two new videos at www.linear.com from Linear Chief Technical Officer
Bob Dobkin cover the new family of LDO+™ linear regulators, which
add monitoring and control functions to the usual regulation features.
Here are summaries of those and two other recently released videos:
Kris Lokere, Applications Manager, Signal Chain Products—Differential op amps are
26
Ideal Diode Combines 200V Busses
Mitchell Lee
30
new product briefs
31
back page circuits
32
important building blocks in modern analog and mixed signal circuits. For
instance, many modern ADCs require differential signals at the inputs, and differential analog signals are used to drive signals over a cable. This video shows
how to connect differential op amps to convert a single-ended input signal to
a differential output, how common mode level shifting works and how to use
differential op amps to build active filters. www.linear.com/solutions/4524
Wireless Power Receiver Enables Compact and Efficient Contactless Battery Charging
Trevor Barcelo, Product Line Manager, Battery Charger Products—Wireless battery charg-
ing enables applications where it is difficult or impossible to use a wired connector. Examples include products that need to operate in harsh environments
or need to be cleaned or sterilized, as well as products that are simply too
small for a connector. This video shows the LTC®4120 400m A wireless power
receiver buck battery charger with a wireless power transmitter to charge a
3.5V to 11V battery with a constant-current/constant-voltage charge algorithm.
It enables high efficiency charging without any of the thermal or overvoltage
problems typical of wireless power systems. www.linear.com/solutions/4469
2 | April 2014 : LT Journal of Analog Innovation
Linear in the news
STANFORD SOLAR CAR RACES,
POWERED BY LINEAR BATTERY
MANAGEMENT SYSTEM
The Stanford Solar Car Project is an
entirely student-run, nonprofit organization at Stanford University that
builds solar powered cars to race in the
2000-mile World Solar Challenge in
the Australian Outback. It provides an
opportunity for students to gain valuable hands-on engineering experience
while raising awareness of clean energy
vehicles. The team finished 4th overall
in the 2013 Bridgestone World Solar
Challenge, and was the fastest undergraduate solar car in the grueling fiveday race in Australia last October. They
experienced no mechanical failures and
did not burn a single drop of gasoline.
The Stanford solar car uses numerous
Linear Technology products, including
the LTC6803 and LTC6804 multicell battery
stack monitors. Other Linear products
in the Luminos solar car include Hot
Swap™ controllers, precision references
and amplifiers, LED drivers, micropower
step-down regulators, micropower low
dropout regulators and synchronous
step-down switching regulators.
LINEAR PRODUCT AWARDS
EDN & EE Times ACE Awards
Winner, Ultimate Products: Power—
The LT8614 Silent Switcher™ regulator
is a 4A, 42V input capable synchronous
step-down switching regulator. It reduces
EMI/EMC emissions by more than 20dB.
Even with switching frequencies in excess
of 2MHz, synchronous rectification delivers efficiency as high as 96% while Burst
Mode® operation keeps quiescent current
under 2.5µ A in no-load standby conditions.
Its 3.4V to 42V input voltage range is ideal
for automotive and industrial applications.
Finalist, Ultimate Products: Analog ICs—
The LTC2378-20 20-bit, 1Msps, low power,
no latency SAR ADC leads the industry with 0.5ppm integral nonlinearity
The Stanford solar
car uses numerous
Linear Technology
products. including
the LTC6803 and
LTC6804 multicell
battery stack
monitors.
error (INL), making it a true 20-bit ADC,
able to resolve down to 5µV of resolution on a 5V differential input span. Its
104d B SNR is the industry’s highest for
any 1Msps no latency ADC, providing
higher dynamic range compared to fast
delta-sigma ADCs that also have latency.
Applications include seismic monitoring, energy exploration, airflow sensing,
silicon wafer fabrication, medical devices,
data acquisition systems, automatic test
equipment, compact instrumentation
and industrial process control systems.
Finalist, Ultimate Products: Wireless/RF—
The LTC5551 downconverting mixer’s
+36dBm IIP3 (input third-order intercept)
and 2.4dB conversion gain are unparalleled. Other passive mixers claiming similar IIP3 performance typically
have 7dB to 9dB of conversion loss. The
LTC5551’s 2.4dB of conversion gain substantially improves receiver dynamic
range. The mixer can be used over a broad
RF frequency range, from 300MHz to
3.5GHz. The LTC5551 features an integrated
LO buffer on chip, requiring only 0dBm
drive level, eliminating the need for a high
power buffer amplifier stage, often requiring power levels of +17dBm or higher. By
eliminating such a high power LO signal in
the user’s receiver, overall cost is lowered,
and a potential source of undesirable
radiation is removed, thus simplifying
filtering and RF shielding requirements.
The superior performance of this mixer is
ideal for applications in multicarrier GSM,
4G LTE and LTE-Advanced multimode base
stations, point-to-point backhauls, military communications, wireless repeaters,
public safety radios, VHF/UHF/white-space
broadcast receivers, radar and avionics.
CONFERENCES & EVENTS
Advanced Automotive Battery Conference,
International Conference Center, Kyoto, Japan, May
19-23, Booth 40—Linear will exhibit power
management and battery monitoring
systems. More info at www.advancedautobat.com/conferences/automotivebattery-conference-Asia-2014/index.html
Wireless Japan 2014, Tokyo Bigsight, Tokyo,
Japan, May 28-30, West Hall 3, Booth W118—
Presenting Linear’s Dust Networks®
wireless sensor network solutions. More
info at www8.ric.co.jp/expo/wj/ Sensors Expo/Energy Harvesting Pavilion, Donald
E. Stephens Convention Center, Rosemont, Illinois,
June 24-26, Booth 920—Linear will showcase
energy harvesting and wireless sensor network solutions. Presentations:
“Energy Harvesting for BatteryOperated Applications” by Sam Nork;
“Reliable, Low-Power Wireless Sensor
Networks for the Industrial Internet
of Things” by Joy Weiss. More info at
www.sensorsmag.com/sensors-expo
April 2014 : LT Journal of Analog Innovation | 3
Table 1. Feature comparison of LT3752, LT3752-1 and LT3753
PART
INPUT RANGE
ACTIVE CLAMP DRIVER
HOUSEKEEPING FLYBACK CONTROLLER
LT3753
8.5V–100V
Lo-Side
No
LT3752
6.5V–100V
Lo-Side
Yes
LT3752-1
100V–400V+
Hi-Side
Yes
(LT375x) continued from page 1)
If the resistor that programs the duty
cycle clamp goes open circuit, the part
immediately stops switching, preventing the device from running without
the volt-second clamp in place.
In an active volt-second clamp scheme,
the accuracy of VOUT depends heavily on the accuracy of the volt-second
clamp. Competing volt-clamp solutions
use an external RC network connected
from the system input to trip an internal
comparator threshold. Accuracy of the
RC method suffers from external capacitor error, part-to-part mismatch between
the RC time constant and the IC’s switching period, the error of the internal
comparator threshold and the nonlinearity of charging at low input voltages.
The housekeeping supply can be used to
overdrive the INTVCC pin to take power
outside of the part, improve efficiency,
provide additional drive current and
optimize the INTVCC level. The housekeeping supply also allows bias to any
secondary side IC before the main forward converter starts switching. This
removes the need for external startup circuitry on the secondary side.
INTEGRATED HOUSEKEEPING
FLYBACK CONTROLLER
The LT3752/LT3752-1 includes an internal constant frequency flyback controller for generating a housekeeping
supply. The housekeeping supply can
efficiently provide bias for both primary and secondary ICs, eliminating
the need to generate bias supplies from
auxiliary windings in the main forward
transformer, significantly reducing
transformer complexity, size and cost.
To ensure accurate regulation part to part,
the LT3752, LT3752-1 and LT3753 feature
trimmed timing capacitor and comparator thresholds. Figure 2 shows VOUT versus
load current for various input voltages.
PRECISION UNDERVOLTAGE
LOCKOUT AND SOFT-START
The precision LT3752/LT3752-1 undervoltage lockout (UVLO) feature can be used for
supply sequencing or start-up overcurrent
protection—simply apply a resistor divider
to the UVLO pin from the VIN supply.
Figure 1. 150W forward converter in No-Opto mode
VIN
18V TO 72V
INTVCC
4.7µF
100V
×3
D2
•
T2
2.2µF
•
VAUX
D3
•
2.2µF
•
T1
4:4
L1
6.8µH
•
20k
D4
15nF
Si2325DS
100nF
M2
499Ω
0.15Ω
10k
M4
M3
LT3752
OVLO
1.82k
22.6k
34k
31.6k
49.9k
7.32k
60.4k
4 | April 2014 : LT Journal of Analog Innovation
22nF
0.33µF
•
560Ω
22nF
COMP
FB
2.8k
CSW
FB
VAUX
4.7µF
499k
4.7µF
1.1k
CSN
CSP
PGOOD
SYNC
T3
INTVCC
HFB
LT8311
GND
10k
HCOMP
SS2
SS1
RT
TBLNK
IVSEC
TAS
TOS
TAO
GND
•
220pF
SOUT
INTVCC
VIN
2.2nF
SS
ISENSEN
RSENSE
0.006Ω
2.2µF
100Ω
CG
5.9k
2k
VAUX
INTVCC
PMODE
TIMER
UVLO_VSEC
M1
FG
OC
ISENSEP
SYNC
FSW
OUT
OPTO
100k
AOUT
22µF
16V
×2
D1
100Ω
HOUT HISENSE
VIN
2.2nF
250V
+
COMP
M5
470µF
16V
VOUT
12V
12.5A
D1, D2, D3: BAS516
D4: CENTRAL SEMI CMMR1U-02
L1: CHAMPS PQI2050-6R8
M1, M4: INFINEON BSC077N12NS3
M2: VISHAY Si2325DS
M3: FAIRCHILD FDMS86101
M5: DIODES INC. ZVN4525E6
T1: CHAMPS G45R2_0404.04D
T2: BH ELECTRONICS L00-3250
T3: PULSE PE-68386NL
design features
In an active volt-second clamp scheme, the accuracy of VOUT depends
heavily on the accuracy of the volt-second clamp. Competing volt-clamp
solutions use an external RC network which suffers from a number of error
sources. To ensure accurate regulation part to part, the LT3752, LT3752-1 and
LT3753 feature trimmed timing capacitor and comparator thresholds.
The UVLO pin features adjustable input
hysteresis, allowing the IC to resist input
supply droop before engaging soft-stop.
During soft-stop the converter continues
to switch as it folds back the switching frequency, volt-second clamp and
COMP pin voltage. The LT3752, LT3752-1
and LT3753 have a micropower shutdown threshold of approximately
400mV at the UVLO pin—VIN quiescent
current drops to 40μA, or lower.
Adding capacitors to the soft-start pins,
(SS1 and SS2) implements the soft-start
feature, which reduces the peak input
current and prevents output voltage
overshoot during start-up or recovery
from a fault condition. The SS1/2 pins
reduce the inrush current by lowering the
current limit and reducing the switching
frequency, allowing the output capacitor
to gradually charge toward its final value.
Figure 2. Output voltage vs load current at various
input voltages
SHUTDOWN WITH SOFT-STOP
In a reversal of soft-start start-up, the
LT3752/LT3752-1 and LT3753 can gradually discharge the SS1 pin (soft-stop)
during shutdown. Figure 3 shows
shutdown waveforms of the converter
shown in Figure 5. Without soft-stop,
the self-driven synchronous rectifier
feedback transfers capacitor energy
to the primary, potentially causing
shutdown oscillation and damaging
components on the primary side.
Figure 4 shows shutdown waveforms
with soft-stop. The converter continues to
switch as it folds back switching frequency, volt-second clamp and COMP pin
voltage, resulting in clean shutdown.
CURRENT MODE CONTROL
The LT3752/LT3752-1 and LT3753 use a current mode control architecture to increase
supply bandwidth and response to line
and load transients over voltage mode
controllers. Current mode control requires
fewer compensation components than
voltage mode control architectures, making it much easier to compensate a broad
range of operating conditions. For operation in continuous mode and above 50%
duty cycle, required slope compensation
can be programmed by a single resistor.
PROGRAMMABLE FEATURES
SIMPLIFY OPTIMIZATION
The LT3752/LT3752-1 and LT3753 include
a number of programmable features that
allow the designer to optimize them for
a particular application. For instance,
programmable delays between various
gate signals can be used to prevent crossconduction and to optimize efficiency.
Each delay can be set with a single resistor.
Programmable turn-on current spike
blanking (adaptive leading edge blanking plus programmable extended blanking) of the main MOSFET greatly improves
the converter’s noise immunity. During
gate rise time, and sometime thereafter,
Figure 3. Shutdown waveforms of circuit in Figure 5
without soft-stop show oscillations.
Figure 4. Shutdown waveforms of circuit in Figure 5
showing soft-stop in action
PRIMARY
NFET
DRAIN
VOLTAGE
(50V/DIV)
PRIMARY
NFET
DRAIN
VOLTAGE
(50V/DIV)
VOUT
2V/DIV
VOUT
2V/DIV
14.0
13.5
13.0
VOUT (V)
12.5
12.0
11.5
VIN = 70V
VIN = 60V
VIN = 48V
VIN = 36V
VIN = 20V
11.0
10.5
10.0
0
2
6
8
4
LOAD CURRENT (A)
10
12
500µs/DIV
500µs/DIV
April 2014 : LT Journal of Analog Innovation | 5
The LT3752/LT3752-1 and LT3753 include a number of programmable
features that enable optimization for particular applications. For
instance, programmable delays between various gate signals can be
used to prevent cross-conduction and to optimize efficiency.
VIN
36V TO 72V
D1: BAS516
D2: CENTRAL SEMI. CMHZ5229B
L1: CHAMPS PQI2050-3R3
M1: INFINEON BSC190N15NS3
M2: IRF6217
M3, M4: INFINEON BSC0902NSI
T1: CHAMPS G45R2-0209
4.7µF
100V
×3
250V
0.22µF
M2
105k
5Ω
200Ω
+
5Ω
VOUT
5V
20A
560µF
10V
M4
47µF
10V
M3
OUT
M1
OC
SYNC
ISENSEP
UVLO_VSEC
1.96k
1k
RSENSE
0.012Ω
1.87k
4.7nF
SOUT
INTVCC
44.2k
30.1k
57.6k
6 | April 2014 : LT Journal of Analog Innovation
VOUT
D2
22µF
10V
1µF
10V
V+
LT1431
GND-F
GND-S
137k
REF
137k
COLL
100k
1k
2.2nF
250V
36V–72V INPUT, 5V/20A FORWARD
CONVERTER
Figure 5 shows a 5V, 20A output converter that takes a 36V–72V input. The
Figure 6. Efficiency of the converter in Figure 5
96
94
92
90
36VIN
48VIN
72VIN
88
86
1k
100k
1µF
EFFICIENCY (%)
The operating frequency can be programmed from 100kHz to 500kHz range
with a single resistor from the RT pin to
ground, or synchronized to an external
clock via the SYNC pin. The adjustable
operating frequency allows it to be set outside certain frequency bands to fit applications that are sensitive to spectral noise.
100Ω
PS2801-1
1µF
22nF
Figure 5. 5V at 20A forward converter that takes an input of 36V to 72V
noise can be generated in the current
sensing resistor connected to the source
of the MOSFET. This noise can false trip
the sensing comparators, resulting in
early switch turnoff. One solution to this
problem is to use an oversized RC filter
to prevent false trips, but programmable
turn-on spike blanking can eliminate
the need for additional RC filtering.
4.7µF
25V
COMP
FB
SS2
SS1
RT
TBLNK
IVSEC
TAS
TOS
GND
14.7k
100Ω
ISENSEN
LT3753
OVLO
TAO
•
D1
AOUT
VIN
L1
3.3µH
68nF
250V
100nF
10k
•
T1
9:2
0
2
4
6 8 10 12 14 16 18 20
LOAD CURRENT (A)
3.3nF
34.8k
active reset circuit consists of a small
P-channel MOSFET M2 and a reset capacitor. The MOSFET M2 is used to connect
the reset capacitor across the transformer T1 primary winding during the
reset period when M1 MOSFET is off.
The voltage across the reset capacitor automatically adjusts with the duty
cycle to provide complete transformer
reset under all operating conditions.
Also the active reset circuit shapes the
reset voltage into a square waveform that
is suitable for driving the secondary synchronous MOSFET rectifier M4. The MOSFETs
are on the secondary side and are driven
by the secondary winding voltage. Figure 6
shows the efficiency for this converter.
design features
The LT3752/LT3752-1 and LT3753 use a current mode control architecture
to increase supply bandwidth and response to line and load transients when
compared to voltage mode controllers. Current mode control requires fewer
compensation components than voltage mode control architectures, making
it easier to compensate a broad range of operating conditions.
INTVCC
D2
2.2µF
•
T2
•
VAUX
D3
•
4.7µF
100V
×3
•
2.2µF
T1
4:4
•
15nF
M5
0.15Ω
10k
M3
D1
1.82k
SOUT
INTVCC
22.6k
34k
31.6k
49.9k
7.32k
71.5k
22nF
0.33µF
COMP
FB
22nF
1.1k
100k
100k
560Ω
3.16k
100Ω
4.7µF
HFB
2.8k
CSN
CSP
CSW
FG
PGOOD
SYNC
T3
•
LT8311
FB
68pF
100k
GND
INTVCC
10k
HCOMP
SS2
SS1
RT
TBLNK
IVSEC
TAS
TOS
TAO
GND
•
220pF
100k
11.3k
VAUX
SS
ISENSEN
LT3752
RSENSE
0.006Ω
VIN
100Ω
CG
5.9k
2k
2.2µF
INTVCC
PMODE
TIMER
UVLO_VSEC
VAUX
FSW
OC
ISENSEP
OVLO
M1
OUT
SYNC
+
22µF
16V
×2
2.2nF
250V
M4
OPTO
100k
AOUT
VOUT
12V
12.5A
D4
100Ω
HOUT HISENSE
VIN
470µF
16V
20k
M1, M4: INFINEON BSC077N12NS3
M2: VISHAY Si2325DS
M3: FAIRCHILD FDMS86101
M5: DIODES INC. ZVN4525E6
100nF
M2
499Ω
L1
6.8µH
COMP
VIN
18V TO 72V
220nF
4.7µF
PS2801-1
499k
68pF
13.7k
4.7nF
1µF
1k
2.2nF
D1, D2, D3: BAS516
D4: CENTRAL SEMI CMMR1U-02
L1: CHAMPS PQI2050-6R8
T1: CHAMPS G45R2_0404.04D
T2: BH ELECTRONICS L00-3250
T3: PULSE PE-68386NL
Figure 7. 18V–72V input, 12V at 12.5A output forward converter
150V–400V INPUT, 12V/16.7A
FORWARD CONVERTER
Figure 7 shows an 18V–72V input,
12V/12.5A output forward converter. The
LT8311 is used on the secondary side of
forward converters to provide synchronous MOSFET control and output voltage
feedback through an opto-coupler. A
pulse transformer (see T3 in Figure 7) is
required to allow the LT8311 to receive
synchronization control signals from
the primary-side IC. These control signals are interpreted digitally (high or
low) by the LT8311 to turn on/off the
catch and forward MOSFETs. Figure 8
shows the efficiency for this converter.
Figure 9 shows a 150V–400V input,
12V/16.7A output isolated flyback converter. For high input voltage applications, the voltage rating of the available
P-channel MOSFETs may not be high
enough to be used as the active clamp
switch in the low side active clamp topology. An N-channel approach using the
high side active clamp topology should
be used. This topology requires a high
side gate driver or a gate transformer
to drive the N-channel MOSFET to switch
in the active clamp capacitor. Figure 10
shows the efficiency for this converter.
Figure 8. Efficiency for the converter in Figure 7
96
94
EFFICIENCY (%)
18V–72V INPUT, 12V/12.5A FORWARD
CONVERTER
92
90
24VIN
48VIN
72VIN
88
86
0
3
9
6
LOAD CURRENT (A)
12
15
April 2014 : LT Journal of Analog Innovation | 7
The LT3752/LT3752-1 includes an internal constant frequency flyback
controller for generating a housekeeping supply. The housekeeping supply
can efficiently provide bias for both primary and secondary ICs, eliminating
the need to generate bias supplies from auxiliary windings in the main forward
transformer, significantly reducing transformer complexity, size and cost.
D2
•
10µF
374k
•
VAUX
4.2Ω
INTVCC
C10
4.7µF
ACPL-W346
D3
•
D5
VOUT
ANODE
CATHODE
VEE
10µF
499Ω
0.15Ω
•
•
47nF
630V
D1
VCC
M5
402Ω
10nF
630V
0.22µF
0.002
M3
2k
UVLO_VSEC
5.76k
ISENSEN
LT3752-1
OVLO
2.94k
40.2k
100k
78.7k
95.3k
13k
124k
0.22µF
100Ω
4.7µF
HFB
806Ω
22k
560Ω
4.7µF
PS2801-1
8 | April 2014 : LT Journal of Analog Innovation
Figure 10. Efficiency for the converter in Figure 9
96
95
94
93
EFFICIENCY (%)
The LT3752, LT3752-1 and LT3753 simplify
the design and improve performance
to isolated power supplies with a voltsecond clamp architecture that produces
accurate regulation. An integrated flyback controller can be used to produce
a housekeeping supply, simplifying the
magnetics. Current mode control improves
bandwidth and allows compensation for
a broad range of operating conditions.
Soft-stop features protect the supply
and other components from potentially
damaging voltage and current spikes. n
92
91
90
89
88
VIN = 150V
VIN = 250V
VIN = 350V
VIN = 400V
87
86
85
0
2.5
68pF
11.3k
1µF
432k
D1: CENTRAL SEMI CMR1U-10
D2, D3, D5: BAS516
D4: CENTRAL SEMI CMMR1U-02
L1: COILCRAFT AGP2923-153
2.2nF
Figure 9. 150V–400V input, 12V/16.7A output isolated forward converter
CONCLUSION
VAUX
100k
FB
LT8311
PGOOD
SYNC
T3
•
CG
GND
100pF
5.11k
22nF
1µF
1.2k
22k
3.3nF
100k
VIN
3.16k
22k
0.47µF
•
2.2µF
INTVCC
10k
COMP
FB
HCOMP
SS2
SS1
RT
TBLNK
IVSEC
TAS
TOS
TAO
GND
RSENSE
0.022Ω
220pF
SOUT
INTVCC
VAUX
SS
ISENSEP
CSN
SYNC
CSW
OC
100Ω
120pF
INTVCC
PMODE
TIMER
M1
OUT
FG
AOUT
FSW
HISENSE
+
VOUT
12V
16.7A
33µF
16V
×4
M2
OPTO
499k
HOUT
VIN
330µF
16V
10nF
250V
M4
100Ω
499k
10k
D4
M1: RENESAS IPD65R25OC6
M2: RENESAS IPD60R1K4C6
M3: RJK0653DPB ×2
M4: FAIRCHILD FDMS86200 ×3
M5: INFINEON BSP300
CSP
INTVCC
374k
T2
COMP
VIN
150V 2.2µF
TO 630V
400V
L1
15µH
T1
31:5
7.5
10 12.5
5
LOAD CURRENT (A)
15
17.5
T1: CHAMPS LT80R2-12AC-3124005
T2: WÜRTH 750817020
T3: PULSE PE-68386NL
design features
RS485/RS422 Transceivers Operate from 3V to 5.5V
Supplies and Withstand ±60V Faults
Ciaran Brennan
The LTC2862–LTC2865
are robust RS485/RS422
transceivers that feature
±60V overvoltage and
±15kV ESD tolerance to
reduce failures caused by
electrical overstress. These
transceivers introduce
several new capabilities for
high voltage tolerant RS485
transceivers: operation from
3V to 5.5V supply voltages,
up to 20Mbps data rate,
±25V common mode voltage
range, selectable slew rate,
interface to low voltage
logic, and availability in
3mm × 3mm DFN packages.
The venerable RS485 serial bus forms
the backbone of many commercial and
industrial data communications systems.
RS485-based networks are used in a wide
variety of applications, including industrial control systems, supervisory control
and data acquisition systems, building
automation and security, theatre and
performance venue lighting control, commercial aircraft and ground vehicle busses,
and other custom networked systems.
Robustness to electrical overstress is an
important attribute for RS485 transceivers used in these applications, with risk
of wiring faults, ground voltage faults
and lightning induced surge voltages.
Figure 1. This family
of robust high voltage
tolerant transceivers
includes features typically
only found only in less
robust ICs
However, most high voltage tolerant
RS485 transceivers lack the performance
and features of the latest non high voltage
tolerant RS485 transceivers. The LTC2862–
LTC2865 transceivers fill this gap by combining fault tolerance with the expanded
capabilities demanded in the specifications
for contemporary network applications.
3V TO 5.5V OPERATION
High voltage tolerant RS485 transceivers typically operate from 5V supplies,
but the 5V supply is fast becoming an
anachronism, rarely used in modern
digital circuits. In some cases, a faulttolerant RS485 transceiver is the only
5V component in the system, incurring the cost of a dedicated supply.
In contrast to some high voltage tolerant transceivers, the LTC2862–LTC2865
maintain full compliance to RS485 and
RS422 standards when operating from a
3.3V supply. Competing parts sometimes
drive a reduced VOD when powered by
3.3V. The LTC2862–LTC2865 transceivers
are fully interoperable with 5V-powered
transceivers on the same bus when operating from either a 3.3V or 5V supply.
LOW VOLTAGE LOGIC INTERFACE
Many microcontroller systems operate
at voltages lower than 3.3V. The LTC2865
provides the means to interface to logic
operating as low as 1.65V. A VL supply
pin and built in level shifters translate
the I/O signals from the lower voltage VL logic supply to the higher voltage VCC supply used to power the RS485
receiver and transmitter. This eliminates
the need for external level shifters in
mixed-voltage RS485 systems. The two
supplies may be powered up and powered down independently of each other.
20Mbps OR 250kbps DATA RATE
Modern RS485 systems can operate at data
rates that exceed the capabilities of most
high voltage tolerant transceivers. For
example, the highly popular LT1785/LT1791
transceivers operate at a maximum of
250kbps. The LTC2862–LTC2865 offer similar high voltage tolerance, but can communicate 160 times faster at up to 20Mbps.
Not all systems require a high data rate.
In applications where 250kbps suffices,
the system designer may prefer an RS485
driver with low EMI slew-controlled
April 2014 : LT Journal of Analog Innovation | 9
Many microcontroller systems operate at voltages lower than 3.3V. The LTC2865
provides the means to interface with logic operating as low as 1.65V. A VL supply pin
and built in level shifters translate the I/O signals from the lower voltage VL logic supply
to the higher voltage VCC supply used to power the RS485 receiver and transmitter.
This eliminates the need for external level shifters in mixed-voltage RS485 systems.
transitions. The LTC2862–LTC2865 satisfy
this need. These parts come in two versions: the high speed 20Mbps LTC2862-1,
LTC2863-1, LTC2864-1; and the slewlimited 250kbps LTC2862-2, LTC2863-2,
LTC2864-2. The LTC2865 supports both the
high speed and the slew-limited transmit
modes and provides an additional input
pin to select between the two modes.
±25V COMMON MODE VOLTAGE
RANGE
Standard RS485 transceivers operate over a
limited common mode voltage range that
extends from –7V to 12V. In a commercial
or industrial environment, ground faults,
noise, and other electrical interference can
induce common mode voltages that exceed
these limits. An ideal RS485 transceiver
would not only survive large common
mode voltages but would continue to send
and receive data without disruption.
The receivers in the LTC2862–LTC2865
operate over an expanded ±25V common
PART NUMBER
DUPLEX
ENABLES
V L PIN
SLEW
LIMIT PIN
LTC2862-1, -2
HALF
YES
NO
NO
LTC2863-1, -2
FULL
NO
NO
NO
LTC2864-1, -2
FULL
YES
NO
NO
LTC2865
FULL
YES
YES
YES
mode voltage range. The receivers use low
offset bipolar differential inputs, combined with high precision resistor dividers
to maintain precise receiver thresholds
over the wide common mode voltage
range. The transmitters operate up to the
absolute maximum voltages of ±60V, and
will sink or source current up to the limits
imposed by their current limit circuitry.
A, B
50V/DIV
(A − B)
0.5V/DIV
RO
5V/DIV
100ns/DIV
Figure 2. LTC2865 receiving 10Mbps ±200mV
differential signal with 1MHz 50VP-P common mode
sweep
10 | April 2014 : LT Journal of Analog Innovation
S8: 8-LEAD SO
DD: 8-LEAD DFN
S8: 8-LEAD SO
DD: 8-LEAD DFN
S: 14-LEAD SO
DD: 10-LEAD DFN
MSE: 12-LEAD MSOP
DE: 12-LEAD DFN
Table 1. LTC2862–LTC2865 pinouts and packages
A, B
2V/DIV
RO
5V/DIV
PACKAGES
40ns/DIV
Figure 3. LTC2865 receiving 20Mbps ±200mV
differential signal with –12V 36ns fall time
common mode step
The LTC2862–LTC2865 excel in rejecting
large amplitude, high frequency and high
slew rate common mode perturbations.
Figure 2 shows the LTC2865 receiving
10Mbps data with a ±200mV differential
signal superimposed on a 50VP-P 1MHz
common mode signal, while Figure 3
shows the LTC2865 receiving 20Mbps
data with a ±200mV differential signal superimposed on a –12V step in
the common mode voltage with a 36ns
10%–90% fall time. In a noisy electrical
environment this exceptional common
mode rejection can greatly improve the
reliability of data communications.
Both the high speed 20Mbps and the slewlimited 250kbps version of the LTC2862–
LTC2865 contain receivers with the full
20Mbps bandwidth. A fast common mode
transient such as the one illustrated in
Figure 3 can produce a differential voltage as it propagates along the cable if
the capacitive loads on the two lines are
not well matched. If the resulting differential voltage exceeds the receiver
design features
These devices have a failsafe feature that guarantees the receiver output is in a logic 1
state (the idle state) when the inputs are shorted, left open, or terminated but not driven,
for more than about 3µs. The delay allows normal data signals to transition through the
threshold region without being interpreted as a failsafe condition. This failsafe feature is
guaranteed to work for inputs spanning the entire common mode range of –25V to 25V.
threshold it may trigger a state change
in the receiver. In systems where the data
rate is ≤ 250kbps, the noise immunity of
the receivers may be increased by adding
a 100pF–1nF capacitor across the receiver
pins to filter the high frequency differential
noise generated by common mode noise
acting on mismatched capacitive loads.
FULL FAILSAFE OPERATION
WITH SYMMETRICAL RECEIVER
THRESHOLDS
These devices have a failsafe feature that
guarantees the receiver output is in a logic
1 state (the idle state) when the inputs are
shorted, left open, or terminated but not
driven, for more than about 3µs. The delay
allows normal data signals to transition
through the threshold region without
being interpreted as a failsafe condition. This failsafe feature is guaranteed
to work for inputs spanning the entire
common mode range of –25V to 25V.
The LTC2862–LTC2865 implement the
failsafe function with a window comparator (Figure 4). The comparator
has fully symmetric positive and negative signal threshold voltages (typically
±75mV). The voltage difference between
the two signal threshold voltages constitutes the signal hysteresis (typically
150mV). In addition the failsafe threshold
voltage lies between the negative signal
threshold voltage and 0V with a typical
value of –50mV. The difference between
the negative signal threshold voltage
and the failsafe threshold voltage is the
failsafe hysteresis, typically 25mV.
V(A-B)
POSITIVE
SIGNAL
THRESHOLD
FAILSAFE
THRESHOLD
SIGNAL
HYSTERESIS
FAILSAFE
HYSTERESIS
NEGATIVE
SIGNAL
THRESHOLD
RO
SIGNAL
LOW
SIGNAL
HIGH
FAILSAFE
TIMEOUT
SIGNAL
LOW
FAILSAFE
ACTIVE
SIGNAL
LOW
HIGH
LOW
Figure 4. Failsafe window comparator operation
A normal data signal produces a high
on the receiver output RO when the differential input voltage goes above the
positive signal threshold voltage and a
low on RO when the differential input
voltage goes below the negative signal
threshold voltage. The failsafe function
is triggered when the differential input
voltage goes above the failsafe threshold voltage but stays below the positive signal threshold for longer than the
failsafe timeout time. When the failsafe
timer times out, the failsafe is active and
RO is forced high. It stays high until the
differential input voltage goes below
the negative signal threshold voltage.
Many RS485 transceivers have asymmetrical receiver thresholds that employ
only the negative signal threshold and the
failsafe threshold voltages. This provides
effective failsafe detection but causes
A
B
200mV/DIV
A
B
200mV/DIV
(A − B)
200mV/DIV
(A − B)
200mV/DIV
RO
2V/DIV
RO
1.6V/DIV
40ns/DIV
Figure 5. Duty cycle of LTC2865 symmetrical receiver
with ±200mV 20Mbps input signal
1µs/DIV
Figure 6. Duty cycle of competitor asymmetrical
receiver with ±200mV 600kbps input signal
April 2014 : LT Journal of Analog Innovation | 11
The LTC2862–LTC2865 feature glitch-free power-up and power-down
protection to meet hot plugging (Hot Swap) requirements. These transceivers
do not produce a differential disturbance on the bus when they are connected
to the bus while unpowered, or while powered but disabled. Similarly, these
transceivers do not produce a differential disturbance on the bus when they
are powered up in the disabled state while already connected to the bus.
distortions in the duty cycle of the receiver
output RO in the case of attenuated
signals with slow edges. The symmetrical
thresholds used in the LTC2862–LTC2865
maintain the proper duty cycle in the
RO output even with highly attenuated
signals (Figure 5), while a transceiver with
asymmetric thresholds introduces substantial duty cycle distortion (Figure 6).
In addition, the 150mV (typical) signal
hysteresis of the LTC2862–LTC2865 receivers provides superior noise immunity
compared to receivers with asymmetrical receiver thresholds. Noise transients
that momentarily go above the failsafe
threshold but return below the negative
signal threshold will trigger an erroneous high RO output in an asymmetric
receiver (Figure 8) but are filtered out
by the failsafe timer in the symmetric
LTC2862–LTC2865 receivers (Figure 7).
HOT PLUGGING, HOT SWAPPING,
AND GLITCH-FREE POWER-UP AND
POWER-DOWN
The LTC2862–LTC2865 feature glitchfree power-up and power-down protection to meet hot plugging (Hot Swap)
requirements. These transceivers do
not produce a differential disturbance
on the bus when they are connected
to the bus while unpowered, or while
powered but disabled. Similarly, these
transceivers do not produce a differential
disturbance on the bus when they are
powered up in the disabled state while
already connected to the bus. In these
cases the receiver output RO remains
off with a high impedance output.
12 | April 2014 : LT Journal of Analog Innovation
RO
2V/DIV
RO
2V/DIV
A, B
200mV/DIV
A, B
200mV/DIV
1µs/DIV
1µs/DIV
Figure 7. LTC2862 symmetrical receiver rejecting
+100mV noise pulse on –200mV differential input
Figure 8. Competitor asymmetrical receiver
responding to +100mV noise pulse on –200mV
differential input
If the driver or receiver inputs are in
an enabled state during power-up or
power-down, the outputs make a glitchfree transition to the proper state as the
supply passes through the transceiver’s
internal supply undervoltage detector
threshold. The LTC2863 has no means
to disable the receiver or driver, so it
always powers up with a glitch-free
transition to the fully enabled state.
LTC2863: The LTC2863 is a full-duplex
PACKAGES AND PINOUTS
LTC2864: The LTC2864 is a full-duplex
The LTC2862–LTC2865 offer four pin
configurations to meet a wide range of
application requirements, with each pinout
offered in leaded and leadless packages.
transceiver with enable pins. It is available
in a 14-pin leaded SO package for socket
compatibility with the LT1791 as well as
a 10-lead 3mm × 3mm DFN package.
LTC2862: The half-duplex LTC2862 with
LTC2865: The LTC2865 includes the super-
shared receive and transmit pins is
the most commonly used version. It
comes in an 8-pin leaded SO package and a small 3mm × 3mm 8-pin
leadless DFN package. The LTC2862
in the SO package is socket compatible with its predecessor, the LT1785.
transceiver with separate receive and
transmit pins that omits the receiver
and driver enable pins in order to fit
in an 8-pin package. As a consequence,
both the driver and receiver are always
enabled and the part has no shutdown
mode. Like the LTC2862, it is available in
an 8-pin leaded SO package and a small
3mm × 3mm 8-pin leadless DFN package.
set of the functionality available in the
rest of the family. Like the LTC2864, it
offers a full-duplex pinout and adds
two additional pins: a VL pin for a
logic interface supply voltage and an
SLO input pin to select the high speed
or slew-limited transmitter mode.
design features
The handling of exposed wires and screw terminals by service
personnel introduces the risk of ESD damage, while the
possibility of wiring the cables to the wrong screw terminals
introduces the risk of overvoltage damage. The high fault
voltage and ESD tolerance make the LTC2862–LTC2865
exceptionally resistant to damage from these hazards.
±60V FAULT AND ±15kV ESD
TOLERANCE
RS485 wiring connections are often made
by connecting the bare twisted wire
to screw terminal blocks. The apparatus containing the RS485 interface may
house circuits powered by 24V AC/DC or
other voltages that are also connected
with screw terminals. The handling of
exposed wires and screw terminals by
service personnel introduces the risk of
ESD damage, while the possibility of wiring
the cables to the wrong screw terminals
introduces the risk of overvoltage damage.
The high fault voltage and ESD tolerance
make the LTC2862–LTC2865 exceptionally
resistant to damage from these hazards.
The ±60V fault protection of the LTC2862–
LTC2865 is achieved by using a high
voltage BiCMOS integrated circuit technology. The naturally high breakdown
voltage of this technology provides
protection in powered-off and high
impedance conditions. The driver outputs use a progressive foldback current
limit design to protect against overvoltage faults while allowing high current
output drive. The LTC2862–LTC2865 are
protected from ±60V faults even with
GND open, or VCC open or grounded.
The LTC2862–LTC2865 are protected from
electrostatic discharge from personnel or
equipment up to ±15kV (HBM) to the A, B, Y
and Z pins with respect to GND. On-chip
protection devices start to conduct at
voltages greater than approximately
±78V and conduct the discharge current
safely to the GND pin. Furthermore, these
MOV
RS485 A
(EXTERNAL)
VCC
DE
TBU
GDT
LTC2862-1
A
SCR
RO
R
GND
B
GDT
TBU
SCR
T
DI
RE
GND
RS485 B
(EXTERNAL)
MOV
GDT: BOURNS 2031-42T-SM; 420V GAS DISCHARGE TUBE
TBU: BOURNS TBU-CA085-300-WH; 850V TRANSIENT BLOCKING UNIT
MOV: BOURNS MOV-7D391K; 390V 25J METAL OXIDE VARISTOR
SCR: BOURNS TISP4P035L1NR-S; 35V BIDIRECTIONAL THYRISTOR
devices withstand up to ±15kV discharges
even when the part is powered up and
operating without latching up. All the
other pins are protected to ±8kV (HBM).
EXTENDED PROTECTION AGAINST
IEC SURGE, EFT, ESD AND
OVERVOLTAGE FAULTS
An RS485 transceiver used in an industrial environment can be exposed to
extremely high levels of electrical overstress due to lightning surge, electrical
fast transients (EFT) from switching high
current inductive loads, and electrostatic discharge (ESD) from electrically
charged personnel or equipment. (Test
methods for ESD, EFT, and surge are
defined in the IEC standards 61000-4-2,
61000-4-4, and 61000-4-5, respectively.)
The transients produced by the surge tests
in particular contain much more energy
than can be absorbed by the on-chip
ESD protection devices of the LTC2862–
LTC2865. Therefore, a properly designed
Figure 9. Network for IEC Level 4
protection against surge, EFT
and ESD plus ±360V overvoltage
protection
external protection network is necessary to
achieve a high level of surge protection. An
external network can also extend the ESD,
EFT and overvoltage performance of the
LTC2862–LTC2865 to extremely high levels.
The protection network shown in Figure 9
demonstrates how the high breakdown
voltage of the LTC2862–LTC2865 is used
to advantage in a protection circuit that
meets the highest defined IEC protection
levels (Level 4) for surge, EFT and ESD,
while extending the overvoltage fault
tolerance to ±360V. This protection circuit
maintains the ±25V common mode voltage
range and adds only ~8pF of capacitance
per line (line to GND), thereby providing an extremely high level of protection without impacting the performance
of the LTC2862–LTC2865 transceivers.
The gas discharge tubes (GDTs) provide
the primary protection against electrical surges. These devices provide a
very low impedance and high current
April 2014 : LT Journal of Analog Innovation | 13
System designers are no longer required to choose between
robust fault tolerance or high performance in a RS485 and RS422
transceivers—the LTC2862–LTC2865 transceivers offer both.
VCC
(4.75V TO 5.25V)
VCC
LTC2862-1
RO
A*
RE
B*
8.2Ω
8.2Ω
following considerations must be followed for full PROFIBUS compliance:
VCC
390Ω
B WIRE
390Ω
B WIRE
100m
220Ω
A WIRE
5.5Ω/WIRE
DI
VOD
220Ω
390Ω
390Ω
A WIRE
DE
Figure 10. LTC2862-1
PROFIBUS compatible
line interface
GND
4VP–P ≤ VOD ≤ 7VP–P AT 12Mbps
* THE POLARITY OF A AND B IN THIS DATA SHEET IS OPPOSITE THE POLARITY DEFINED BY PROFIBUS.
carrying capability when they fire, safely
discharging the surge current to GND.
The transient blocking units (TBUs) are
solid-state devices that switch from
a low impedance pass-through state
to a high impedance current limiting state when a specified current
level is reached. These devices limit
the current and power that can pass
through to the secondary protection.
The secondary protection consists of
a bidirectional thyristor that triggers
above 35V to protect the bus pins of the
LTC2862–LTC2865 transceiver. The high
trigger voltage of the secondary protection maintains the full ±25V common
mode voltage range of the receivers.
The final component of the network
is the metal oxide varistor (MOV) that
clamps the voltage across the TBUs
to protect them against fast ESD and
EFT transients that exceed the turn-on
time of the GDT. The high performance
of this network is attributable to the
low capacitance of the GDT and thyristor primary and secondary protection
14 | April 2014 : LT Journal of Analog Innovation
devices. The 130pF MOV capacitance
floats on the line and is shunted by
the TBU, so it contributes no appreciable capacitive load on the signal.
The high breakdown voltage and robustness of the LTC2862–LTC2865 is an essential element of this protection circuit.
The ±35V SCR devices used to maintain
the common mode voltage range would
not protect transceivers with breakdown
voltages below ±35V. Furthermore, connecting the MOVs in parallel with the TBUs
prevents the MOV capacitance from loading
the RS485 bus, but it has the disadvantage
of shunting ESD and EFT current through
the SCR devices. The resulting voltage
drop across the SCR is placed on the bus
pins of the transceiver. This unique low
capacitance topology can only be used
with a robust high voltage transceiver.
USING THE LTC2862 IN PROFIBUS
APPLICATIONS
PROFIBUS is an RS485-based field bus
with additional requirements for
cables, interconnects, line termination,
and signal levels. Figure 10 shows the
LTC2862-1 in a PROFIBUS network. The
1.Each end of the PROFIBUS line must
be terminated with a 220Ω resistor
between B and A, a 390Ω pullup resistor
between B and VCC , and a 390Ω pulldown resistor between A and GND.
2.8.2Ω resistors in series with the
LTC2862-1 A and B pins are necessary
to reduce the peak to peak differential voltage VOD received at the end
of a 100m terminated cable to less
than 7V per the PROFIBUS standard.
3.The polarity of the PROFIBUS signal is
opposite to the polarity convention
used in most RS485 transceiver data
sheets. Connect pin A to the PROFIBUS B
wire (through an 8.2Ω series resistor)
and connect pin B to the PROFIBUS A
wire (through an 8.2Ω series resistor).
4.Power the LTC2862-1 transceiver
with a 5% tolerance 5V supply
(4.75V to 5.25V) to ensure that the
PROFIBUS VOD tolerances are met.
CONCLUSION
System designers are no longer required
to choose between robust fault tolerance or high performance in a RS485
and RS422 transceivers—the LTC2862–
LTC2865 transceivers offer both. These
transceivers feature ±60V overvoltage and
±15kV ESD tolerance, but also include:
operation over 3V to 5.5V supply voltages,
up to 20Mbps data rate, ±25V common
mode voltage range; selectable slew rate,
interface to low voltage logic; and availability in 3mm × 3mm DFN packages. n
design features
High Voltage Surge Stoppers Ease MIL-STD-1275D
Compliance by Replacing Bulky Passive Components
Dan Eddleman
Electronics in a military vehicle face a unique set of
challenges, chief among them operation from a perverse
power supply. Recognizing the difficult power supply
fluctuations that occur in the field, the US Department
of Defense created MIL-STD-1275D to set down the
requirements of electrical systems powered from a
military vehicle’s 28V supply. Designing systems to
withstand MIL-STD-1275D’s surge and related transients
traditionally requires large and expensive passive
components. Linear Technology’s surge stopper product
line is well suited to protecting systems from this type
of surge while reducing the cost and solution size.
MIL-STD-1275D REQUIREMENTS
MIL-STD-1275D defines a variety of
conditions, most importantly those
of steady state operation, starting disturbances, spikes, surges, and ripple.
MIL-STD-1275D lays down requirements for each of these conditions
in three separate “modes of operation”: starting mode, normal operating mode, and generator-only mode.
Before describing the specifics of spikes,
surges, ripple, and other requirements, let’s
first look at the modes of operation. Not
surprisingly, “starting mode” describes
the conditions that occur when the engine
is started; “normal mode” describes the
conditions when the system is operating without any faults; and “generatoronly” mode describes a particularly
vicious circumstance where the battery
has been disconnected and the generator is directly powering the electronics.
Generator-only mode is a challenging
situation. Normally, a battery conceals
the erratic nature of the generator by
maintaining a relatively constant voltage
despite the generator’s power fluctuations. Predictably, the limits set down for
generator-only mode are worse than
normal operating mode. For the most
part, if the system operates through the
generator-only mode conditions, it will
have no difficulty with normal mode. (The
one possible exception is that generatoronly mode’s 500mΩ source impedance
during a surge can ease the burden when
compared with the 20mΩ source impedance in the normal operating mode.)
Steady-State
As with any standard, MIL-STD-1275D spells
out conditions and requirements in detail.
The purpose of this article is to present
these requirements, and a proposed solution, in a more digestible form. It is recommended to refer to MIL-STD-1275D for
more precise definitions and requirements.
MIL-STD-1275D defines steady-state as,
“The condition in which circuit values
remain essentially constant, occurring
after all initial transients or fluctuating conditions have subsided. It is also
definitive of the condition where, during
normal system operation, only inherent or
natural changes occur; (i.e., no malfunctions occur and no unanticipated changes
are made to any part of the system).”
More simply, in steady-state the input
voltage remains relatively constant.
As shown in Table 1, the steady-state
input voltage range during normal
operating mode ranges from 25V to
30V. During generator-only mode (the
condition where the battery is disconnected), the steady-state voltage range
is somewhat wider at 23V to 33V.
Table 1. Selected MIL-STD-1275D specifications in normal operating mode and generator-only mode
SPECIFICATION
NORMAL OPERATING MODE
GENERATOR-ONLY MODE
Steady State
25V < V IN < 30V
23V < V IN < 33V
Spikes
250V, Max Energy=15mJ
Same as Normal Operating Mode
Surges
40V Max, ~500ms, R IN = 20mΩ
100V Max, ~500ms, R IN = 500mΩ
Ripple
Magnitude ±2V
Magnitude ±7V
April 2014 : LT Journal of Analog Innovation | 15
Linear Technology’s surge stopper products provide a compelling
solution to MIL-STD-1275D compliance. Alternative designs
typically use shunt clamps at the input, which can result in
damage or blown fuses during sustained overvoltage conditions.
300
VOLTAGE
110
250V, 70µs
250
VPEAK
200
90
100V, 1ms
STEADY STATE VOLTAGE (23V–33V)
50
0
−50
MAXIMUM ENERGY
CONTENT OF 15mJ
−100
0V
80
100
VOLTAGE (V)
VOLTAGE (V)
150
28V
−250
tOSC
Figure 1. MIL-STD-1275D spike
Spikes
Rather than quote the definition of a
spike from MIL-STD-1275D, let’s instead
look at the example in Figure 1. A spike
is generally oscillatory (it rings) and
decays to the steady-state voltage within
1ms. MIL-STD-1275D states that these
spikes occur when reactive loads are
switched, and may occur during events
such as sounding the horn, operating
the bilge pumps, starting and stopping the engine, or rotating the turret.
Figure 4. Starting disturbances
50
40V, 500ms
40
10
−250V, 70µs
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
TIME (ms)
0
1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
TIME (s)
Figure 2. Envelope of spike in generator-only mode
Figure 3. Generator-only mode surge envelope
While that description is useful in understanding a spike, the actual requirements
are defined by Figure 2 (for generator-only
mode). Additionally, in subsection 5.3.2.3,
“Voltage Spikes Imported into EDUT,”
MIL-STD-1275D describes a recommended
test setup as well as the required risetime
and frequency of oscillation. An important
fact to note is that the maximum energy
is limited to 15mJ. The spike requirement
for normal operating mode is similar to
generator-only mode except that rather
than a 100V limit at 1ms, the normal
operating mode limit is 40V at 1ms.
VOLTAGE
IES
CRANKING
LEVEL
STEADY STATE
INITIAL
ENGAGEMENT
SURGE
(IES)
CRANKING
LEVEL
VOLTAGE
6V MIN
0V
TIME
1s
MAX
16 | April 2014 : LT Journal of Analog Innovation
60
20
−200
−300
70
30
−100V, 1ms
−150
TIME
100V, 50ms
100
30s
MAX
1
Surges
Spikes are transients that last less than
1ms; surges are transients that last longer.
Figure 3 shows the limitations for generator-only mode. Note that the recommended test in MIL-STD-1275D specifies
that five 100V pulses of 50ms duration
should be applied at the system input with
a 1s repeat time. Interestingly, the envelope
of the surge condition shown in Figure 3
is more difficult to satisfy, as it does not
return to 40V for a full 500ms. The solution
shown in this article satisfies both of these
conditions. Once again, the requirements
for normal operating mode are easier; the
surge envelope looks similar, except that
it has a 40V maximum instead of 100V.
The reader should refer to the actual
specification for details not covered here.
design features
Rather than shunt high energy levels to ground using bulky
passive components, high voltage surge stoppers such as
the LTC4366 and LT4363 limit the output voltage using series
MOSFETs when faced with input voltage spikes and surges.
Figure 5. 4A/28V MIL-STD-1275D
solution provides uninterrupted
power to 4A loads while limiting
the output voltage to 44V during
MIL-STD-1275D 100V/500ms
surges and ±250V spikes; powers
2.8A loads during ±7V ripple.
0.1µF
500V
1210
237k
1206
15nF
10k 1206
1206
100Ω
D4A
C14
1µF
250V
2220
SOURCE1
M1
INPUT
TVS
OPT
C13
1µF
250V
2220
100Ω
HS1
20k
D3A
D3B
D4B
C15
1µF
250V
2220
HS2
D1
0.1µF
1210
20k
100Ω
1210
HS3
DRAIN2
M2
+
C1–C12
22µF
×12
D2
RSENSE
10mΩ
1206
10Ω
OUTPUT
68µF
50V
0.47µF
VDD
GATE
SD
OUT
LTC4366-2
TIMER
VSS
BASE
2.2µF
25V
18.2k
1210
18.2k
1210
FB
RFB1
12.1k
D5
30.1Ω
RFB2
649k
1206
RFB3
332k
0.047µF
18.2k
1210
1k
R3
R1
301k
301k 301k
C1–C12: TDK CKG57NX7S2A226M500JH
C25: TDK C5750X7R2E105K230KA
D1: VISHAY FEP30GP-E3/45
D2: DIODES INC. BAT54-7-F
Q2A
D3, D4: DIODES INC. MMBD3004S-7-F
D5: DIODES INC. BAS21W-7-F
Q1A
Q1B
M1: IXYS IXTQ88N30P
R4
M2: IXYS IXTQ170N10P
1k
R
THERM
RSENSE: IRC LRC-LRF-1206LF-01-R010
R2
AFFIXED
RTHERM: EPCOS B59901D100A40
100k
1k
TO HS3
Q1, Q2: DIODES INC. MMDT5551-7-F
TVS (OPTIONAL): VISHAY P6SMB150CA-E3/5B
HS1, HS2, HS3 (HEATSINKS): ASSMANN WSW COMPONENTS V8813X
332k
0.1µF
VCC
GATE SNS
OPT
OUT
FB
SHDN
OV
10k
UV
RFB4
10k
LT4363DE-2
GND
TMR
ENOUT
ENOUT
FLT
6.19k
1µF
16V
FAULT
5.6M
10µF
16V
UNLESS OTHERWISE NOTED, COMPONENT PACKAGE SIZES ARE 0805 AND CAPACITOR RATINGS ARE 100V
Ripple
Starting Mode
Other Requirements
Ripple is the term used to refer to variations of the input voltage about the steady
state DC voltage. It may be composed
of frequencies from 50Hz to 200kHz. In
generator-only mode, the ripple is as large
as ±7V about the DC steady state voltage.
In normal mode, it is somewhat lower,
±2V around the steady state DC voltage.
The MIL-STD-1275D specification provides explicit test conditions and recommends a set of frequencies for testing.
In addition to normal mode and generator-only mode, MIL-STD-1275D defines
starting mode, which describes the
voltage variations caused by the engine
starter and cranking. Figure 4 appears
in the MIL-STD-1275D specification. It
begins at the steady-state DC voltage
and then drops as low as 6V during the
“Initial Engagement Surge.” Within
one second it rises to the “Cranking
Level” which has a 16V minimum voltage. It returns again to the steady
state DC voltage within 30 seconds.
MIL-STD-1275D stipulates that the system withstand polarity reversal without harm. Such a condition can occur
during a jump start, if the jumper
cables are connected backwards.
MIL-STD-1275D in turn refers to another
standard, MIL-STD-461—regarding electromagnetic compatibility requirements—
which is beyond the scope of this article.
April 2014 : LT Journal of Analog Innovation | 17
During normal operation, the MOSFET is fully enhanced to minimize the power dissipated
in the MOSFET. When the input voltage rises during a surge or spike, a surge stopper
regulates the output voltage to provide safe, uninterrupted power to the load. Current
limit and timer features protect the external MOSFETs from more severe conditions.
SURGE STOPPER SOLUTION FOR
MIL-STD-1275D COMPLIANCE
Linear Technology’s surge stopper
products provide a compelling solution to MIL-STD-1275D compliance.
Alternative designs typically use shunt
clamps at the input, which can result
in damage or blown fuses during sustained overvoltage conditions.
Rather than shunt high energy levels to
ground using bulky passive components,
high voltage surge stoppers such as
the LTC4366 and LT4363 limit the output voltage using series MOSFETs when
faced with input voltage spikes and
surges. During normal operation, the
MOSFET is fully enhanced to minimize the
power dissipated in the MOSFET. When
the input voltage rises during a surge
or spike, a surge stopper regulates the
output voltage to provide safe, uninterrupted power to the load. Current limit
and timer features protect the external
MOSFETs from more severe conditions.
Surge
In MIL-STD-1275D, the worst-case MOSFET
power dissipation condition occurs during
the 100V input surge. The circuit shown
in Figure 5 regulates the output voltage
to 44V. As a result, the circuit must drop
56V from the 100V input to the 44V output.
In this MIL-STD-1275D solution, to increase
power available at the output, two series
MOSFETs are used. The first MOSFET’s source
is regulated to 66V by the LTC4366, while
the second MOSFET’s source is regulated to
44V by the LT4363. This reduces the power
that must be dissipated in either MOSFET.
18 | April 2014 : LT Journal of Analog Innovation
100V
100V
VIN
28V 43V
20V/DIV
VIN
28V
20V/DIV
VOUT 27V
4.3A
20V/DIV
IOUT
2A/DIV 2.7A
27V
VOUT 27V
20V/DIV
IOUT
2A/DIV 2.7A
43V
4.3A
RLOAD = 10Ω
100ms/DIV
Figure 6. MIL-STD-1275D 100V/500ms
surge test
Figures 6 and 7 show the results measured during surge testing. The oscilloscope waveform in Figure 6 shows
this circuit operating through the full
100V/500ms MIL-STD-1275D surge requirement described earlier. Figure 7 shows
this circuit operating through the less
stringent 100V/50ms pulses described in
MIL-STD-1275D’s recommended tests.
Spike
The +250V spike condition is handled
by MOSFET M1, which is rated to withstand over 300V from drain to source.
MIL-STD-1275D specifies that the
input energy is limited to 15mJ, well
within the capabilities of this MOSFET.
Figure 8 shows that a +250V spike at
the input is blocked from the output.
Similarly, the –250V spike test result is
shown in Figure 9. In this condition,
diode D1 is reverse biased during the
–250V spike, blocking the spike from M2
and the output. D1 also provides reverse
polarity protection, preventing negative
RLOAD = 10Ω
500ms/DIV
Figure 7. MIL-STD-1275D 100V/50ms surge
repeated five times
input voltages from appearing at the
output. (The LTC4366 surge stopper in
front of D1 is capable of withstanding reverse voltages and the –250V spike
without additional protection.)
An optional bidirectional transient voltage suppressor (TVS) is present at the
input to provide extra protection. Its
150V breakdown voltage does not affect
circuit operation below 100V. For applications where a TVS is not desirable at
the input, this optional component can
be removed. Note that in Figures 8 and
9, the output voltage trace (VOUT) during the MIL-STD-1275D spike shows high
frequency ringing, which is a measurement artifact of the large currents that
flow in supply and ground traces when
a 0.1µ F test capacitor is discharged
directly at the circuit input with all
resistances and inductances minimized.
design features
Even when the maximum transient power dissipation
(such as during a high voltage surge) exceeds the
capability of a single MOSFET, multiple series MOSFETs
can be used to support higher power levels.
RLOAD = 10Ω
250V SPIKE
IOUT 2.7A
5A/DIV
VOUT 27V
50V/DIV
28V
V
35V
VIN
5V/DIV
IN
28V
50V/DIV
21V
34V
VIN
28V
50V/DIV
−250V SPIKE
VOUT 27V
50V/DIV
IOUT 2.7A
5A/DIV
VOUT
5V/DIV 27.15V
20.3V
IOUT
1A/DIV 2.715A
1µs/DIV
Figure 8. Positive input spike
1µs/DIV
Figure 9. Negative input spike
RLOAD = 10Ω
10ms/DIV
Figure 10. 14VP–P input ripple condition
Ripple
Thermal
CONCLUSION
Satisfying the ripple specification of
MIL-STD-1275D requires a few more
components. Diode D1 in combination with capacitors C1–C12 form
an AC rectifier. This rectified signal appears at the DRAIN2 node.
Finally, thermal protection is implemented by components Q1, Q2, R1–R4
and thermistor RTHERM . If the temperature at M2’s heat sink (HS3) exceeds
105°C, the LT4363’s UV pin is pulled
down by Q2A to force off MOSFET M2
and limit its maximum temperature.
Linear Technology’s surge stopper products simplify MIL-STD-1275D compliance
by using MOSFETs to block high voltage
input surges and spikes while providing uninterrupted power to downstream
circuitry. Blocking the voltage with
series components avoids the blown
fuses and damage that can occur when
circuits attempt to shunt high energy to
ground with bulky passive components.
Additionally, this article has shown that
even when the maximum transient power
dissipation (such as during a high voltage
surge) exceeds the capability of a single
MOSFET, multiple series MOSFETs can be
used to support higher power levels. n
The LT4363 in combination with sense
resistor RSENSE limits the maximum current
to 5A (typical). If the rising edge of the
input ripple waveform attempts to pull
up the output capacitor with more than
5A, the LT4363 momentarily limits the
current by pulling down on M2’s gate.
To quickly restore the gate voltage, the
small charge pump formed by components D3–D4, C13–C15 supplements
the LT4363’s internal charge pump to
quickly pull up MOSFET M2’s gate. Even
so, the available load current must be
reduced to 2.8A during this ripple condition. Figure 10 shows that the output
remains powered during ripple testing.
It should be noted that with the specified components, this circuit is only
guaranteed to work down to a minimum
of 8V during the starting mode initial
engagement surge rather than the minimum 6V specified in MIL-STD-1275D.
Typically, an EMI filter is placed at
the input of MIL-STD-1275D compliant systems—while surge stoppers do
not eliminate the need for filtering,
their linear mode operation introduces no additional noise.
April 2014 : LT Journal of Analog Innovation | 19
What’s New with LTspice IV?
Gabino Alonso
World Tour
www.linear.com/LTspiceEvents
New Video: “AC Analysis”
www.linear.com/solutions/4581
LTspice IV WORLD CIRCUIT SEMINAR
TAKES WORLD TOUR
BLOG BY ENGINEERS, FOR
ENGINEERS
Mike Engelhardt, the creator of LTspice, is
embarking on a world tour to teach the ins
and outs of LTspice in a series of free halfday seminars. Each seminar will cover how
to quickly simulate switch mode power
supplies, compute efficiencies and observe
power supply start-up behavior and transient response. You will also learn how to
use LTspice as a general-purpose SPICE simulator for AC analysis, noise analysis and
circuit simulations. The presentation
includes perspectives on the inner workings of LTspice IV and its capabilities.
Check out the LTspice blog
(www.linear.com/solutions/LTspice)
for tech news, insider tips and interesting points of view regarding LTspice.
For more information on these
upcoming seminars, please visit
www.linear.com/LTspiceEvents.
New Video on the Blog: “AC Analysis”
— the latest video topic is available
at www.linear.com/solutions/4581.
Sometimes the frequency response of a
circuit is more important than looking at
the individual voltages or currents at a
specific part of the schematic. LTspice can
help you achieve this with its AC analysis
function. This video shows how to perform a basic AC analysis in LTspice as well
as pointing out some new capabilities.
SELECTED DEMO CIRCUITS
For a complete list of example simulations utilizing Linear Technology’s devices,
please visit www.linear.com/democircuits.
What is LTspice IV?
LTspice® IV is a high performance SPICE
simulator, schematic capture and waveform
viewer designed to speed the process of power
supply design. LTspice IV adds enhancements
and models to SPICE, significantly reducing
simulation time compared to typical SPICE
simulators, allowing one to view waveforms for
most switching regulators in minutes compared
to hours for other SPICE simulators.
LTspice IV is available free from Linear
Technology at www.linear.com/LTspice. Included
in the download is a complete working version of
LTspice IV, macro models for Linear Technology’s
power products, over 200 op amp models, as
well as models for resistors, transistors and
MOSFETs.
20 | April 2014 : LT Journal of Analog Innovation
Step-Down Regulators
• LT8610AB: 5V 2MHz µPower step-
down converter with light load
efficiency (5.5V–42V to 5V at 3.5A)
www.linear.com/LT8610A
• LTM®4624: 4A step-down µModule®
regulator (4V–14V to 1.5V at 4A)
www.linear.com/LTM4624
• LTM4644: Quad 4A step-down µModule
regulator (4V–14V to 3.3V, 2.5V, 1.5V and
1.2V at 4A) www.linear.com/LTM4644
• LTM4649: 10A step-down µModule
regulator (4.5V–16V to 1.5V at 10A)
www.linear.com/LTM4649
Isolated Controller
• LTC3765 & LTC3766: 120W isolated
forward converter with synchronous
rectification (9V–36V to 12V at 10A)
www.linear.com/LTC3765
Boost Regulators
• LT3905: Adjustable APD bias supply
(2.7V–12V to 54V at 1m A)
www.linear.com/LT3905
• LTC3862-1: High power, high voltage,
4-phase boost converter (6V–36V to
50V at 10A) www.linear.com/LTC3862-1
Inverting Regulators
• LTC3805-5 & LT1797: Positive-to-negative
Cuk converter (8V–16V to −12V at 3A)
www.linear.com/LTC3805-5
• LTC3863: Low IQ inverting DC/DC converter
(4.5V–16V to −12V at 1A)
www.linear.com/LTC3863
Constant Current, Constant Voltage
Regulators
• LT3795: Short-circuit robust
boost LED driver with spread
spectrum frequency modulation
(8V–60V to 87V LED string at 400m A)
www.linear.com/LT3795
• LTC4000-1 & LT3845A: Battery charger
for three LiFePO4 cells with a solar
panel input (20V–60V to 10.8V float at
10A max) www.linear.com/LTC4000-1
Overvoltage and Overcurrent Protection
• LTC4366-2: Surge protected automotive
V supply
(9V–100V to 18V clamp at 4A)
12
www.linear.com/LTC4366
design ideas
For up-to-date information on models, demo circuits, events and user tips:
—Follow @LTspice on Twitter www.twitter.com/LTspice
—Like us on Facebook at facebook.com/LTspice
Operational Amplifiers
• LT6105: Current sense monitor for
+15V and −15V supplies (0A to 2A) and
www.linear.com/LT6105
• LTC6090 & LTC2054: µV preamplifier
for a digital voltmeter
www.linear.com/LTC6090
SELECT MODELS
Linear Regulators
• LT3086: 40V, 2.1A low dropout adjustable
linear regulator with monitoring
and cable drop compensation
www.linear.com/LT3086
Buck Regulators
• LTC3875: Dual, 2-phase, synchronous
controller with low value DCR sensing
and temperature compensation
www.linear.com/LTC3875
• LTM4633: Triple 10A step-down
SIMULATING TRANSFORMERS
Here is the simple approach to simulate a transformer
in LTspice:
1.Draft an inductor for each transformer winding
2.Couple them using a single mutual inductance (K)
statement via a SPICE directive:
K1 L1 L2 L3 1
The last entry in the K statement is the coupling
coefficient, which can vary between 0 and 1,
where 1 represents no leakage inductance. For
practical circuits, it is recommended you start with
a coupling coefficient of 1.
4.LTspice simulates the transformer using individual
component values, in this case, the inductance of
the individual inductors, not the turns ratio of the
transformer. The inductance ratio corresponds to
the turns ratio as follows:
L PRIMARY
L SECONDARY
 N
2
=  PRIMARY 
 N SECONDARY 
For example, for a 1:3 turns ratio, enter inductance
values to produce a one to nine ratio:
Only a single K statement is needed per
transformer; LTspice applies a single coupling
coefficient to all inductors within a transformer. The
following is an equivalent to the statement above:
K1 L1 L2 1
K2 L2 L3 1
K3 L1 L3 1
3.Adjust the inductor positions to match the
transformer polarity by using move (F7), rotate (Ctrl
+ R) and mirror (Ctrl + E) commands. Adding the K
statement displays the phasing dot of the included
inductors.
For more information on how to
simulate a transformer see the video at
www.linear.com/solutions/1079
Happy simulations!
DC/DC µModule regulator
www.linear.com/LTM4633
Power User Tip
Constant Current/Constant Voltage
Regulators
• LT3797: Triple output LED driver controller
www.linear.com/LT3797
• LTC4020: 55V buck-boost multi-chemistry
battery charger www.linear.com/LTC4020
Energy Harvesting
Transceivers
• LTC3330: µPower buck-boost DC/DC with
• LTC2862, LTC2863, LTC2864 &
energy harvesting battery life extender
www.linear.com/LTC3330
Wireless Power Transfer
Overvoltage & Overcurrent Protection
• LTC4120: Wireless power receiver
• LTC4365-1: Overvoltage, undervoltage
and 400m A buck battery charger
www.linear.com/LTC4120
and reverse supply protection controller
www.linear.com/LTC4365
LTC2865: ±60V fault protected
3V to 5.5V RS485/RS422 transceivers
www.linear.com/LTC2865
Operational Amplifiers
• LT6238: Rail-to-rail output 215MHz ,
V/√Hz op-amp/SAR-ADC driver
www.linear.com/LT6238 n
1.1n
April 2014 : LT Journal of Analog Innovation | 21
Boost-then‑Buck LED Drivers Enable Wide PWM Dimming
Range with Wide-Ranging Input Voltages
Keith Szolusha and Taffy Wong
Multichannel LED drivers are primarily designed to power
multiple LEDs or multiple LED strings, sometimes of different
colors or lengths, from a single IC. These drivers, however,
include a number of features that allow for other compelling
uses. The LT3797 3-channel LED driver, for instance, can
be configured to produce boost-then-buck capability with
one channel as a boost voltage preregulator while the other
two channels are configured as buck mode LED drivers.
When the input voltage source is wideranging and can be both above and below
the LED string rating, a buck-boost or
SEPIC topology is commonly used. These
compared to buck-only converters, and
lower efficiency and higher conducted
EMI compared to boost-only regulators.
One way to avoid these problems is to
boost a wide-ranging input with a voltage preregulator and use that as the input
to a buck-only LED driver. This has the
advantages of step-up and step-down,
high PWM dimming bandwidth, and
lower conducted EMI. Since the LT3797
has three channels that can be used
for either voltage regulation or driving
LEDs, one channel can be used to boost
the input voltage to a higher voltage,
topologies have some disadvantages when
compared to buck-only or boost-only regulators: namely, lower efficiency and bandwidth (reduced PWM dimming capability)
Figure 1. LT3797 triple LED driver configured as 3 × 50V 1A boost LED drive
VIN
2.5V TO 40V
(50V TRANSIENT)
+
4.7µF
×3
33µF
50V
ALUMINUM
ELECTROLYTIC
L1
10µH
L2
10µH
D1
ISP1
RLED1
0.25Ω
COUT1
4.7µF
100V
×3
RLED2
0.25Ω
GATE1
VIN
1µF
RLED3
0.25Ω
SENSEP1 SENSEN1 TG1
M5
1A*
50V
RSENSE2
8mΩ
GATE2 SENSEP2 SENSEN2 TG2
1A*
50V
RSENSE3
8mΩ
GATE3 SENSEP3 SENSEN3 TG3
ISN1–ISN3
ISP1–ISP3
23.2k
LT3797
EN/UVLO
OVLO
VREF
VREF V
IN
SYNC PIN
INPUT SIGNAL
(OR TIE TO PWM1–PWM3)
PWM PIN
INPUT SIGNAL
22 | April 2014 : LT Journal of Analog Innovation
CTRL1–
CTRL3
1M
147k
PWM1–
SYNC PWM3 RT
RT
47.5k
0.1µF
310kHz
SS1–
SS3
COUT3
4.7µF
100V
×3
ISN3
M6
D6
LED3+
M3
1A*
50V
100k
105k
ISP3
ISN2
M4
D5
LED2+
M1
RSENSE1
8mΩ
D3
COUT2
4.7µF
100V
×3
ISP2
ISN1
M2
D4
LED1+
*ILED IS REDUCED
FOR VIN BELOW 9V
L3
10µH
D2
FLT1–
FLT3
FBH1–FBH3
SW1 SW2
100k
INTVCC
D1–D3: DIODES INC. PDS360
D4–D6: VISHAY SILICONIX ES1B
L1–L3: COILTRONICS HC9-100-R
LPWR: COILTRONICS SD25-470
M1, M3, M5: INFINEON BSC039N06NS
M2, M4, M6: VISHAY SILICONIX Si7113DN
LPWR
47µH
BOOST
INTVCC
GND
INTVCC
0.1µF
10µF
VC1–VC3
3.9k
6.8nF
1M
design ideas
Higher PWM dimming ratios can be achieved by a buck LED driver than by a
boost mode driver. To achieve high LED dimming ratios from a wide-ranging input,
low input voltages can be boosted to an intermediate voltage with a preregulator.
The intermediate, boosted output serves as input to buck-mode LED drivers.
Figure 2 shows a boost-then-buck scheme achieved using a single LT3797.
which can then be used to power two
high bandwidth buck mode LED drivers
produced using the other two channels.
2.5V–40V VIN range and 100V output
range give the LED driver high voltage
and power capability. It can be used in
automotive and industrial applications
as well as battery-powered devices.
independently of the other channels, but
they share clock phase. LED current, open
LED protection, analog and PWM dimming
control can be controlled independently.
TRIPLE LED DRIVER (MULTITOPOLOGY, HIGH EFFICIENCY)
The high side feedback pin, FBH, provides versatile overvoltage protection
in both buck mode and buck-boost
mode when the LED string does not
return to GND, eliminating the need for
a level-shifting feedback transistor. The
The LT3797 is a triple LED driver controller IC that can be used to power three
strings of LED current in several topologies, including boost, buck mode, buckboost mode, and SEPIC. Each channel runs
Figure 1 shows a 93%-efficient triple boost
LED driver powering three 50W (50V, 1A)
LED strings from an automotive input.
It features 250:1 PWM dimming at 120Hz
and short-circuit protection. An internal
Figure 2. LT3797 double boost-then-buck LED driver with 1000:1 PWM dimming ratio
VIN
9V TO 40V
(50V TRANSIENT,
41V INTERNAL
OVLO PROTECTION)
L3
5.6µH
+
VBOOST
50V
D3
+
CIN2
4.7µF
50V
×2
CIN1
47µF
50V
ALUMINUM
ELECTROLYTIC
CBOOST(OUT)
56µF
63V
ALUMINUM
ELECTROLYTIC
×2
ISP2
CBUCK(IN)
4.7µF
100V
×2
ISP1
0.25Ω
0.25Ω
ISN2
TG2
M5
TG1
LED2+
CBUCK2(OUT)
10µF
1A
50V
×2
LED1+
VLED
35V
VLED
35V
LED2–
31.6k
1M
FBH2
D2
M3
25.5k
0.004Ω
1M
ISN1
M4
1A
CBUCK1(OUT)
10µF
50V
×2
LED1–
L2
33µH
1M
L1
33µH
M2
31.6k
FBH1
D1
M1
0.04Ω
0.04Ω
N/C
CVIN
1µF
GATE3 SENSEP3 SENSEN3
VIN
TG3
ISP3 ISN3
FBH3
SENSEN2 SENSEP2 GATE2 GATE1 SENSEP1 SENSEN1
499k
ISP1, ISP2
LT3797
EN/UVLO
69.8k
TG1, TG2
ISN2, ISN2
CTRL1
OVLO VREF CTRL3 CTRL2 SYNC PWM1 PWM2 PWM3 RT
10k
SS1
SS2
47.5k
310kHz
PWM DIMMING
120Hz, UP TO 1000:1
CIN1: NIPPON CHEMICON EMZA500ADA470MF80G
CBOOST(OUT): PANASONIC EEHZA1J560P
D1, D2: DIODES INC. PDS360
D3: DIODES INC. PDS560
SS3
1µF
FBH1, FBH2
FLT1–
FLT3 SW1 SW2
0.22µF
100k
BOOST
L4
47µH
INTVCC
GND
0.1µF
VC1
VC2
15k
10µF
6.8nF
VC3
15k
1nF
22nF
INTVCC
L1, L2: WÜRTH 744071330 33µH
L3: WÜRTH 7443557560 5.6µH
L4: COOPER SD25-470-R
M1, M2, M3: INFINEON BSC028N06N53 60VDS
M4, M5: VISHAY SILICONIX Si7415DN 60VDS
April 2014 : LT Journal of Analog Innovation | 23
An extra benefit of the boost-then-buck mode driver is the reduced conducted EMI versus
a similarly rated buck-boost regulator. Boost converters typically have lower conducted
EMI around the AM band than buck converters due to the location of the main inductor
in series with the input. In a boost-then-buck scheme, the inductor is in series with the
input, versus a buck-boost single inductor between the buck and boost stages.
50V, VBOOST
500mV/DIV
(AC-COUPLED)
1.5V (100%)
CTRL1
1V/DIV
700mV (50%)
1A (100%)
ILED
500mA/DIV
500mA (50%)
500µs/DIV
buck-boost INTVCC supply delivers 7.8V of
gate charge to the power switches, even
when VIN drops down to 2.5V, making
this a very wide input range converter.
DUAL BOOST-THEN-BUCK MODE
LED DRIVER
The highest PWM dimming ratios can be
achieved by a buck LED driver, which
offers the highest operating bandwidth.
To achieve high LED dimming ratios
from a wide-ranging automotive input
voltage, the automotive voltage must
first be boosted with a preregulator.
The boosted output voltage can then be
applied as input to buck-mode LED drivers. Figure 2 shows how this can be
achieved with a single IC by using one of
the channels of the LT3797 as the boost
preregulator with the other two channels acting as buck mode LED drivers.
Besides reduced component count and
cost, the advantage of this single-IC scheme
24 | April 2014 : LT Journal of Analog Innovation
Figure 3. Analog dimming transient from 50%
(500mA) to 100% (1A) full-scale current shows high
bandwidth of buck mode, even as the boost stage
recovers at its own, regular speed.
over adding a separate boost IC as a preregulator, is that the PWM pin of the boost
regulator can be used to both disable
switching and freeze the state of the control loop during PWM off-time. This allows
the boost converter to quickly return
to its previous PWM on state without its
output collapsing when the buck mode
LED drivers are turned back on. If PWM of
the boost is not turned off during PWM offtime, or if a separate boost IC is used, then
the bandwidth of the boost converter can
limit the maximum PWM dimming ratio.
An extra benefit of the boost-then-buck
mode driver is the reduced conducted
EMI versus a similarly rated buck-boost
regulator. Boost converters typically have
lower conducted EMI around the AM band
than buck converters due to the location
of the main inductor in series with the
input. In a boost-then-buck scheme, the
inductor is in series with the input, versus
a buck-boost single inductor between the
buck and boost stages. Although the basic
buck-boost topology requires only a single
inductor, a second input filter inductor is
often required to reduce conducted EMI in
high-powered LED driver applications.
The LT3797 dual boost-then-buck
LED driver shown in Figure 2 powers two
35W (35V, 1A) LED strings directly from
an automotive input. It features 1000:1
PWM dimming ratio at 120Hz. It also
includes short-circuit protection and open
LED protection. All three PWM dimming
input pins are tied to the same PWM dimming input in order to maximize the
PWM dimming ratio and freeze the state
of the control loops of all three channels when PWM is off. The output of the
boost channel is a regulated 50V. A higher
boost output voltage would yield even
higher PWM dimming ratios, but at the
cost of requiring higher-voltage-rated
power components and reduced efficiency.
The two buck mode LED driver channels power the two 1A, 35V LED strings
from 50V input with high efficiency.
Total converter efficiency is 87%.
HIGH PWM DIMMING RATIO
As mentioned above, buck and buck
mode LED drivers offer higher bandwidth
than boost topology drivers (including
design ideas
The LT3797 dual boost-then-buck LED driver shown in Figure 2 powers two 35W (35V, 1A)
LED strings directly from an automotive input. It features 1000:1 PWM dimming ratio at
120Hz. It also includes short-circuit protection and open LED protection. All three PWM
dimming input pins are tied to the same PWM dimming input in order to maximize the PWM
dimming ratio and freeze the state of the control loops of all three channels when PWM is off.
VBOOST (50V)
1V/DIV
(AC COUPLED)
IL1
1A/DIV
ILED
1A/DIV
VIN = 12V
2µs/DIV
buck-boost and SEPIC converters), and
therefore a higher possible PWM dimming ratio. Unlike boost topologies,
where the output temporarily receives
less energy as duty cycle is increased in
order to raise inductor current during
a transient, buck topologies continue
to deliver increased energy to the output when duty cycle is increased. The
control loop of the buck converter can
be optimized at a higher bandwidth for
this reason, separate from the boost.
Additionally, during PWM dimming, at the
beginning of each cycle, inductor current
in a buck regulator does not need to ramp
up as far as it must for a boost regulator, since its current is approximately
equal to the LED current and not higher.
This gives buck converters an advantage
over boost converters in both transient
response and PWM dimming ratio. As long
as the boost preregulator does not lose its
output charge during transients, a boostthen-buck mode converter can mimick the
high bandwidth of the buck converter.
Figure 4. Dual boost-then-buck mode LED driver
PWM dimming waveform. 1000:1 dimming at 120Hz.
SHORT AND OPEN LED PROTECTION
The LT3797 LED drivers shown in Figures
1 and 2 are short-circuit proof. The
high-side PMOS disconnects are not only
used for PWM dimming, but also for
short-circuit protection when an LED+
terminal is shorted to ground. Unique
internal circuitry monitors when the
output current is too high, and turns
off the disconnect PMOS on that channel and reports a fault. Similarly, if an
LED string is removed or opened, the
IC limits its maximum output voltage
on that channel and reports a fault.
CONCLUSION
The LT3797 is a 2.5V–40V input and up
to 100V output triple LED driver that
can be used in many topologies. When
step-up and step-down is needed, for the
highest PWM dimming ratio of 1000:1
or higher, one channel can be used as a
voltage boost preregulator and the other
two channels can be used as buck mode
LED drivers. Short-circuit protection is
available in all topologies, making this
IC a robust and powerful solution for
driving LEDs in many applications. n
April 2014 : LT Journal of Analog Innovation | 25
Low Cost isoSPI Coupling Circuitry for High Voltage High
Capacity Battery Systems
Jon Munson
The isoSPI™ feature built into the LTC6804 battery
stack monitor, when combined with an LTC6820 isoSPI
communications interface, enables safe and robust
information transfer across a high voltage barrier. isoSPI is
particularly useful in energy storage systems that produce
hundreds of volts via series-connected cells, which require
full dielectric isolation to minimize hazards to personnel.
In a typical isoSPI application (Figure 1)
pulse transformers provide the dielectric isolation and reject common-mode
interference that can be impressed on
the wiring. The isoSPI function operates
with readily available and inexpensive
Ethernet LAN magnetics, which typically
include a common-mode-choke section (as shown in Figure 1) to improve
common-mode line noise, along with the
usual 100Ω line termination resistors and
common-mode decoupling capacitors.
Ordinary signal transformers, including
Ethernet and gate-driver types, are wound
with enameled wire that can have pin-hole
sized insulation defects, which expose
the copper to the atmosphere, inherently
limiting the inter-winding bias that for
which such transformers are certified.
Such units are tested in production with
high potential (called hi-pot screening)
to identify gross insulation problems,
typically with 1.5kV. This is established
as a safe design margin for long-term
bias of 60V, since the tiny corrosion sites
tend to require more than 60V to form
conductive paths between windings.
Figure 1. Generalized isoSPI point-to-point link
LTC6820
IP
IM
RT
TC
TF
TC
CF
LTC6804
IP
ILM
RT
TF
CF
PROBLEM:
HIGH VOLTAGE = HIGH COST
For battery-stack voltages in the
400V range, good design practice is to
specify transformers with reinforced
(double) insulation and hi-pot testing to
3750V or higher. Such transformers are
difficult to find as small parts due to the
creepage (surface distance) and clearance
(air spacing) dimensions required, and they
are relatively expensive. isoSPI is applied in
battery systems up to 1kV, which requires
transformers with hi-pot testing to 5kV for
conservative design margin. At this level,
isolation components can become bulky,
costly, and compromise pulse fidelity.
SOLUTION: DIVIDE AND CONQUER
One alternative to using reinforced transformers is to separate the bias requirement
from the magnetics by moving the extra
insulation to coupling capacitors instead.
While capacitors alone could provide a
seemingly complete isolation option, they
offer neither common-mode rejection nor
the shock-resistant isolation characteristics
that transformers offer, so an L-C approach
is actually optimal. In this way capacitors
charge to the nominal DC bias and leave
the transformer to handle transients, for
which even ordinary units are well suited.
FLOATING GROUND
Figure 2. AC-coupled isoSPI point-to-point link for increased voltages
LTC6820
IP
IM
RT
TF
TC
CF
RB
26 | April 2014 : LT Journal of Analog Innovation
CC(A)
TC
TF
RT
CF
CC(B)
RB
FLOATING GROUND
LTC6804
IP
ILM
The coupling capacitors are biased by
high value resistors, generally tied to
the transformer center-tap connection,
as shown in Figure 2. As a bonus, if the
DC current of the biasing resistors is
monitored, then any dielectric breakdown
becomes a detectable fault. The resistance
is chosen to be a high value, like 10MΩ,
design ideas
DLW43SH101XK2
≈
DLW43SH101XK2
Figure 3. Using two common-mode-chokes as a center-tapped isoSPI transformer
CC2(A)
TC1(A)
TC2(A)
TF1
IP
TF2
IP
LTC6820
LTC6804
IM
CC2(B)
100Ω
27pF
100Ω
TC1(B)
TC2(B)
10M
10M
ILM
27pF
FLOATING GROUND
CC: GCJ43DR72J333KXJ1L (33nF/630V)
TC: DLW43SH101XK2
TF: ACT45B-220-2P-TL003
Figure 4. Complete high voltage isoSPI point-to-point link
so that fault currents are within the fine
wire rating of the transformers and the
shock hazard to personnel is minimal.
Eliminating the high voltage requirement
from the transformer magnetic design
enables a number of relatively low cost
options. One is to simply use appropriately approved Ethernet transformers.
Another is to use other off-the-shelf low
profile magnetics to reduce component
height and part mass (reducing solder
fatigue issues). These can be installed
via surface-mount automated assembly
methods like any other part, reducing
production costs. A good candidate with
these features is the discrete commonmode-choke (CMC), a transformer structure that is ordinarily used as a filtering
element. Such parts are available up to
100µ H and carry approvals for use with
automotive systems, making them desirable for isoSPI configurations as well.
Suitable CMCs are inexpensive. They can be
quickly and easily produced as a machinewound wire pair on a chip-sized ferrite
form. Although isoSPI designs require
somewhat higher inductance to effectively
pass the longer pulse waveforms, adequate
inductance can be achieved by using two
of the chokes with windings in series to
Figure 5. High voltage daisy-chain isoSPI link with isolated wiring
TC1(A)
CC1(A)
CC2(A)
TC2(A)
TF1
IP
TF2
LTC6804-1
IP
LTC6804-1
10M
IHM
CC1(B)
100Ω
27pF
FLOATING GROUND
TC1(B)
10M
CC: GCJ43DR72J333KXJ1L (33nF/630V)
TC: DLW43SH101XK2
TF: ACT45B-220-2P-TL003
CC2(B)
10M
100Ω
TC2(B)
10M
ILM
27pF
FLOATING GROUND
produce 200µ H. This has the additional
benefit of forming virtual center-tap connections, which are useful for commonmode biasing and decoupling functions.
Figure 3 shows an equivalent transformer
model realized with two CMCs. The chokes
indicated have an 1812 SMT footprint
and bifilar windings (wires paired in
construction), so primary and secondary are intimately matched—minimizing the leakage inductance and thus
preserving high frequency performance.
Types with physically separated windings have poor pulse fidelity due to
excessive leakage inductance. The units
shown have a 50V DC continuous rating.
COMPLETE THE PICTURE
Figure 4 shows the complete circuit when
using the L-C solution with CMCs as the
transformers. Since the usual isoSPI application includes beneficial CMC filtering
sections (integrated in the case of standard LAN parts), this circuit includes a
recommended discrete part to retain that
function. The coupling capacitors are high
quality 10nF–33nF parts with an 1812
footprint (630V or 1kV rating). Here, we
assume that the LTC6820 is operating at
chassis ground potential, so that biasing of the twisted pair is at a safe level.
In situations where both ends of the
pair are at floating potentials, as in links
between daisy-chained LTC6804-1 modules, then capacitors can be used at both
ends of the link and the pair itself can
be biased to “earth” potential with high
value resistors to each line as shown
in Figure 5. Since the capacitors are in
April 2014 : LT Journal of Analog Innovation | 27
Use an AC-coupling method to mitigate the cost impact of high voltage isoSPI
systems, eliminating the double insulation requirement on magnetics. Cost can
be further reduced by replacing specialty toroidal transformer magnetics with
inexpensive bobbin-wound common-mode-choke (CMC) components. Both the
capacitors and CMCs are relatively low profile surface-mount chip components.
TC(A)
IP
LTC6804-1
IP
100Ω
IHM
ILM
TC(B)
27pF
Figure 6. Daisy-chain isoSPI link for same-board interconnections
LTC6804-1
100Ω
27pF
FLOATING GROUND
FLOATING GROUND
TC: DLW43SH101XK2
series in this situation, at least 22nF is
recommended (33nF/630V type shown).
Links between daisy-chained LTC6804-1s
on the same board do not need any
capacitor couplings since the potential is ordinarily < 50V, usually requiring only a single transformer section as
well (Figure 6) since the noise ingress
without a cable is far smaller.
HIGH VOLTAGE LAYOUT
The printed circuit layout should include
wide isolation spacing across the main
dielectric barrier, namely, the capacitors.
Figure 7 shows a placement example that
provides good high voltage performance,
with the blue regions representing frame
ground (left side, with twisted-pair connector) and IC common (right side).
between grounds). This facilitates
effective rinsing of flux residue under
the parts, and avoids moisture retention in the porous soldermask layer.
Note that the transformers must withstand
HV transient potentials, so clearance is
maintained there as well by using a 1206
size-biasing resistor. The HF decoupling
capacitor and impedance termination resistor can be small parts (0602 size depicted).
SPECIAL CONSIDERATIONS
FOR AN isoSPI BUS
Another good practice to avoid leakage current across the HV barrier is to
suppress soldermask in the area of the
HV components (parts over the “gap”
The previous circuits apply to point-topoint isoSPI links, but one of the important cases for providing a high voltage
solution is the bus-connected addressable LTC6804-2 with the twisted-pair link
passing through each “tap” connection,
as shown in Figure 8. The bus application places a high voltage requirement
on every transformer since the same
Figure 7. Suggested printed-circuit layout for high voltage performance at an isoSPI interface
CC(A)
EARTH
GROUND PLANE
(BACK LAYER)
LTC6804
FLOATING GROUND PLANE
(BACK LAYER)
TC(A)
TC(A)
TF
isoSPI
CONNECTOR
RT
CC(B)
TO IC PINS
isoSPI
CONNECTOR
CC(A)
RB
CC(B)
TC(B)
TC(B)
RB
CF
FLOATING GROUND
28 | April 2014 : LT Journal of Analog Innovation
CF
TF
RT
TO IC PINS
design ideas
CC1A
TC1A
IP
LTC6820
IM
CT
100pF
RC1A
22Ω
TF1
TC2A
RC2A
22Ω
TF2
LTC6804-2
ILM
CC1B
27pF
Figure 8. Complete high voltage
isoSPI bus with echo control
IP
TC1B RC1B
22Ω
TC2B
RC2B
22Ω
10M
10M
CC3A
CC: GCJ43DR72J333KXJ1L (33nF/630V)
TC: DLW43SH101XK2
TF: ACT45B-220-2P-TL003
27pF
FLOATING GROUND
TC3A
RC3A
22Ω
TF3
IP
LTC6804-2
ILM
CC3B
TC3B
RC3B
22Ω
10M
CCnA
PULSE
250mV/DIV
27pF
FLOATING GROUND
TCnA
RCnA
22Ω
TFn
IP
LTC6804-2
ILM
CCnB
Figure 9. Modified pulse shaping for
echo control in isoSPI bus applications
RT
68Ω
RCnA
22Ω
40ns/DIV
twisted-pair potential must interface with
any voltage on the floating cell-stack.
The use of the CMC and AC-coupling
capacitors for added insulation is the
same as previously described, but we
suggest slightly different coupling circuitry to damp the multitude of reflections and provide a consistent wave
shape for communicating devices irrespective of their physical position in the
network. There are three differences:
•The LTC6820 termination is changed
to a 100pF capacitor (CT).
•Far-end termination is only applied
to the live bus (RT) and set to 68Ω (no
termination at any of the LTC6804-2s).
•22Ω coupling resistors (RC) are
used for all bus connections to
decouple stray capacitive loading.
These are shown in the Figure 8 circuit,
which again assumes the LTC6820 is
operating at a safe “earth” potential. The
modified waveforms are band-limited
to control distortion from reflections, so
the received pulses at the IC pins appear
more rounded as in Figure 9, but the
isoSPI pulse discriminator circuit works
fine with this filtered shaping and supports a full sixteen address bus. Depending
on actual losses encountered in a given
system, it may be necessary to lower the
pulse-detection thresholds for optimal
operation (configure thresholds to be
40%–50% of the differential signal peak).
Note that for networks of five or less
addresses, the reflections are generally
not a significant problem, so standard
resistive end-terminations can be retained
(namely 100Ω at the CTERM and RTERM positions of Figure 8, with the RC s omitted).
TCnB
10M
27pF
FLOATING GROUND
CONCLUSION
Use an AC-coupling method to mitigate the
cost impact of high voltage isoSPI systems,
eliminating the double insulation requirement on magnetics. Cost can be further
reduced by replacing specialty toroidal
transformer magnetics with inexpensive
bobbin-wound common-mode-choke
(CMC) components. Both the capacitors and CMCs are relatively low profile
surface-mount chip components that are
competitively priced and available with
automotive approvals for high reliability.
The biasing resistors for the AC coupling
offer a useful means of monitoring the
dielectric integrity of the system. n
April 2014 : LT Journal of Analog Innovation | 29
Ideal Diode Combines 200V Busses
Mitchell Lee
As the power consumption of individual cards increases in rack-mounted
systems, current consumption necessarily follows suit. A point is reached
where the current delivered by the backplane becomes untenable, and the only
solution is to increase the bus voltage. This point has been reached in even
some 48V systems, leading to the use of bus voltages exceeding 100V.
The LTC4359 ideal diode controller is used
in 12V, 28V and 48V battery, vehicular,
line operated and solar power systems as
a blocking diode and diode OR, achieving
substantially lower power and voltage
loss than is possible with a conventional
diode. Its 100V absolute maximum rating
would seemingly preclude use in higher
voltage applications, but with the addition of a simple source follower clamp,
this limitation is easily overcome.
When power is first applied, Q1’s body
diode passes current to the output. Q3, a
600V depletion mode device, turns on and
connects the output voltage directly to the
LTC4359’s OUT pin. The IN and OUT pins
sense VSD across Q1 and drive the GATE pin
in an attempt to hold the MOSFET’s “forward” drop to 30mV. This condition is
maintained up to about 1.5A, beyond
which Q1 is driven fully on and the voltage drop is dictated by its 20mΩ RDS(ON).
If VSD is less than 30mV, such as might
be the case if the output is pulled up by
a second, higher supply, the LTC4359’s
GATE pin turns the MOSFET off and blocks
reverse current flow. If the input voltage drops significantly below the output,
Q3’s source-follower action protects the
(continued on page 31)
Figure 1. An LTC4359-based ideal diode for 200V busses
Figure 1 shows a 200V, 7A ideal diode
realized with the LTC4359. Two or more
of these circuits are used to OR multiple
busses. Q1 serves as the pass element. At
7A load current, Q1’s dissipation is 1W; this
beats a conventional rectifier by a factor of
5 to 10 and results in a substantial savings
in board area. The LTC4359 is powered by
a shunt regulator comprising D1, R1A and
R1B. The use of large value resistors
is made possible by the LTC4359’s low,
200µ A maximum supply current. With the
values shown, the control circuit operates
down to 50V input, and consumes about
200mW with a 200V input. If low voltage operation is not important, R1A and
R1B can be increased to 200kΩ, reducing
the total control circuit dissipation to
100mW, or about 10% of the circuit’s total
dissipation when operating with a 7A load.
30 | April 2014 : LT Journal of Analog Innovation
RSNUB
1k
CSNUB
0.47µF
D2
ES1G
Q1
INPUT
200V
(250V MAX)
CLOAD
OUTPUT
7A
Q3
D4
DDZ9699T
D1, D2, D3, D4: DIODES INC.
RSNUB: NIC COMPONENTS NRCP12 SERIES
Q1: INFINEON IPB200N25N3G
Q3: INFINEON BSS126
10M
IN SOURCE
10nF
D1
DDZ9699
12V
SHDN
GATE
LTC4359
VSS
R1A
100k
R1B
100k
OUT
D3
DDZ9702
15V
new product briefs
New Product Briefs
16A µMODULE REGULATOR
CONFIGURABLE AS QUAD, TRIPLE,
DUAL OR SINGLE OUTPUT POWERS
FPGAs, ASICs & MICROPROCESSORS
The LTM4644 quad output step-down
µModule® regulator is configurable as
a single (16A), dual (12A, 4A or 8A, 8A),
triple (8A, 4A, 4A) or quad (4A each)
output regulator. This flexibility enables
system designers to rely on a single
compact µModule regulator for the
variety of voltage and load current
requirements of FPGAs, ASICs and microprocessors and other board circuitry.
The DC/DC controllers, power switches,
inductors and compensation components
are incorporated into the 9mm × 15mm
× 5.01mm BGA package. Eight external
ceramic capacitors (1206 or smaller
case sizes) and four feedback resistors
(0603 case size) complete four independently adjustable outputs between
0.6V to 5.5V. Separate input pins allow
the four channels to be powered from
different supply rails from 4V to 14V.
At an ambient temperature of 55°C, the
LTM4644 delivers up to 13A at 1.5V from
a 12V input or up to 14A with 200LFM airflow. The four channels operate at 90°
out-of-phase to minimize input ripple
whether at the 1MHz default switching
frequency or synchronized to an external
clock between 700kHz and 1.3MHz. With
the addition of an external bias supply
above 4V, the LTM4644 can regulate from
an input supply voltage as low as 2.375V.
QUAD PHY INTERFACE ENABLES
RUGGED MULTIPORT IO-LINK
MASTERS
Unique features of the LTC2874 include
automatic wake-up request (WURQ)
generation and an output supply currentboosting capability for slave start-up.
The WURQ generator produces self-timed
wake-up pulses of correct polarity, reducing demands on the microcontroller.
Safety mechanisms manage multiport
and repeat WURQs to prevent thermal
overload and maintain error-free communication. The current-boosting pulse
generator fully implements the startup current pulse requirements added
to the IO-Link v1.1.1 specification.
The LTC2874 IO-Link master IC provides
the power and communications interface
to four remote IO-Link devices (slaves).
A rugged interface and rich feature set
make the LTC2874 ideal for larger systems
implementing IO-Link (IEC61131-9) in
harsh, industrial environments. Managing
four slaves per master IC, the LTC2874
reduces board space, design complexity
and costs while increasing reliability.
The onboard Hot Swap controller and
external N-channel MOSFET in the power
interface protect connected devices from
inrush currents during start-up and
fault conditions. Integrated ±50V blocking diodes in the data line interface
protect against faults and high voltage excursions, making the LTC2874
well suited for the harsh PLC environment driving cables up to 20m long. n
its advantageous CGS /CRSS ratio, which
simplifies the gate drive requirements and·
precludes self-enhancement during Hot
Swap events. Because Q1 is operated in
triode, it is possible to parallel multiple
devices for higher power applications.
exceeded in high voltage systems where
circuit faults may impress the full supply across small, parasitic inductances.
Commutation spike energy is diverted
away from Q1 and stored in CSNUB,
then slowly dissipated by RSNUB.
Commutation spikes are clamped with a
simple diode reset snubber. Q1 is generously rated at 320mJ avalanche energy,
but the recommended peak avalanche
current is only 47A. This figure is easily
Maximum operating voltage is limited by Q1 to 250V. Q3 is rated to 600V.
Replacing Q1 with a suitable higher voltage unit and scaling R1A and R1B accordingly permits operation up to 600V. n
(LTC4359) continued from page 30)
LTC4359’s OUT pin by keeping it within
a few volts of the IN pin. Thus, it is Q3,
with help from the floating supply architecture of D1 and R1A /B, that permits
the 100V LTC4359 to operate comfortably at 200V. D3 is included to protect
against brief, dynamic conditions that
could otherwise damage Q3’s gate pin.
Q1, a 250V-rated component, is chosen
for its exceptional on-resistance of just
20mΩ. Another feature of this device is
April 2014 : LT Journal of Analog Innovation | 31
highlights from circuits.linear.com
L1A, 10µH
•
C4
2.2µF
VCC
4V TO
25V
VIN1
C7
2.2µF
•
C1
L1B
10µH
D1
80.6k
VIN2
C3
1µF
280k
C6
1µF
SHOUT
LT8471
C3
L3
15µH
FB1
E1
GND
10k
C5
2.2µF
C2
FB2
OV/UV
C8
1µF
SS1
182k
E2
SS2
SYNC RT
0.1µF
0.1µF
PG1
169k
PG2
100k
•
LT8471 500kHz ZETA AND 2L INVERTING CONVERTERS
GENERATES ±5V OUTPUTS WITH LOW OUTPUT RIPPLE
The LT®8471 is a dual PWM DC/DC converter containing two
internal 2A, 50V switches and an additional 500mA switch
to facilitate step-down and inverting conversion. Each 2A
channel can be independently configured as a buck, boost,
SEPIC, flyback or inverting converter. Capable of generating
positive and negative outputs from a single input rail, the
LT8471 is ideal for many local power supply designs.
www.linear.com/solutions/4711
C1
47µF
×3
10k
L2B, 10µH
•
L2A
10µH
VOUT1, –5V
0.55A (VCC = 4V)
0.95A (VCC = 12V)
1.05A (VCC = 24V)
D2
80.6k
C2
47µF
×3
VOUT2, 5V
0.55A (VCC = 4V)
0.95A (VCC = 12V)
1.05A (VCC = 24V)
100k
C1, C2: 10V, X7R, 1210
C3, C4, C5, C7: 35V, X74, 1206
C6, C8: 50V, X7R, 1206
D1, D2: MICROSEMI UPS140
L1, L2: COOPER BUSSMANN DRQ74-100-R
L3: WÜRTH 744025 150
LT3048-15 2.7V TO 4.8V VIN, 15V VOUT, 40mA LOW NOISE BIAS GENERATOR IN 2mm × 2mm DFN
10µH
IN
The LT3048-15 generates a low noise, low ripple bias supply from an input voltage of
2.7V TO 4.8V
2.7V to 4.8V. The LT3048-15 includes a boost regulator and a linear regulator. The boost
SW
BSTOUT
regulator provides power to the linear regulator. The boost regulator output voltage is
VIN
LDOIN
regulated to 1.1V above the LDO output, optimizing LDO ripple rejection and transient
1µF
LT3048-15
response. Fixed frequency operation and current mode control allow the use of very small
LDOOUT
inductors and results in low, predictable output ripple. The linear regulator in the LT304815 generates a fixed 15V output. High power supply ripple rejection, combined with a
OFF ON
BYP
EN
low noise internal reference, results in less than 500μVP-P output ripple and noise.
GND
http://www.linear.com/solutions/4547
VIN
5V
RS*
0.27Ω
CIN
10µF
VIN
CVIN*
10µF
CCAP
1µF
SW1
D1
VINM5
VINS
PFO
316k
FB
PFI
200k
D2
LTC3355
SW2
RSTB
CPGOOD
L2 3.3µH
+
BOOST
499k
EN_CHG
*OPTIONAL
100k
200Ω
VCAP
PFOB
24 HOURS
VOUT
3.3V
47µF 50mA (MAX)
BUCK VOUT
931k
MICROPROCESSOR
L1
4.7µH
CFB
MODE
INTVCC
1µF
ICHG
604k
VCBST
IBSTPK
909k
RC
154k
CC
220pF
1.4V
NiMH
2000mAhr
4.7µF
1nF
1µF
OUT
15V
VIN (V) IOUT (mA)
2.7
19
3.3
22
3.6
24
LTC3355 NiMH TRICKLE CHARGER AND
RIDE-THROUGH BACKUP SUPPLY
The LTC®3355 is a complete input power interrupt
ride-through DC/DC system. The part charges a
supercapacitor while delivering load current to
VOUT, and uses energy from the supercapacitor
to provide continuous VOUT backup power
when VIN power is lost. The LTC3355 contains
a nonsynchronous constant frequency current
mode monolithic 1A buck switching regulator
to provide a 2.7V to 5V regulated output
voltage from an input supply of up to 20V.
www.linear.com/solutions/4814
499k
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