A3962: Dual Full-Bridge PWM Motor Driver

3962
DUAL FULL-BRIDGE PWM MOTOR DRIVER
OUT 1B
1
SENSE 1
2
OUT 1A
3
20
OUT 2B
19
SENSE 2
Designed for pulse-width modulated (PWM) current control of
bipolar stepper motors, the A3962SLB is capable of continuous output
currents to ±800 mA and operating voltages to 30 V. Internal fixed
off-time PWM current-control circuitry can be used to regulate the
maximum load current to a desired value. An internal precision voltage
reference is provided to improve motor peak-current control accuracy.
The peak load current limit is set by the user’s selection of an external
resistor divider and current-sensing resistors.
T
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N RE 64
I
T
9
E
N
3
F
A
O
E
C
e
R
S R Se
I
D O —
F
1
2
VBB
18
OUT 2A
17
LOGIC
SUPPLY
4
GROUND
5
16
GROUND
GROUND
6
15
GROUND
V REF(IN)
7
14
V REF(OUT)
RC 1
89
13
RC 2
PHASE 1
9
12
PHASE 2
ENABLE 1
10
11
ENABLE 2
θ1
V CC
PWM 2
PWM 1
LOAD
SUPPLY
θ2
Dwg. PP-047-1
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, VBB . . . . . . . . . 30 V
Output Current, IOUT . . . . . . . . . . ±800 mA*
Logic Supply Voltage, VCC . . . . . . . . . 7.0 V
Logic Input Voltage Range,
VIN . . . . . . . . . . . -0.3 V to VCC + 0.3 V
Sense Voltage, VSENSE . . . . . . . . . . . . 1.0 V
Reference Output Current,
IREF OUT . . . . . . . . . . . . . . . . . . . 1.0 mA
Package Power Dissipation,
PD . . . . . . . . . . . . . . . . . . . . See Graph
Operating Temperature Range,
TA . . . . . . . . . . . . . . . . -20˚C to +85˚C
Junction Temperature, TJ . . . . . . . +150˚C†
Storage Temperature Range,
TS . . . . . . . . . . . . . . . -55˚C to +150˚C
The fixed off-time pulse duration is set by user-selected external
RC timing networks. The capacitor in the RC timing network also
determines a user-selectable blanking window that prevents false
triggering of the PWM current control circuitry during switching transitions. This eliminates the need for two external RC filter networks on
the current-sensing comparator inputs.
For each bridge the PHASE input controls load current polarity by
selecting the appropriate source and sink driver pair. For each bridge
the ENABLE input, when held high, disables the output drivers. Special power-up sequencing is not required. Internal circuit protection
includes thermal shutdown with hysteresis, transient-suppression
diodes, and crossover-current protection.
The A3962SLB is supplied in a 20-lead plastic SOIC with copper
heat sink tabs. The power tab is at ground potential and needs no
electrical isolation.
FEATURES
■
■
■
■
■
■
■
■
±800 mA Continuous Output Current Rating
30 V Output Voltage Rating
Internal PWM Current Control, Saturated Sink Drivers
Internally Generated Precision 2.5 V Reference
Internal Transient-Suppression Diodes
Internal Thermal-Shutdown Circuitry
Crossover-Current Protection, UVLO Protection
Automotive Capable
* Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified current rating or a junction tempera
ture of 150˚C.
† Fault conditions that produce excessive junction
temperature will activate the device’s thermal
shutdown circuitry. These conditions can be
tolerated but should be avoided.
Always order by complete part number: A3962SLB .
Data Sheet
29319.27
3962
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
ALLOWABLE PACKAGE POWER DISSIPATION in WATTS
3962
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
2.5
TRUTH TABLE
RθJT = 6°C/W
2.0
ENABLE
PHASE
OUTA
OUTB
H
X
Off
Off
L
H
H
L
L
L
L
H
1.5
RθJA = 60°C/W
1.0
X = Irrelevant
0.5
0
25
50
75
100
125
150
TEMPERATURE in °C
Dwg. GP-019-1
FUNCTIONAL BLOCK DIAGRAM AND TYPICAL
BIPOLAR STEPPER MOTOR APPLICATION
MOTOR SUPPLY
LOGIC SUPPLY
C BB
C CC
V CC
V BB
OUT 1A
OUT 2A
OUT 1B
OUT 2B
ENABLE 2
ENABLE 1
CONTROL LOGIC
AND LEVEL SHIFT
PHASE 1
BLANKING
TIME AND
SOURCE
DRIVER T OFF
CONTROL
RC1
CONTROL LOGIC
AND LEVEL SHIFT
+
UVLO
AND
TSD
_
REF OUT
SENSE 1
C T1
BLANKING
TIME AND
SOURCE
DRIVER T OFF
CONTROL
+
_
GND
RT1
VOLTAGE
REFERENCE
RS1
REF IN
PHASE 2
SENSE 2
RC 2
R1
R2
RS2
CT2
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 1995 Allegro MicroSystems, Inc.
RT2
3962
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 30 V, VCC = 4.75 V to 5.25 V, VSENSE = 0
V, 30 kΩ & 1000 pF RC to Ground (unless noted otherwise)
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
Operating, IOUT = ±800 mA, L = 3 mH
5.0
—
30
V
IOUT = ±800 mA, L = 3 mH
—
—
30 +VF
V
VOUT = VBB
—
<1.0
50
µA
VOUT = 0 V
—
<1.0
-50
µA
Source Driver, IOUT = -500 mA
—
1.0
1.2
V
Source Driver, IOUT = -750 mA
—
1.1
1.5
V
Source Driver, IOUT = -800 mA
—
—
1.7
V
Sink Driver, IOUT = +500 mA
—
0.3
0.6
V
Sink Driver, IOUT = +750 mA
—
0.5
1.2
V
Sink Driver, IOUT = +800 mA
—
—
1.5
V
IF = 500 mA
—
1.1
1.4
V
IF = 750 mA
—
1.3
1.6
V
IF = 800 mA
—
—
1.7
V
Output Drivers
Load Supply Voltage Range
Output Sustaining Voltage
Output Leakage Current
Output Saturation Voltage
Clamp Diode Forward Voltage
V BB
VCE(sus)
ICEX
VCE(SAT)
VF
(Sink or Source)
Motor Supply Current
IBB(ON)
VENABLE = 0.8 V
—
5.0
7.0
mA
(No Load)
IBB(OFF)
VENABLE = 2.4 V
—
5.0
7.0
mA
4.75
—
5.25
V
Control Logic
Logic Supply Voltage Range
VCC
Logic Input Voltage
VIN(1)
2.4
—
—
V
VIN(0)
—
—
0.8
V
Logic Input Current
Operating
IIN(1)
VIN = 2.4 V
—
<1.0
20
µA
IIN(0)
VIN = 0.8 V
—
<-2.0
-200
µA
Continued next page…
3962
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 30 V, VCC = 4.75 V to 5.25 V, VSENSE = 0
V, 30 kΩ & 1000 pF RC to Ground (unless noted otherwise) (cont.)
Limits
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Units
Reference Output Voltage
VREF OUT
VCC = 5.0 V, IREF OUT = 90 to 900 µA
2.45
2.50
2.55
V
Reference Output Current
I REF OUT
3 kΩ ≤ R D = R1 + R2 ≤ 15 kΩ
150
—
900
µA
Control Logic (Continued)
Ref. Input Offset Current
IOS
VREF IN = 1 V
-2.5
0
1.0
µA
Comparator Input Offset Volt.
VIO
VREF = 0 V
-6.0
0
6.0
mV
Comparator Input Volt. Range
VREF
Operating
-0.3
—
1.0
V
CT = 1000 pF, R T = 30 kΩ
27
30
33
µs
Comparator Trip to Source OFF
—
1.2
2.0
µs
CT = 1000 pF ± 5%, RT ≥ 15 kΩ, VCC = 5 V
—
2.5
3.6
µs
ENABLE ON to Source ON
—
3.2
—
µs
ENABLE OFF to Source OFF
—
1.2
—
µs
ENABLE ON to Sink ON
—
3.2
—
µs
ENABLE OFF to Sink OFF
—
0.7
—
µs
PHASE Change to Sink ON
—
3.2
—
µs
PHASE Change to Source ON
—
3.2
—
µs
PHASE Change to Sink OFF
—
0.7
—
µs
PHASE Change to Source OFF
—
1.2
—
µs
PWM RC Fixed Off-time
PWM Propagation Delay Time
tOFF RC
tPWM
PWM Minimum On Time
t ON (min)
Propagation Delay Times
tpd
IOUT = ±800 mA, 50% to 90%:
Thermal Shutdown Temp.
TJ
—
165
—
°C
Thermal Shutdown Hysteresis
∆TJ
—
15
—
°C
UVLO Disable Threshold
2.5
2.7
2.9
V
UVLO Hysteresis
0.7
0.9
1.1
V
Logic Supply Current
Logic Supply Current
Temperature Coefficient
ICC(ON)
VENABLE1 = VENABLE2 = 0.8 V
—
60
85
mA
ICC(OFF)
VENABLE1 = VENABLE2 = 2.4 V
—
11
17
mA
∆ICC(ON)
VENABLE 1 = VENABLE 2 = 0.8 V
—
0.18
—
mA/°C
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3962
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
FUNCTIONAL DESCRIPTION
Internal PWM Current Control. The A3962SLB contains
a fixed off-time pulse-width modulated (PWM) currentcontrol circuit that can be used to limit the load current to
a desired value. The peak value of the current limiting
(ITRIP) is set by the selection of an external current-sensing
resistor (RS ) and reference input voltage (VREF IN). The
internal circuitry compares the voltage across the external
sense resistor to the voltage on the reference input
terminal (VREF IN) resulting in a transconductance function
approximated by:
ITRIP ≈
V REF IN
RS
The reference input voltage is typically set with a
resistor divider from VREF OUT. To ensure proper operation
of the voltage reference, the resistor divider (RD = R1+R2)
should have an impedance of 3 kΩ to 15 kΩ. Within this
range, a low impedance will minimize the effect of the REF
IN input offset current.
The current-control circuitry limits the load current
as follows: when the load current reaches ITRIP, the
comparator resets a latch that turns off the selected source
driver. The load inductance causes the current to recirculate through the sink driver and flyback diode.
For each bridge, the user selects an external resistor
(RT) and capacitor (CT) to determine the time period
(tOFF = RTCT) during which the source driver remains
disabled (see “RC Fixed Off-time” below). The range of
recommended values for CT and RT are 1000 pF to
1500 pF and 15 kΩ to 100 kΩ respectively. For optimal
load current regulation, CT is normally set to 1000 pF
(see “Load Current Regulation” below). At the end of the
RC interval, the source driver is enabled allowing the load
current to increase again. The PWM cycle repeats,
maintaining the peak load current at the desired value.
RC Blanking. In addition to determining the fixed off-time
of the PWM control circuit, the CT component sets the
comparator blanking time. This function blanks the output
of the comparator when the outputs are switched by the
I AVG ≈
internal current-control circuitry (or by the PHASE or
ENABLE inputs). The comparator output is blanked to
prevent false over-current detections due to reverserecovery currents of the clamp diodes, and/or switching
transients related to distributed capacitance in the load.
During internal PWM operation, at the end of the tOFF
time, the comparator’s output is blanked and CT begins to
be charged from approximately 1.1 volts by an internal
current source of approximately 1 mA. The comparator
output remains blanked until the voltage on CT reaches
approximately 3.0 volts.
When a transition of the PHASE input occurs, CT
is discharged to near ground during the crossover delay
time (the crossover delay time is present to prevent
simultaneous conduction of the source and sink drivers).
After the crossover delay, CT is charged by an internal
current source of approximately 1 mA. The comparator
output remains blanked until the voltage on CT reaches
approximately 3.0 volts.
When the device is disabled, via the ENABLE input,
CT is discharged to near ground. When the device is
re-enabled, CT is charged by an internal current source of
approximately 1 mA. The comparator output remains
blanked until the voltage on CT reaches approximately
3.0 volts.
The minimum recommended value for CT is
1000 pF. This value ensures that the blanking time is
sufficient to avoid false trips of the comparator under
normal operating conditions. For optimal regulation of the
load current, the above value for CT is recommended and
the value of RT can be sized to determine tOFF. For more
information regarding load current regulation, see below.
Load Current Regulation. Because the device operates
in a slow decay mode (2-quadrant PWM mode), there is
a limit to the lowest level that the PWM current control
circuitry can regulate load current. The limitation is due
to the minimum PWM duty cycle, which is a function of the
user-selected value of tOFF and the minimum on-time pulse
tON(min)max that occurs each time the PWM latch is reset.
If the motor is not rotating, as in the case of a stepper
motor in hold/detent mode, a brush dc motor when stalled
or at startup, the worst case value of current regulation can
be approximated by:
[(VBB - VSAT(SOURCE+SINK) ) tON(min)max] – (1.05 (VSAT(SINK) + VF) tOFF)
1.05 (tON(min)max + tOFF) RLOAD
3962
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
where tOFF = RTCT, RLOAD is the series resistance of the
load, VBB is the motor supply voltage and t ON(min)max is
specified in the electrical characteristics table. When the
motor is rotating, the back EMF generated will influence
the above relationship. For brush dc motor applications,
the current regulation is improved. For stepper motor
applications when the motor is rotating, the effect is
dependent on the polarity and magnitude of the motor’s
back EMF.
dc servo motor applications as the transfer function
between the duty cycle on the PHASE input and the
average voltage applied to the motor is more linear than in
the case of ENABLE PWM control (which produces a
discontinuous current at low current levels).
The following procedure can be used to evaluate the
worst case internal PWM load current regulation in the
system:
Thermal protection circuitry turns OFF all drivers
should the junction temperature reach 165°C (typical).
This is intended only to protect the device from failures
due to excessive junction temperatures and should not
imply that output short circuits are permitted. The hysteresis of the thermal shutdown circuit is approximately 15°C.
Set VREF to 0 volts. With the load connected and the
PWM current control operating in slow decay mode, use
an oscilloscope to measure the time the output is low
(sink ON) for the output that is chopping. This is the
typical minimum on time (tON(min)typ) for the device. The
CT then should be increased until the measured value of
tON(min) is equal to tON(min)max as specified in the electrical
characteristics table. When the new value of CT has been
set, the value of RT should be decreased so the value for
tOFF = R TCT (with the artificially increased value of CT)
is equal to the nominal design value. The worst-case loadcurrent regulation then can be measured in the system
under operating conditions.
PWM of the Phase and Enable Inputs. The PHASE and
ENABLE inputs can be pulse width modulated to regulate
load current. Typical propagation delays from the PHASE
and ENABLE inputs to transitions of the power outputs are
specified in the electrical characteristics table. If the
internal PWM current control is used, the comparator
blanking function is active during phase and enable
transitions. This eliminates false tripping of the overcurrent comparator caused by switching transients
(see “RC Blanking” above).
Enable PWM. Toggling the ENABLE input turns ON and
OFF the selected source and sink drivers. The corresponding pair of flyback and ground clamp diodes conduct
after the drivers are disabled, resulting in fast current
decay. When the device is enabled the internal current
control circuitry will be active and can be used to limit the
load current in a slow decay mode.
Phase PWM. Toggling the PHASE terminal selects which
sink/source pair is enabled, producing a load current that
varies with the duty cycle and remains continuous at all
times. This can have added benefits in bidirectional brush
Miscellaneous Information. An internally generated dead
time prevents crossover currents that can occur when
switching phase.
APPLICATION NOTES
Current Sensing. The actual peak load current (IPEAK) will
be above the calculated value of ITRIP due to delays in the
turn off of the drivers. The amount of overshoot can be
approximated by:
IOS ≈
(VBB – [(ITRIP • RLOAD) + VBEMF]) tPWM
LLOAD
where VBB is the motor supply voltage, VBEMF is the backEMF voltage of the load, RLOAD and LLOAD are the resistance and inductance of the load respectively, and t PWM is
specified in the electrical characteristics table.
To minimize current sensing inaccuracies caused by
ground trace IR drops, each current-sensing resistor
should have a separate return to the ground terminal of the
device. For low-value sense resistors, the IR drops in the
PCB can be significant and should be taken into account.
The use of sockets should be avoided as their contact
resistance can cause variations in the effective value of
RS .
Generally, larger values of RS reduce the aforementioned effects but can result in excessive heating and
power loss in the sense resistor. The selected value of RS
should not cause the absolute maximum voltage rating of
1.0 V, for the SENSE terminal, to be exceeded. The
recommended value of RS is in the range of:
RS ≈
0.5
ITRIPmax
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
± 50%
3962
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
If desired, the reference input voltage can be filtered
by placing a capacitor from REFIN to ground. The ground
return for this capacitor as well as R2 should be independent from the high-current power-ground trace to avoid
changes in REFIN due to I•R drops.
Thermal Considerations. For reliable operation it is
recommended that the maximum junction temperature be
kept below 110 to 125°C. The junction temperature can
be measured best by attaching a thermocouple to the
power tab/batwing of the device and measuring the tab
temperature, TTAB . The junction temperature can then be
approximated by using the formula:
TJ ≈ TTAB + (ILOAD 2 V F RθJT)
where VF can be chosen from the electrical specification
table for the given level of ILOAD. The value for RθJT is
given in the package thermal resistance table for the
appropriate package.
The power dissipation of the batwing packages can
be improved by 20 to 30% by adding a section of printed
circuit board copper (typically 6 to 18 square centimeters)
connected to the batwing terminals of the device.
The thermal performance in applications that run
at high load currents and/or high duty cycles can be
improved by adding external diodes from each output to
ground in parallel with the internal diodes. Fast recovery
(≤200 ns) diodes should be used to minimize switching
losses.
The load supply terminal, VBB, should be decoupled
with an electrolytic capacitor (≥47 µF is recommended)
placed as close to the device as is physically practical.
To minimize the effect of system ground I•R drops on the
logic and reference input signals the system ground should
have a low-resistance return to the motor supply voltage.
See also “Current Sensing” and “Thermal Considerations” above.
Fixed Off-Time Selection. With increasing values of tOFF,
switching losses will decrease, low-level load current
regulation will improve, EMI will be reduced, the PWM
frequency will decrease, and ripple current will increase.
The value of tOFF can be chosen for optimization of these
parameters. For applications where audible noise is a
concern, typical values of tOFF are chosen to be in the
range of 15 to 35 ms.
3962
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
Dimensions in Inches
(for reference only)
20
11
0.0125
0.0091
0.419
0.394
0.2992
0.2914
0.050
0.016
0.020
0.013
1
2
0.050
3
0° TO 8°
BSC
0.5118
0.4961
NOTE 1
NOTE 3
0.0926
0.1043
0.0040 MIN.
Dwg. MA-008-21A in
Dimensions in Millimeters
(controlling dimensions)
20
11
0.32
0.23
10.65
10.00
7.60
7.40
1.27
0.40
0.51
0.33
1
2
1.27
3
13.00
12.60
0° TO 8°
BSC
NOTE 1
NOTE 3
2.65
2.35
0.10 MIN.
NOTES: 1. Webbed lead frame. Leads 5, 6, 15, and 16 are internally one piece.
2. Lead spacing tolerance is non-cumulative.
3. Exact body and lead configuration at vendor’s option within limits shown.
Allegro MicroSystems,
Inc. reserves the right to make, from
Dwg. MA-008-21A mm
time to time, such departures from the detail specifications as may
be required to permit improvements in the design of its products.
The information included herein is believed to be accurate and
reliable. However, Allegro MicroSystems, Inc. assumes no
responsibility for its use; nor for any infringements of patents or
other rights of third parties which may result from its use.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
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