Datasheet

UNISONIC TECHNOLOGIES CO., LTD
CCVGA7C9
Preliminary
TVS
VGA OR DVI-I PORT
COMPANION CIRCUIT

DESCRIPTION
The UTC CCVGA7C9 is an ESD solution for the VGA or DVI-I
port connector. This device integrates ESD protection for all
signals, level shifting for the DDC signals and buffering for the
SYNC signals. ESD protection for the VIDEO, DDC and SYNC
lines is implemented with low-capacitance current steering
diodes.
Separate positive supply rails are provided for the VIDEO,
DDC and SYNC channels to facilitate interfacing with low voltage
video controller ICs to provide design flexibility in
multi-supply-voltage environments.
Two non-inverting drivers provide buffering for the HSYNC and VSYNC signals from the video controller IC
(SYNC1, SYNC2). These buffers accept TTL input levels and convert them to CMOS output levels that swing
between Ground and VCC_SYNC, which is typically 5V. Additionally, each driver has a series termination resistor (RT)
connected to the SYNC_OUT pin, eliminating the external termination resistors typically required for the HSYNC and
VSYNC lines of the video cable. There are three versions with different values of RT to allow termination at typically
65Ω (UTC CCVGA7C9−00) or 15Ω (UTC CCVGA7C9−02).
Two N-channel MOSFETs provide the level shifting function required when the DDC controller is operated at a
lower supply voltage than the monitor. The gate terminals for the MOSFETs (VCC_DDC) should be connected to the
supply rail (typically 3.3 V) that supplies power to the transceivers of the DDC controller.
All ESD diodes are designed to safely handle the high current spikes specified by IEC-61000-4-2 Level 4 (±8kV
contact discharge if CBYP is present, ±4kV if not). The ESD protection for the DDC signal pins are designed to
prevent “back current” when the device is powered down while connected to a monitor that is powered up.

FEATURES
* 7 Channels of ESD protection for all VGA port connector pins
meeting IEC-61000-4-2 Level 4 ESD requirements (±8kV
contact discharge)
* Includes ESD protection, level-shifting, buffering and sync
impedance matching
* Very low loading capacitance from ESD protection diodes on
VIDEO lines (4pF maximum)

* 5V drivers for HSYNC and VSYNC lines
* Integrated impedance matching resistors on
sync lines
* Bi-directional level shifting N-Channel FETs
provided for DDC_CLK & DDC_DATA channels
* Backdrive protection on DDC lines
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
CCVGA7C9L-R16-T
CCVGA7C9G-R16-T
CCVGA7C9L-R16-R
CCVGA7C9G-R16-R
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Copyright © 2013 Unisonic Technologies Co., Ltd
Package
Packing
SSOP-16
SSOP-16
Tube
Tape Reel
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CCVGA7C9
Preliminary

PIN CONFIGURATION

PIN DESCRIPTION
PIN NO.
PIN NAME
1
VCC_SYNC
2
VCC_VIDEO
3
4
5
6
7
VIDEO_1
VIDEO_2
VIDEO_3
GND
VCC_DDC
8
BYP
9
10
11
12
13
14
15
16
DDC_OUT1
DDC_IN1
DDC_IN2
DDC_OUT2
SYNC_IN1
SYNC_OUT1
SYNC_IN2
SYNC_OUT2
TVS
DESCRIPTION
This is an isolated supply input for the SYNC_1 and SYNC_2 level shifters and their
associated ESD protection circuits.
This is a supply pin specifically for the VIDEO_1, VIDEO_2 and VIDEO_3 ESD protection
circuits.
Video signal ESD protection channel. This pin is typically tied one of the video lines
between the VGA controller device and the video connector.
Ground.
This is an isolated supply input for the DDC_1 and DDC_2 level-shifting N-FET gates.
This input is Using a 0.2uF bypass capacitor will increase the ESD robustness of the
system.
DDC signal output. Connects to the video connector side of one of the sync lines
DDC signal input. Connects to the VGA controller side of one of the sync lines.
DDC signal output. Connects to the video connector side of one of the sync lines.
Sync signal buffer input. Connects to the VGA controller side of one of the sync lines.
Sync signal buffer output. Connects to the video connector side of one of the sync lines.
Sync signal buffer input. Connects to the VGA controller side of one of the sync lines.
Sync signal buffer output. Connects to the video connector side of one of the sync lines.
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
Preliminary
TVS
BLOCK DIAGRAM
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Preliminary
TVS
ABSOLUTE MAXIMUM RATING
PARAMETER
VCC_VIDEO, VCC_DDC and VCC_SYNC Supply Voltage Inputs
SYMBOL
RATINGS
UNIT
VCC_VIDEO,
VCC_DDC,
VCC_SYNC
[GND-0.5]~+6.0
V
ESD Diode Forward Current (One Diode Conducting at a Time)
10
mA
VIDEO_1, VIDEO_2, VIDEO_3
[GND-0.5]~[VCC_VIDEO+0.5]
V
DDC_IN1, DDC_IN2
[GND-0.5]~6.0
V
DC Voltage at Inputs
DDC_OUT1, DDC_OUT2
[GND-0.5]~6.0
V
SYNC_IN1, SYNC_IN2
[GND-0.5]~[VCC_SYNC+0.5]
V
Operating Temperature Range
TOPR
-40~+85
°C
Storage Temperature
TSTG
-40~+150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

ELECTRICAL CHARACTERISTICS (Note 1)
PARAMETER
SYMBOL
VCC_VIDEO Supply Current
ICC_VIDEO
VCC_DDC Supply Current
ICC_DDC
VCC_SYNC Supply Current
ICC_SYNC
ESD Diode Forward Voltage
Logic High Input Voltage
Logic Low Input Voltage
Logic High Output Voltage
Logic Low Output Voltage
SYNC Driver Output Resistance
(CCVGA7C9−00 only)
SYNC Driver Output Resistance
(CCVGA7C9−02 only)
Logic High Output Voltage
(CCVGA7C9−02 only)
Logic Low Output Voltage
(CCVGA7C9−02 only)
Input Current VIDEO Inputs
SYNC_IN1, SYNC_IN2 Inputs
Level Shifting N−MOSFET ”OFF”
State Leakage Current
Voltage Drop Across Level-Shifting
N-MOSFET when “ON”
VIDEO Input Capacitance
(Note 3)
SYNC Driver L => H Propagation
Delay
VF
VIH
VIL
VOH
VOL
ROUT
ROUT
VOH−02
VOL−02
IIN
IOFF
VON
CIN_VID
tPLH
TEST CONDITIONS
VCC_VIDEO=5.0V, VIDEO Inputs at
VCC_VIDEO or GND
VCC_DDC=5.0V
VCC_SYNC=5V, SYNC Inputs at GND or
VCC_SYNC, SYNC Outputs Unloaded
VCC_SYNC=5V, SYNC Inputs at
3.0 V, SYNC Outputs Unloaded
IF=10mA
VCC_SYNC=5.0V, (Note 2)
VCC_SYNC=5.0V, (Note 2)
IOH=0mA, VCC_SYNC=5.0V, (Note 2)
IOL=0mA, VCC_SYNC=5.0V, (Note 2)
VCC_SYNC=5.0V, SYNC Inputs at GND or
3.0V
VCC_SYNC=5.0V, SYNC Inputs at GND or
3.0V, (Note 2)
IOH=24mA, VCC_SYNC=5.0V,
(Note 2)
TYP MAX UNIT
10
μA
10
μA
50
μA
2.0
mA
1.0
V
V
V
V
V
2.0
0.6
4.85
0.15
65
Ω
15
Ω
2.0
V
IOL=24mA, VCC_SYNC=5.0V, (Note 2)
0.8
V
VCC_VIDEO=5.0V, VIN=VCC_VIDEO or GND
VCC_SYNC=5.0V, VIN=VCC_SYNC or GND
(VCC_DDC - VDDC_IN)≤0.4V,
VDDC_OUT=VCC_DDC
(VCC_DDC - VDDC_OUT)≤0.4V,
VDDC_IN = VCC_DDC
±1
±1
μA
μA
10
μA
10
μA
VCC_DDC=2.5V, VS=GND, IDS=3mA
0.18
V
VCC_VIDEO=5.0V, VIN=2.5V, f=1MHz
VCC_VIDEO=2.5V, VIN=1.25V, f=1MHz
4
4.5
pF
pF
CL=50pF, VCC=5.0V, Input tR and tF≤5ns
12
ns
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MIN
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Preliminary
TVS
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
SYNC Driver H => L Propagation
tPHL
CL=50pF, VCC=5.0V, Input tR and tF≤5ns
12
ns
Delay
SYNC Driver Output Rise & Fall
tR, tF
CL=50pF, VCC=5.0V, Input tR and tF≤5ns
4
ns
Times
ESD Withstand Voltage (Note 3)
VESD
VCC_VIDEO=VCC_SYNC=5V
±8
kV
Notes: 1. All parameters specified over standard operating conditions unless otherwise noted.
2. These parameters apply only to the SYNC drivers. Note that ROUT=RT + RBUFFER.
3. The SYNC_OUT pins on the UTC CCVGA7C9-02 are guaranteed for 2kV HBM ESD protection.
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
Preliminary
TVS
TYPICAL APPLICATION CIRCUIT
VF
VF
VF
Notes:
1. The UTC CCVGA7C9 should be placed as close to the VGA or DVI−I connector as possible.
2. The ESD protection channels VIDEO_1, VIDEO_2, VIDEO_3 may be used interchangeably between the R, G, B
signals.
3. If differential video signal routing is used, the RED, BLUE, and GREEN signal lines should be terminated with
external 37.5Ω resistors.
4. “VF” are external video filters for the RGB signals.
5. The DDC level shifters DDC_IN, DDC_OUT, may be used interchangeably between DDCA_CLK and
DDCA_DATA.
6. The SYNC buffers may be used interchangeably between HSYNC and VSYNC.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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