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Fujitsu Microelectronics Europe
Application Note
MCU-AN-390104-E-V12
F²MC-8L/16LX FAMILY
8/16-BIT MICROCONTROLLER
MB90340
SPI COMMUNICATION TO/FROM
SERIAL EEPROM
(for NM93CS46)
APPLICATION NOTE
SPI COMMUNICATION TO/FROM SERIAL EEPROM
Revision History
Revision History
Date
2003-04-26
2003-04-29
2010-06-11
Issue
V1.0; MWi
V1.1: MWi; Flowcharts added
V1.2; MWi; CPHA, CPOL logic corrected
This document contains 19 pages.
MCU-AN-390104-E-V12
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Warranty and Disclaimer
Warranty and Disclaimer
The use of the deliverables (e.g. software, application examples, target boards, evaluation boards,
starter kits, schematics, engineering samples of IC’s etc.) is subject to the conditions of Fujitsu
Microelectronics Europe GmbH (“FME”) as set out in (i) the terms of the License Agreement and/or
the Sale and Purchase Agreement under which agreements the Product has been delivered, (ii) the
technical descriptions and (iii) all accompanying written materials.
Please note that the deliverables are intended for and must only be used for reference in an
evaluation laboratory environment.
The software deliverables are provided on an as-is basis without charge and are subject to
alterations. It is the user’s obligation to fully test the software in its environment and to ensure proper
functionality, qualification and compliance with component specifications.
Regarding hardware deliverables, FME warrants that they will be free from defects in material and
workmanship under use and service as specified in the accompanying written materials for a duration
of 1 year from the date of receipt by the customer.
Should a hardware deliverable turn out to be defect, FME’s entire liability and the customer’s
exclusive remedy shall be, at FME´s sole discretion, either return of the purchase price and the
license fee, or replacement of the hardware deliverable or parts thereof, if the deliverable is returned
to FME in original packing and without further defects resulting from the customer’s use or the
transport. However, this warranty is excluded if the defect has resulted from an accident not
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relating to FME or to unauthorised decompiling and/or reverse engineering and/or disassembling.
FME does not warrant that the deliverables do not infringe any third party intellectual property right
(IPR). In the event that the deliverables infringe a third party IPR it is the sole responsibility of the
customer to obtain necessary licenses to continue the usage of the deliverable.
In the event the software deliverables include the use of open source components, the provisions of
the governing open source license agreement shall apply with respect to such software deliverables.
To the maximum extent permitted by applicable law FME disclaims all other warranties, whether
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To the maximum extent permitted by applicable law, FME’s liability is restricted to intention and gross
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Should one of the above stipulations be or become invalid and/or unenforceable, the remaining
stipulations shall stay in full effect.
The contents of this document are subject to change without a prior notice, thus contact FME about
the latest one.
© Fujitsu Microelectronics Europe GmbH
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MCU-AN-390104-E-V12
SPI COMMUNICATION TO/FROM SERIAL EEPROM
Contents
Contents
REVISION HISTORY.............................................................................................................. 2
WARRANTY AND DISCLAIMER............................... ERROR! BOOKMARK NOT DEFINED.
CONTENTS ............................................................................................................................ 3
0 INTRODUCTION................................................................................................................ 5
1 NM93CS46......................................................................................................................... 6
1.1
EEPROM .................................................................................................................. 6
1.2
Connection to MB90340............................................................................................ 6
1.3
Communication Timing ............................................................................................. 7
1.3.1
Write Cycle Timing of NM93CS46 .............................................................. 7
1.3.2
Read Cycle Timing of NM93CS46 .............................................................. 7
1.3.3
EEPROM Busy Timing................................................................................ 7
1.3.4
“Leading Zeros”........................................................................................... 8
1.4
Used EEPROM Commands...................................................................................... 8
1.5
Example Code .......................................................................................................... 8
1.5.1
1.5.2
1.5.3
1.5.4
1.5.5
Initial Functions and Declarations ............................................................... 9
1.5.1.1
Flowchart .................................................................................... 9
1.5.1.2
C Code...................................................................................... 10
Write Enable and Write Disable ................................................................ 11
1.5.2.1
Flowchart .................................................................................. 11
1.5.2.2
C Code...................................................................................... 12
Write to EEPROM ..................................................................................... 13
1.5.3.1
Flowchart .................................................................................. 13
1.5.3.2
C Code...................................................................................... 14
Read from EEPROM................................................................................. 15
1.5.4.1
Flowchart .................................................................................. 15
1.5.4.2
C Code...................................................................................... 16
Example of usage of EEPROM functions in Main Function ...................... 17
1.5.5.1
Flowchart .................................................................................. 17
1.5.5.2
C Code...................................................................................... 18
2 BIBLIOGRAPHY.............................................................................................................. 19
2.1
Related Documents................................................................................................. 19
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Introduction
0 Introduction
This application note describes how to communicate via SPI using the MB90340-UART with
a serial EEPROM. In this note a NM93CS46 EEPROM from National Semiconductor is
used.
Please note, that this document only gives a rough overview about the communication. The
described source codes were written for understanding not for code size or speed. Neither
interrupts nor timer were used. Time critical program code is always performed by simple
flag polling or wait loops.
Please also refer to the Application Note mcu-an-300002-e-spi for further SPI specification
and nomenclature.
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1 NM93CS46
THIS CHAPTER DESCRIBES HOW TO COMMUNICATE WITH THE NM93CS46 EEPROM
1.1
EEPROM
The NM93CS46 serial EEPROM from National Semiconductor has 2048-Bit memory size,
organized as 64 16-Bit-Words.
The NM93CS46 has the following pin-out:
•
CS 1
8 Vcc
SK 2
7 PRE
DI 3
6 PE
DO 4
5 GND
Pin names:
CS
SK
DI
DO
GND
PE
PRE*
Vcc
1.2
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Program Enable
Protect Register Enable
Power Supply (+ 5 volts)
Connection to MB90340
The EEPROM can be connected as in the following schematic. Please note, that no power
supply pins and other MCU-Pins are drawn than those for the connection to the EEPROM.
*
* PRE is not used in the code example below.
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.3
Communication Timing
Detailed description of the timing and timing parameters can be found in the corresponding
datasheet of the NM93CS46 EEPROM.
1.3.1 Write Cycle Timing of NM93CS46
A write cycle (write to EEPROM) has the following bit timing (SPI-CPOL = 0, SPI-CPHA = 0):
CS
SCK
SOT (DI)
D7
D6
D5
D4
D3
D2
D1
D0
Data sampling of the EEPROM is performed at the rising edge of the SCK signal.
1.3.2 Read Cycle Timing of NM93CS46
Unfortunately the read cycle has a different timing. The NM93CS46-EEPROM does not
assert the first data bit after CS goes “0”, but on the rising edge of the first serial clock:
CS
SCK
SIN (DO)
D7
D6
D5
D4
D3
D2
D1
D0
The red arrow denotes the sampling time of the UART, if the clock delay by a half cycle
(SPI-CPHA = 0) is disabled (ECCR-SCDE = 0).
The workaround, which is presented here, is to switch the SPI-CPHA = 1 (SCDE = 0) just
before reading the EEPROM out. This can be performed, because writing to and reading
from the EEPROM does not overlap. After reading the bits, the communication is set back to
SPI-CPHA = 0 (ECCR-SCDE = 1).
1.3.3 EEPROM Busy Timing
After writing data to the EEPROM it signals a busy state by setting a “0” to the serial output
(DO/SIN). After the busy state the pin goes to “1”.
In the code example below, this busy wait is simply performed by polling the serial input of
the UART (ESCR-SIOP) in two steps. First step is waiting for “0”, the second is waiting for
“1”.
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
Because the busy state can take up to 10 ms, a time critical software should use a timer for
this, to save CPU performance.
1.3.4 “Leading Zeros”
The commands to the EEPROM are 9-Bit or 25-Bit wide. This does not fit into the 8-Bit
pattern of the UART synchronous mode.
In the code example below a workaround for this is used. Because the EEPROM ignores
leading Zero-Bits, the first byte is used to adjust the bit stream, using “leading Zeros”.
Example: A WEN (Write enable) command is sent to the EEPROM, which is composed of the
following bit stream: 1 0011 XXXX. These are 9 Bits. The UART sends the following bit
stream instead: 0000 0001 0011 XXXX. The blue “0s” are the “leading Zeros”, which are
ignored by the EEPROM. This bit stream is represented by the bytes 0x01 and 0x3X (MSB
first).
1.4
Used EEPROM Commands
The following EEPROM commands are used in the code example below:
Instr.
Op
Code
Address
READ
110
A5-A0
X
Read data stored in memory
WEN
100
11XXXX
1
Enable programming (write enable)
WRITE
101
A5-A0
D15-D0
1
Write data to address
WDS
100
00XXXX
D15-D0
1
Disable programming (write disable)
Data
PE
Comments
Pin
Commands which need the PRE-Pin are not used in the code example below.
1.5
Example Code
The following code shows how to establish a communication to and from the EEPROM.
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.1
Initial Functions and Declarations
1.5.1.1 Flowchart
InitUART
InitPorts
wait
Set Baud rate
Set Port-Register
9 to “0x00”
Argument: j
Set clock inversion
(ESCR-SCES = 1)
Set clock delay
(ECCR-SCDE = 1)
Set Port 90, 91, 92
to Output for CS-,
PE- and PRE-Pin
Do loop of 4 “NOPs”
from “0” to “j”
Reception and
Transmission enable
Set Mode 2, enable
SCLK, enable SOT
Set MSB first
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.1.2 C Code
#define DATASIZE 64
// eeprom memory size in words (16 Bit)
unsigned int data[DATASIZE];
unsigned int readbuffer[DATASIZE];
void InitUART(void)
{
BGR0 = 15;
ESCR0 = 0x01;
ECCR0 = 0x10;
SCR0 = 0x03;
SMR0 = 0x83;
SSR0 = 0x04;
}
//
//
//
//
//
//
// data to sent to EEPROM
// data received from EEPROM
1M Bit/s @ 16 MHz
SCES = 1 => CPOL = 0
SCDE = 1 => CPHA = 0
reception and transmission enable
Mode 2, SCLK enable, SOT enable
MSB first, no interrupts
void InitPorts(void)
{
// Bit#2: CS, Bit#1: PE, Bit#0: PRE
PDR9 = 0x00;
// All Low
DDR9 = 0x07;
// CS, PE, PRE to output
PDR0 = 0x00;
DDR0 = 0xFF;
// LED-Port on Flash-CAN-100P-340
}
void wait(unsigned int j)
{
volatile unsigned int i;
}
for (i = 0; i < j; i++)
{
#pragma asm
NOP
NOP
NOP
NOP
#pragma endasm
}
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.2
Write Enable and Write Disable
1.5.2.1 Flowchart
write_enable
write_disable
Set CS=1 (PDR92 =1)
TDRE == 0 ?
Set CS=1 (PDR92 =1)
Y
TDRE == 0 ?
N
N
Send Start-Bit with
“leading zeros”
(TDR = 0x01)
TDRE == 0 ?
Send Start-Bit with
“leading zeros”
(TDR = 0x01)
Y
TDRE == 0 ?
N
Y
N
Send WEN command
(TDR = 0x30)
Transmission
end?
Y
Send WDS command
(TDR = 0x00)
N
Transmission
end?
Y
Y
CS = 0 (PDR92 = 0)
© Fujitsu Microelectronics Europe GmbH
N
CS = 0 (PDR92 = 0)
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.2.2 C Code
void write_enable(void)
{
PDR9_P92 = 1;
// CS = 1
while (SSR0_TDRE == 0);
TDR0 = 0x01;
// Start-Bit (with "leading zeros")
while (SSR0_TDRE == 0);
TDR0 = 0x30;
// WEN command
while (ECCR0 & 0x01);
while (!(ECCR0 & 0x01));
// wait for start of transmission
// (or ongoing)
// wait for transmission finished
PDR9_P92 = 0;
// CS = 0
}
void write_disable(void)
{
PDR9_P92 = 1;
// CS = 1
while (SSR0_TDRE == 0);
TDR0 = 0x01;
// Start-Bit (with "leading zeros")
while (SSR0_TDRE == 0);
TDR0 = 0x00;
// WDS command
while (ECCR0 & 0x01);
while (!(ECCR0 & 0x01));
// wait for start of transmission
// (or ongoing)
// wait for transmission finished
PDR9_P92 = 0;
// CS = 0
}
Note, that the expression(ECCR & 0x01) masks the Transmission Bus Idle Bit (TBI).
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.3
Write to EEPROM
1.5.3.1 Flowchart
Write_eeprom
CS = 1 (P92 = 1)
Send LSB
TDRE == 0 ?
Y
N
Transmission
end?
Send Start-Bit with “leading
zeros” (TDRE = 0x01)
N
Y
CS = 0 (P92 = 0)
Calculate
Command/Address-Byte
Wait some ms
TDRE == 0 ?
Y
CS = 1 (P92 = 1)
N
Busy ?
(SIOP == 1) ?
Send Command/AddressByte
N
Y
TDRE == 0 ?
Y
Ready ?
(SIOP == 0) ?
N
N
Send MSB
Y
CS = 0 (P92 = 0)
TDRE == 0 ?
Y
N
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.3.2 C Code
void write_eeprom(unsigned char adr)
{
unsigned char dout, command;
PDR9_P92 = 1;
// CS = 1
while (SSR0_TDRE == 0);
TDR0 = 0x01;
// Start-Bit (with "leading zeros")
command = (adr & 0x3F) | 0x40; // Address and Write-Instruction
dout = command;
while (SSR0_TDRE == 0);
TDR0 = dout;
dout = (data[adr] >> 8) & 0xFF; // MSB
while (SSR0_TDRE == 0);
TDR0 = dout;
dout = data[adr] & 0xFF;
while (SSR0_TDRE == 0);
TDR0 = dout;
// LSB
while (ECCR0 & 0x01);
while (!(ECCR0 & 0x01));
// wait for start of transmission
//
(or ongoing)
// wait for transmission finished
PDR9_P92 = 0;
// CS = 0
wait(1);
// Next function (waiting for busy release) is made by
//
polling. Please note, that for the NM93CS46 EEPROM the
//
wait time can take till 10 ms! I. e. the CPU is then
//
also busy. For fast application a timer should be used,
//
which generates an interrupt after 10 ms from here,
//
so that the CPU can perform other jobs in this time.
PDR9_P92 = 1;
// CS = 1
while(ESCR0_SIOP == 1);
// wait for eeprom busy
while(ESCR0_SIOP == 0);
// wait for eeprom busy release
PDR9_P92 = 0;
// CS = 0
}
Note, that the expression(ECCR & 0x01) masks the Transmission Bus Idle Bit (TBI).
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.4
Read from EEPROM
1.5.4.1 Flowchart
Read_eeprom
CS = 1 (P92 = 1)
Clear possible reception
errors (CRE = 1)
Send Start-Bit with
“leading zeros”
(TDRE = 0x01)
Disable Clock delay for
reception (SCDE = 0)
Calculate
Command/AddressByte
RDRF == 0 ?
Send dummy data to
produce SCLK
Y
RDRF == 0 ?
N
Y
N
Flush Reception
Register
Read MSB
Send
Command/AddressByte
RDRF == 0 ?
Send dummy data to
produce SCLK
Y
RDRF == 0 ?
N
Y
N
Flush Reception
Register
Read LSB
Re-enable Clock delay
(SCDE = 1)
CS = 0 (P92 = 0)
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.4.2 C Code
void read_eeprom(unsigned char adr)
{
unsigned char din, command, dout;
PDR9_P92 = 1;
TDR0 = 0x01;
// CS = 1
// Start-Bit (with "leading zeros")
command = (adr & 0x3F) | 0x80; // Address and Write-Instruction
dout = command;
while (SSR0_RDRF == 0);
// transmission finished (via
//
reception)?
din = RDR0;
// flush reception register
TDR0 = dout;
while (SSR0_RDRF == 0);
// transmission finished (via
//
reception)?
// flush reception register
// Clear possible errors, reset
//
reception state machine
din = RDR0;
SCR0_CRE = 1;
// NOTE: Make sure, that SCK is "0" while setting SCDE to "0"
//
(ECCR0 = 0x00;)
//
In this case (1M bps) no check is needed. Be careful with
//
slower baud rates!
ECCR0 = 0x00;
// SCDE = 0 => CPHA = 1 : Needed
//
for special read timing of
//
used EEPROM (may be not
//
necessary for other EEPROMs)
TDR0 = 0x00;
// set dummy byte to produce SCLK
while (SSR0_RDRF == 0);
din = RDR0;
readbuffer[adr] = (din << 8);
while (SSR0_TDRE == 0);
TDR0 = 0x00;
// transmission finished (via
//
reception)?
// MSB
// set dummy byte to produce SCLK
while (SSR0_RDRF == 0);
din = RDR0;
// LSB
readbuffer[adr] = (readbuffer[adr] | din);
}
ECCR0 = 0x10;
// SCDE = 1 => CPHA = 0 : Set back
//
for write timing
PDR9_P92 = 0;
// CS = 0
Note: Because reception is enabled and the UART is synchronous master, the UART always
receives (dummy) data from SIN. Therefore the Reception Data Register Full Flag (RDRF)
can be used to determine transmission end, because UART generates the serial clock
during (dummy) transmission.
This is an alternative to using the Transmission Bus Idle Flag (TBI).
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.5
Example of usage of EEPROM functions in Main Function
1.5.5.1 Flowchart
main
Create data
(not in example)
Flush Reception
Register
PE = 1 (P91 = 1)
Clear possible
Reception Errors
Call write_enable
Read data: Call
read_eeprom
Write data: Call
write_eeprom
All data
written ?
All data
read ?
N
Y
Y
N
READ
PE = 0 (P91 = 0)
WRITE
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 1 NM93CS46
1.5.5.2 C Code
void main(void)
{
unsigned char i, error, dummy;
InitPorts();
InitUART();
// Initialize PRE, PE, and CS
// Init UART for SPI communication
// Put code or function call here to produce data for EEPROM
// write data
PDR9_P91 = 1;
// PE = 1 must be set here
write_enable();
for (i = 0; i < DATASIZE; i++)
{
write_eeprom(i);
}
write_disable();
PDR9_P91 = 0;
// PE = 0 must be set here
// Do something else ...
// read data
dummy = RDR0;
// flush read buffer
SCR0_CRE = 1;
// clear possible overruns
for (i = 0; i < DATASIZE; i++)
{
read_eeprom(i);
}
// Add further code here ...
}
The code above writes to/reads from all 64 16-Bit-Words of the EEPROM. The functions
void write_eeprom(unsigned char address) and void
read_eeprom(unsigned char address) can also be used separately for single
address access.
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SPI COMMUNICATION TO/FROM SERIAL EEPROM
Chapter 2 Bibliography
2 Bibliography
THIS CHAPTER NAMES THE RELATED DOCUMENTS
2.1
Related Documents
•
mcu-an-300002-e-spi
Fujitsu Application Note about SPI Modes
•
DS 93CS46
National Semiconductor data sheet of NM93CS46
© Fujitsu Microelectronics Europe GmbH
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MCU-AN-390104-E-V12
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