4.0 MB

The following document contains information on Cypress products.
FUJITSU MICROELECTRONICS
DATA SHEET
DS07-16911-1E
32-bit Microcontrollers
CMOS
FR80 MB91645A Series
MB91F647A/V650
■ DESCRIPTION
The MB91645A series is a line of Fujitsu Microelectronics microcontrollers based on a 32-bit RISC CPU core that
feature a variety of peripheral functions for embedded applications that demand high-performance and high-speed
CPU processing.
This series is based on the FR80* family CPU and is implemented as a single chip.
* : FR is a line of products of FUJITSU MICROELECTRONICS Limited.
■ FEATURES
• FR80 CPU
• 32-bit RISC, load/store architecture, five-stage pipeline
• General-purpose registers : 32-bit × 16
• 16-bit fixed-length instructions (basic instructions) : 1 instruction per cycle
• Instructions suitable for embedded applications
- Memory-to-memory transfer, bit processing, barrel shift instructions, etc.
- Instruction support for high level languages
Function entry and exit instructions, instructions for register multi-load and multi-store
- Bit search instruction
“1” detection, “0” detection, transition point detection
- Branch instructions with delay slots
Reduced overhead when processing branches
(Continued)
For the information for microcontroller supports, see the following web site.
This web site includes the "Customer Design Review Supplement" which provides the latest cautions on
system development and the minimal requirements to be checked to prevent problems before the system
development.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2009.3
MB91645A Series
- Register interlock functions
Facilitate coding in assembly language
- Built-in multiplier/instruction-level support
- Signed 32-bit multiplication
: 5 cycles
- Signed 16-bit multiplication
: 3 cycles
- Interrupts (save PC and PS) : 6 cycles, 16 priority levels
- Harvard architecture allowing program access and data access to be executed simultaneously
- Instruction prefetch function has been added with 4 word instruction queue of CPU
• Instruction compatible with FR family CPU
- Additional bit search instructions
- No resource instructions and coprocessor instructions
• Maximum operating frequency
• CPU : 60 MHz
• Resources : 40 MHz
• External bus : 40 MHz
Note: The PLL clock specification of MB91645A series
In MB91645A series, PLL clock specification has been modified from MB91645 series. The setting of dividing
by 1 of PLL macro oscillation clock divide configuration value is prohibited.
Therefore, please use the device with setting as dividing by 2 to 4 by ODS0 or ODS1 bit in the PLL configuration register (PLLCR) . For more details, refer to “4.4.4 PLL Configuration Register (PLLCR) ” in the
“Hardware Manual”.
• External bus interface
• Operating frequency : Max 40 MHz
• 24 address lines, 8- or 16-bit data I/O (separate busses or multiplexed bus)
• Chip select output available for 4 independent programmable areas
Programmable automatic wait cycle insertion for each area
• DMA controller (DMAC)
• 8 channels
• Address space : 32 bits (4 Gbytes)
• Transfer modes : Block transfer/burst transfer/demand transfer
• Address update : Increment/decrement/fixed (increment/decrement step size of 1, 2, or 4)
• Transfer data length : Selectable from 8-bit, 16-bit, 32-bit
• Block size : 1 to 16
• Number of transfers : 1 to 65535
• Transfer requests
- Requests from software
- Interrupt requests from peripheral resources (interrupt requests are shared, including external interrupts)
- Requests from external pins
• Reload functions : Reload can be specified on all channels
• Priority order : Fixed (ch.0 > ch.1 > ch.2 > ch.3 > ...) or round-robin
• Interrupt requests : Interrupts can be generated for transfer complete, transfer error, and transfer interrupted.
(Continued)
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DS07-16911-1E
MB91645A Series
• Multifunction serial interface
• 4 channels with 16-byte FIFO, 8 channels without FIFO
• Operation mode is selectable from the followings for each channel (For ch.0, I2C is not available.)
• UART
- Full-duplex double buffer
- Selectable parity on/off
- Built-in dedicated baud rate generator
- External clock can be used as a serial clock
- Error detection function for parity, frame and overrun errors
• CSIO
- Full-duplex double buffer
- Built-in dedicated baud rate generator
- Overrun error detection function
• I2C
- Supports both standard mode (Max 100 kbps)and Fast mode (Max 400 kbps)
- Some channels are 5 V tolerant
• Interrupts
• Total of 32 external interrupts (some pins are 5 V tolerant)
• Interrupts from peripheral resources
• Programmable interrupt levels (16 levels)
• Can be used to return from stop mode, sleep mode
• A/D converter
• 32 channels, 2 units
• 10-bit resolution
• Conversion time : approx. 1.2 μs (PCLK = 33 MHz)
• Priority conversion (2 levels)
• Conversion modes : Single-shot conversion mode, scan conversion mode
• Activation sources : Software, external trigger, base timer
• Built-in FIFO for storing conversion data (for scan conversion:16, for priority conversion:4)
• D/A converter
• 3 channels
• 8-bit resolution
• Base timer
• 16 channels
• Operation mode is selectable from the followings for each channel
- 16/32-bit reload timer
- 16-bit PWM timer
- 16/32-bit PWC timer
- 16-bit PPG timer
• Cascading connection between 2 channels allows them to be used as one 32-bit timer
• Multiple channels can be started simultaneously
• Input/output select function
(Continued)
DS07-16911-1E
3
MB91645A Series
(Continued)
• 16-bit reload timer
• 3 channels (including 1 channel for REALOS)
• Interval timer function
• Count clock select function (peripheral clock (PCLK) divided by 2 to 64)
• Compare timer
• 32-bit input capture : 8 channels
• 32-bit output compare : 8 channels
• 32-bit free-run timer : 2 channels
• Other interval timers
• Up/down counter : 4 channels
• Watch counter : 1 channel
• Watchdog timer : 1 channel
• Main timer
• 1 channel
• Counts the oscillation stabilization wait time of the main clock (MCLK)
• Counts the oscillation stabilization wait time of the PLL clock (PLLCLK)
• Can be used as an interval timer while the main clock (MCLK) oscillations is stable
• Sub timer
• 1 channel
• Counts the oscillation stabilization wait time of the sub clock (SBCLK)
• Can be used as an interval timer while the sub clock (SBCLK) oscillations is stable
• Clock generation
• Main clock (MCLK) oscillator
• Sub clock (SBCLK) oscillator
• PLL clock (PLLCLK) oscillator
• Low-power dissipation mode
• Stop mode
• Watch mode
• Sleep mode
• Doze mode
• Clock division function
• Other features
• I/O port
• INIT pin is provided as a reset pin
• Watchdog timer reset, software reset
• Delay interrupt
• Power supply : Dual power supply (I/O part : 2.7 V to 3.6 V, internal: 1.65 V to 1.95 V)
4
DS07-16911-1E
MB91645A Series
■ PRODUCT LINEUP
Product Name
MB91V650
MB91F647A
Evaluation product
Flash memory product
⎯
(Support by emulation memory)
512 K bytes
(Flash)
128 K bytes
48 K bytes
Items
Product type
Built-in program
memory capacity
Built-in RAM capacity
External bus interface
Yes
DMA controller (DMAC)
8 channels
Base timer
16 channels
Multifunction serial
interface
Without FIFO : 8 channels (ch.0 to ch.7)
With FIFO : 4 channels (ch.8 to ch.11)
External interrupt
32 (some pins are 5 V tolerant)
10-bit A/D converter
32 channels, 2 units
8-bit D/A converter
3 channels
16-bit reload timer
3 channels
32-bit input capture
8 channels
32-bit output compare
8 channels
32-bit free-run timer
2 channels
Up/Down counter
4 channels
Watch counter
1 channel
I/O port
154
153
Main timer
1 channel
Sub timer
1 channel
Wild register
16 channels
Debag function
⎯
DSU4
■ PACKAGES
Product name
Package
MB91F647A
FPT-176P-M07 (LQFP-0.50mm)
BGA-176P-M04 (PFBGA-0.80mm)
: Supported
Note: Refer to “■ PACKAGE DIMENSION” for detailed information on each package.
DS07-16911-1E
5
MB91645A Series
■ PIN ASSIGNMENT
LQFP-176
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
VCC
PC1/TIOB12_1/SIN6_1/INT9_1
PC0/TIOA12_1/SOUT6_1/INT8_1
PI7/TIOB11_1/OUT3_2
PI6/TIOA11_1/SCK5_1/ZIN3_2/OUT2_2
PI5/TIOB10_1/SIN5_1/BIN3_2/OUT1_2
PI4/TIOA10_1/SOUT5_1/AIN3_2/OUT0_2
PI3/TIOB9_1
PI2/TIOA9_1/SCK4_1/ZIN2_2
PI1/TIOB8_1/SIN4_1/BIN2_2
PI0/TIOA8_1/SOUT4_1/AIN2_2
PG7/TIOB3_1/IN7_2
PG6/TIOA3_1/SCK1_1/IN6_2
PG5/DEOP3/TIOB2_1/SIN1_1/IN5_2
PG4/DACK3/TIOA2_1/SOUT1_1/IN4_2
PG3/DREQ3/TIOB1_1/IN3_2
PG2/DEOP2/TIOA1_1/SCK0_2/IN2_2
PG1/DACK2/TIOB0_1/SIN0_2/IN1_2
PG0/DREQ2/TIOA0_1/SOUT0_2/IN0_2
PH7/TIOB7_1/INT7_1
PH6/TIOA7_1/SCK3_1/ZIN1_2/INT6_1
PH5/TIOB6_1/SIN3_1/BIN1_2/INT5_1
PH4/TIOA6_1/SOUT3_1/AIN1_2/INT4_1
PH3/TIOB5_1/INT3_1
PH2/TIOA5_1/SCK2_1/ZIN0_2/INT2_1
PH1/TIOB4_1/SIN2_1/BIN0_2/INT1_1
PH0/TIOA4_1/SOUT2_1/AIN0_2/INT0_1
VDDI
VSS
P47/A23
P46/A22/SCK9
P45/A21/SIN9
P44/A20/SOUT9
P43/A19
P42/A18/SCK8
P41/A17/SIN8
P40/A16/SOUT8
P37/A15/TIOB15/OUT7/INT15
P36/A14/TIOA15/SCK7/OUT6/INT14
P35/A13/TIOB14/SIN7/OUT5/INT13
P34/A12/TIOA14/SOUT7/OUT4/INT12
P33/A11/TIOB13/INT11
P32/A10/TIOA13/SCK6/INT10
VCC
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
LQFP-176
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
VSS
P31/A09/TIOB12/SIN6/INT9
P30/A08/TIOA12/SOUT6/INT8
P27/A07/TIOB11/OUT3
P26/A06/TIOA11/SCK5/ZIN3/OUT2
P25/A05/TIOB10/SIN5/BIN3/OUT1
P24/A04/TIOA10/SOUT5/AIN3/OUT0
P23/A03/TIOB9
P22/A02/TIOA9/SCK4/ZIN2
P21/A01/TIOB8/SIN4/BIN2
P20/A00/TIOA8/SOUT4/AIN2
P17/D15/TIOB7/INT7
P16/D14/TIOA7/SCK3/ZIN1/INT6
P15/D13/TIOB6/SIN3/BIN1/INT5
P14/D12/TIOA6/SOUT3/AIN1/INT4
P13/D11/TIOB5/INT3
P12/D10/TIOA5/SCK2/ZIN0/INT2
P11/D09/TIOB4/SIN2/BIN0/INT1
P10/D08/TIOA4/SOUT2/AIN0/INT0
P07/D07/TIOB3/IN7
P06/D06/TIOA3/SCK1/IN6
P05/D05/TIOB2/SIN1/IN5
P04/D04/TIOA2/SOUT1/IN4
P03/D03/TIOB1/IN3
P02/D02/TIOA1/SCK0_1/IN2
P01/D01/TIOB0/SIN0_1/IN1
P00/D00/TIOA0/SOUT0_1/IN0
VDDI
VSS
P67/DEOP1/INT23_2
P66/DACK1/ZIN3_1/FRCK0_1
P65/DREQ1/BIN3_1/ADTRG0_1
P64/DEOP0/AIN3_1
P63/DACK0/FRCK1_1/INT22_2
P62/DREQ0/ZIN2_1
P61/SYSCLK/BIN2_1
P60/RDY/AIN2_1
P57/WR1
P56/WR0/SCK11/ZIN1_1/FRCK0
P55/RD/SIN11/BIN1_1/ADTRG0
P54/AS/SOUT11/AIN1_1
P53/CS3/FRCK1/INT21_2
P52/CS2/SCK10/ZIN0_1
VCC
PK0/X1A
PK1/X0A
PK2/ADTRG0_2
P70/AN0/OUT0_1/INT16
P71/AN1/OUT1_1/INT17
P72/AN2/TMO0/OUT2_1/INT18
P73/AN3/TMO1/OUT3_1/INT19
P74/AN4/TMO2/OUT4_1/INT20
P75/AN5/SOUT0/TMI0/OUT5_1/INT21
P76/AN6/SIN0/TMI1/OUT6_1/INT22
P77/AN7/SCK0/TMI2/OUT7_1/INT23
P80/AN8/IN0_1/INT24
P81/AN9/IN1_1/INT25
P82/AN10/IN2_1/INT26
P83/AN11/IN3_1/INT27
P84/AN12/IN4_1/INT28
P85/AN13/IN5_1/INT29
P86/AN14/IN6_1/INT30
P87/AN15/IN7_1/INT31
AVCC
AVRH
AVSS
P90/DA0
P91/DA1
P92/DA2
PA0/AN16/INT16_1
PA1/AN17/INT17_1
PA2/AN18/TMO0_1/INT18_1
PA3/AN19/TMO1_1/INT19_1
PA4/AN20/TMO2_1/INT20_1
PA5/AN21/TMI0_1/INT21_1
PA6/AN22/TMI1_1/INT22_1
PA7/AN23/TMI2_1/INT23_1
PB0/AN24/INT24_1
PB1/AN25/INT25_1
PB2/AN26/INT26_1
PB3/AN27/INT27_1
PB4/AN28/INT28_1
PB5/AN29/INT29_1
PB6/AN30/INT30_1
PB7/AN31/INT31_1
P50/CS0/SOUT10/AIN0_1
P51/CS1/SIN10/BIN0_1
VSS
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
VSS
VDDI
PC2/TIOA13_1/SCK6_1/INT10_1
PC3/TIOB13_1/INT11_1
PC4/TIOA14_1/SOUT7_1/OUT4_2/INT12_1
PC5/TIOB14_1/SIN7_1/OUT5_2/INT13_1
PC6/TIOA15_1/SCK7_1/OUT6_2/INT14_1
PC7/TIOB15_1/OUT7_2/INT15_1
PD0/SOUT8_1
PD1/SIN8_1
PD2/SCK8_1
PD3
PD4/SOUT9_1
PD5/SIN9_1
PD6/SCK9_1
PD7
PE0/SOUT10_1/AIN0_3
PE1/SIN10_1/BIN0_3
PE2/SCK10_1/ZIN0_3
PE3/FRCK1_2
PE4/AIN1_3
PE5/SOUT11_1/BIN1_3/ADTRG0_4
PE6/SIN11_1/ZIN1_3/FRCK0_2
PE7/SCK11_1
PF0/AIN2_3
PF1/BIN2_3
PF2/ZIN2_3
PF3/FRCK1_3
PF4/AIN3_3
PF5/BIN3_3/ADTRG0_5
PF6/ZIN3_3/FRCK0_3
VDDI
VSS
VCC
PJ0
PJ1
PJ2
PK3/ADTRG0_3
INIT
MD0
MD1
X0
X1
VSS
(FPT-176P-M07)
Note: The number after the underscore (“_”) in pin names such as XXX_1 and XXX_2 indicates the port number.
For these pins, there are multiple pins that provide the same function for the same channel. Use the
extended port function register (EPFR) to select the pin.
6
DS07-16911-1E
MB91645A Series
PFBGA-176
(TOP VIEW)
14
VSS
P27
P23
P17
P13
P07
P03
VDDI
P65
P61
P55
VCC
13
VCC
P32
P30
P24
P20
P14
P10
P02
VSS
P64
P60
P54
P52
VSS
12
P35
P34
P31
P25
P21
P15
P11
P01
P67
P63
P56
P51
P50
PB7/
AN31
11
P41
P40
P36
P33
P22
P16
P06
P00
P66
P57
P53
PB5/
AN29
PB4/
AN28
PB3/
AN27
10
P45
P44
P43
P37
P26
P12
P05
P04
P62
PB6/
AN30
PB2/
AN26
PB1/
AN25
PB0/
AN24
PA7/
AN23
9
VDDI
VSS
P47
P46
P42
PA2/
AN18
PA6/
AN22
PA5/
AN21
PA4/
AN20
PA3/
AN19
8
PH3
PH2
PH1
PH0
PH4
P90/
DA0
P91/
DA1
PA1/
AN17
PA0/
AN16
P92/
DA2
7
PH7
PG0
PG1
PH6
PH5
AVSS
P86/
AN14
P87/
AN15
AVCC
AVRH
6
PG3
PG4
PG5
PG6
PG2
P76/
AN6
P82/
AN10
P83/
AN11
P84/
AN12
P85/
AN13
5
PG7
PI0
PI1
PI2
PI6
PD1
PE5
PE6
PF3
MD0
P73/
AN3
P77/
AN7
P80/
AN8
P81/
AN9
4
PI3
PI4
PI5
PC2
PC6
PD5
PE1
PE7
VDDI
PJ1
PK2
P72/
AN2
P74/
AN4
P75/
AN5
3
PI7
PC0
PC1
PC5
PD2
PD6
PE2
PF2
PF6
PJ0
INIT
X1
P70/
AN0
P71/
AN1
2
VCC
VDDI
PC3
PC7
PD3
PD7
PE3
PF1
PF5
VCC
PK3
X0
PK1/
X0A
PK0/
X1A
VSS
PC4
PD0
PD4
PE0
PE4
PF0
PF4
VSS
PJ2
MD1
VSS
B
C
D
E
F
G
H
J
K
L
PFBGA-176
1
A
M
N
P
(BGA-176P-M04)
Note: Due to the space limitation, the pin assignment for the PFBGA-176 only shows representative names for
each of the pins such as port names. Refer to “■ PIN DESCRIPTION” for the pin names.
DS07-16911-1E
7
MB91645A Series
■ PIN DESCRIPTION
The number after the underscore (“_”) in pin names such as XXX_1 and XXX_2 indicates the port number.
For these pins, there are multiple pins that provide the same function for the same channel. Use the extended
port function register (EPFR) to select the pin.
Pin no.
I/O
CMOS
CMOS level
circuit
Pin name
Function
level
hysteresis
LQFP*1 PFBGA*2
input
input
type*3
1
B1
VSS
⎯
GND pin
⎯
⎯
2
B2
VDDI
⎯
1.8V power supply pin
⎯
⎯
General-purpose I/O port
⎯
TIOA13_1
Base timer ch.13 TIOA pin (Port 1)
⎯
SCK6_1
(SCL6_1)
Multifunction serial interface ch.6
clock I/O pin (Port 1).
This pin operates as SCK6_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL6_1 when
it is used in an I2C (operation mode
4).
⎯
External interrupt request 10 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
Base timer ch.13 TIOB pin (Port 1)
⎯
External interrupt request 11 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
TIOA14_1
Base timer ch.14 TIOA pin (Port 1)
⎯
SOUT7_1
(SDA7_1)
Multifunction serial interface ch.7
output pin (Port 1).
This pin operates as SOUT7_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA7_1 when it is used in an I2C
(operation mode 4).
⎯
OUT4_2
32-bit output compare ch.4 output
pin (Port 2)
⎯
INT12_1
External interrupt request 12 input
pin (Port 1)
⎯
PC2
3
D4
C
INT10_1
PC3
4
C2
TIOB13_1
C
INT11_1
PC4
5
C1
C
⎯
⎯
(Continued)
8
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
⎯
Base timer ch.14 TIOB pin (Port 1)
⎯
Multifunction serial interface ch.7
input pin (Port 1)
⎯
OUT5_2
32-bit output compare ch.5 output
pin (Port 2)
⎯
INT13_1
External interrupt request 13 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
TIOA15_1
Base timer ch.15 TIOA pin (Port 1)
⎯
SCK7_1
(SCL7_1)
Multifunction serial interface ch.7
clock I/O pin (Port 1).
This pin operates as SCK7_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL7_1 when
it is used in an I2C (operation mode
4).
⎯
OUT6_2
32-bit output compare ch.6 output
pin (Port 2)
⎯
INT14_1
External interrupt request 14 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
Base timer ch.15 TIOB pin (Port 1)
⎯
32-bit output compare ch.7 output
pin (Port 2)
⎯
External interrupt request 15 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
Multifunction serial interface ch.8
output pin (Port 1).
This pin operates as SOUT8_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA8_1 when it is used in an I2C
(operation mode 4).
⎯
General-purpose I/O port
⎯
Multifunction serial interface ch.8
input pin (Port 1)
⎯
TIOB14_1
SIN7_1
D3
C
PC6
7
E4
C
PC7
TIOB15_1
8
D2
OUT7_2
C
INT15_1
PD0
9
D1
SOUT8_1
(SDA8_1)
C
PD1
10
F5
CMOS
level
input
General-purpose I/O port
PC5
6
Function
SIN8_1
C
CMOS level
hysteresis
input
⎯
⎯
⎯
(Continued)
DS07-16911-1E
9
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
PD2
11
E3
SCK8_1
(SCL8_1)
C
12
E2
PD3
C
PD4
13
E1
SOUT9_1
(SDA9_1)
C
PD5
14
F4
SIN9_1
C
PD6
15
F3
SCK9_1
(SCL9_1)
C
16
F2
PD7
C
PE0
17
F1
SOUT10_1
(SDA10_1)
AIN0_3
C
Function
CMOS
level
input
General-purpose I/O port
⎯
Multifunction serial interface ch.8
clock I/O pin (Port 1).
This pin operates as SCK8_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL8_1 when
it is used in an I2C (operation mode
4).
⎯
General-purpose I/O port
⎯
General-purpose I/O port
⎯
Multifunction serial interface ch.9
output pin (Port 1).
This pin operates as SOUT9_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA9_1 when it is used in an I2C
(operation mode 4).
⎯
General-purpose I/O port
⎯
Multifunction serial interface ch.9
input pin (Port 1)
⎯
General-purpose I/O port
⎯
Multifunction serial interface ch.9
clock I/O pin (Port 1).
This pin operates as SCK9_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL9_1 when
it is used in an I2C (operation mode
4).
⎯
General-purpose I/O port
⎯
General-purpose I/O port
⎯
Multifunction serial interface ch.10
output pin (Port 1).
This pin operates as SOUT10_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA10_1 when it is used in an I2C
(operation mode 4).
⎯
Up/Down counter ch.0 AIN input pin
(Port 3)
⎯
CMOS level
hysteresis
input
(Continued)
10
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
G4
⎯
Multifunction serial interface ch.10
input pin (Port 1)
⎯
Up/Down counter ch.0 BIN input pin
(Port 3)
⎯
General-purpose I/O port
⎯
Multifunction serial interface ch.10
clock I/O pin (Port 1).
This pin operates as SCK10_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL10_1
when it is used in an I2C (operation
mode 4).
⎯
Up/Down counter ch.0 ZIN input pin
(Port 3)
⎯
General-purpose I/O port
⎯
32-bit free-run timer ch.1 external
clock input pin (Port 2)
⎯
General-purpose I/O port
⎯
Up/Down counter ch.1 AIN input pin
(Port 3)
⎯
General-purpose I/O port
⎯
Multifunction serial interface ch.11
output pin (Port 1).
This pin operates as SOUT11_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA11_1 when it is used in an I2C
(operation mode 4).
⎯
BIN1_3
Up/Down counter ch.1 BIN input pin
(Port 3)
⎯
ADTRG0_4
10-bit A/D converter external trigger
input pins (Port 4).
⎯
General-purpose I/O port
⎯
Multifunction serial interface ch.11
input pin (Port 1)
⎯
Up/Down counter ch.1 ZIN input pin
(Port 3)
⎯
32-bit free-run timer ch.0 external
clock input pin (Port 2)
⎯
SIN10_1
C
BIN0_3
PE2
19
G3
SCK10_1
(SCL10_1)
C
ZIN0_3
PE3
20
G2
FRCK1_2
C
PE4
21
G1
AIN1_3
C
PE5
SOUT11_1
(SDA11_1)
22
G5
C
PE6
SIN11_1
23
H5
CMOS
level
input
General-purpose I/O port
PE1
18
Function
ZIN1_3
FRCK0_2
C
CMOS level
hysteresis
input
(Continued)
DS07-16911-1E
11
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
PE7
24
H4
25
H1
SCK11_1
(SCL11_1)
C
PF0
AIN2_3
C
PF1
26
H2
27
H3
BIN2_3
C
PF2
ZIN2_3
C
PF3
28
J5
29
J1
FRCK1_3
C
PF4
AIN3_3
C
PF5
30
J2
BIN3_3
C
ADTRG0_5
PF6
31
J3
ZIN3_3
C
FRCK0_3
Function
CMOS
level
input
General-purpose I/O port
⎯
Multifunction serial interface ch.11
clock I/O pin (Port 1).
This pin operates as SCK11_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL11_1
when it is used in an I2C (operation
mode 4).
⎯
General-purpose I/O port
⎯
Up/Down counter ch.2 AIN input pin
(Port 3)
⎯
General-purpose I/O port
⎯
Up/Down counter ch.2 BIN input pin
(Port 3)
⎯
General-purpose I/O port
⎯
Up/Down counter ch.2 ZIN input pin
(Port 3)
⎯
General-purpose I/O port
⎯
32-bit free-run timer ch.1 external
clock input pin (Port 3)
⎯
General-purpose I/O port
⎯
Up/Down counter ch.3 AIN input pin
(Port 3)
⎯
General-purpose I/O port
⎯
Up/Down counter ch.3 BIN input pin
(Port 3)
⎯
10-bit A/D converter external trigger
input pins (Port 5).
⎯
General-purpose I/O port
⎯
Up/Down counter ch.3 ZIN input pin
(Port 3)
⎯
32-bit free-run timer ch.0 external
clock input pin (Port 3)
⎯
CMOS level
hysteresis
input
32
J4
VDDI
⎯
1.8V power supply pin
⎯
⎯
33
K1
VSS
⎯
GND pin
⎯
⎯
34
K2
VCC
⎯
3.3V power supply pin
⎯
⎯
35
K3
PJ0
C
General-purpose I/O port
⎯
36
K4
PJ1
C
General-purpose I/O port
⎯
(Continued)
12
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
37
L1
Pin name
I/O
circuit
type*3
PJ2
C
39
40
L2
L3
K5
ADTRG0_3
INIT
MD0
CMOS
level
input
General-purpose I/O port
⎯
General-purpose I/O port
⎯
10-bit A/D converter external trigger
input pins (Port 3).
⎯
P
External reset input pin. A reset is
valid when INIT=L.
The I/O circuit type for the flash
memory products is P.
⎯
P
Mode 0 pin.
The I/O circuit type for the flash
memory products is P.
During normal operation, MD0=L
must be input. During serial programming to flash memory, MD0=H
must be input.
⎯
⎯
PK3
38
Function
C
CMOS level
hysteresis
input
41
M1
MD1
P
Mode 1 pin. “L” level must be always
input.
The I/O circuit type for the flash
memory products is P.
42
M2
X0
A
Main clock (oscillation) input pin
⎯
43
M3
X1
A
Main clock (oscillation) I/O pin
⎯
⎯
44
N1
VSS
⎯
GND pin
⎯
⎯
45
P2
General-purpose I/O port
⎯
Sub clock (oscillation) I/O pin
⎯
46
N2
General-purpose I/O port
⎯
Sub clock (oscillation) input pin
⎯
General-purpose I/O port
⎯
10-bit A/D converter external trigger
input pins (Port 2).
⎯
P70
General-purpose I/O port
⎯
AN0
10-bit A/D converter ch.0 analog
input pin
⎯
⎯
32-bit output compare ch.0 output
pin (Port 1)
⎯
⎯
External interrupt request 16 input
pin
⎯
PK0
X1A
PK1
X0A
I
I
PK2
47
48
L4
N3
ADTRG0_2
OUT0_1
INT16
C
E
⎯
(Continued)
DS07-16911-1E
13
MB91645A Series
Pin no.
LQFP*1
49
PFBGA*2
P3
Pin name
I/O
circuit
type*3
51
52
M4
L5
N4
CMOS
level
input
CMOS level
hysteresis
input
P71
General-purpose I/O port
⎯
AN1
10-bit A/D converter ch.1 analog
input pin
⎯
⎯
32-bit output compare ch.1 output
pin (Port 1)
⎯
⎯
External interrupt request 17 input
pin
⎯
P72
General-purpose I/O port
⎯
AN2
10-bit A/D converter ch.2 analog
input pin.
⎯
⎯
16-bit reload timer ch.0 output pin
⎯
⎯
OUT2_1
32-bit output compare ch.2 output
pin (Port 1)
⎯
⎯
INT18
External interrupt request 18 input
pin
⎯
P73
General-purpose I/O port
⎯
AN3
10-bit A/D converter ch.3 analog
input pin
⎯
⎯
16-bit reload timer ch.1 output pin
⎯
⎯
OUT3_1
32-bit output compare ch.3 output
pin (Port 1)
⎯
⎯
INT19
External interrupt request 19 input
pin
⎯
P74
General-purpose I/O port
⎯
AN4
10-bit A/D converter ch.4 analog
input pin
⎯
⎯
16-bit reload timer ch.2 output pin
⎯
⎯
OUT4_1
32-bit output compare ch.4 output
pin (Port 1)
⎯
⎯
INT20
External interrupt request 20 input
pin
⎯
OUT1_1
E
INT17
50
Function
TMO0
TMO1
TMO2
E
E
E
(Continued)
14
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
⎯
AN5
10-bit A/D converter ch.5 analog
input pin
⎯
⎯
Multifunction serial interface ch.0
output pin.
This pin operates as SOUT0 when it
is used in a UART/CSIO (operation
modes 0 to 2).
⎯
⎯
16-bit reload timer ch.0 input pin
⎯
OUT5_1
32-bit output compare ch.5 output
pin (Port 1)
⎯
INT21
External interrupt request 21 input
pin
⎯
P76
General-purpose I/O port
⎯
AN6
10-bit A/D converter ch.6 analog
input pin
⎯
SIN0
Multifunction serial interface ch.0
input pin
⎯
16-bit reload timer ch.1 input pin
⎯
OUT6_1
32-bit output compare ch.6 output
pin (Port 1)
⎯
INT22
External interrupt request 22 input
pin
⎯
P77
General-purpose I/O port
⎯
AN7
10-bit A/D converter ch.7 analog
input pin
⎯
Multifunction serial interface ch.0
clock I/O pin.
This pin operates as SCK0 when it is
used in a UART/CSIO (operation
modes 0 to 2).
⎯
16-bit reload timer ch.2 input pin
⎯
OUT7_1
32-bit output compare ch.7 output
pin (Port 1)
⎯
INT23
External interrupt request 23 input
pin
⎯
P4
K6
E
TMI1
E
SCK0
55
CMOS level
hysteresis
input
General-purpose I/O port
TMI0
54
CMOS
level
input
P75
SOUT0
53
Function
M5
E
TMI2
⎯
⎯
⎯
⎯
⎯
(Continued)
DS07-16911-1E
15
MB91645A Series
Pin no.
LQFP*1
56
PFBGA*2
N5
Pin name
I/O
circuit
type*3
P5
General-purpose I/O port
⎯
AN8
10-bit A/D converter ch.8 analog
input pin
⎯
32-bit input capture ch.0 input pin
(Port 1)
⎯
External interrupt request 24 input
pin
⎯
P81
General-purpose I/O port
⎯
AN9
10-bit A/D converter ch.9 analog
input pin
⎯
32-bit input capture ch.1 input pin
(Port 1)
⎯
External interrupt request 25 input
pin
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.10 analog
input pin
⎯
32-bit input capture ch.2 input pin
(Port 1)
⎯
External interrupt request 26 input
pin
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.11 analog
input pin
⎯
32-bit input capture ch.3 input pin
(Port 1)
⎯
External interrupt request 27 input
pin
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.12 analog
input pin
⎯
32-bit input capture ch.4 input pin
(Port 1)
⎯
External interrupt request 28 input
pin
⎯
IN0_1
E
IN1_1
E
INT25
P82
AN10
58
L6
IN2_1
E
INT26
P83
AN11
59
M6
IN3_1
E
INT27
P84
AN12
60
N6
CMOS
level
input
P80
INT24
57
Function
IN4_1
INT28
E
CMOS level
hysteresis
input
⎯
⎯
⎯
⎯
⎯
(Continued)
16
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
P85
AN13
61
P6
IN5_1
E
INT29
P86
AN14
62
L7
IN6_1
E
INT30
P87
AN15
63
M7
IN7_1
E
INT31
Function
CMOS
level
input
General-purpose I/O port
⎯
10-bit A/D converter ch.13 analog
input pin
⎯
32-bit input capture ch.5 input pin
(Port 1)
⎯
External interrupt request 29 input
pin
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.14 analog
input pin
⎯
32-bit input capture ch.6 input pin
(Port 1)
⎯
External interrupt request 30 input
pin
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.15 analog
input pin
⎯
32-bit input capture ch.7 input pin
(Port 1)
⎯
External interrupt request 31 input
pin
⎯
CMOS level
hysteresis
input
⎯
⎯
⎯
64
N7
AVCC
⎯
10-bit A/D converter and 8-bit D/A
converter analog power pin
⎯
⎯
65
P7
AVRH
⎯
10-bit A/D converter analog
reference voltage input pin
⎯
⎯
66
K7
AVSS
⎯
10-bit A/D converter and 8-bit D/A
converter GND pin
⎯
⎯
General-purpose I/O port
⎯
Analog output pins of the 8-bit D/A
converter ch.0.
⎯
General-purpose I/O port
⎯
Analog output pins of the 8-bit D/A
converter ch.1.
⎯
General-purpose I/O port
⎯
Analog output pins of the 8-bit D/A
converter ch.2.
⎯
P90
67
K8
DA0
F
P91
68
L8
DA1
F
P92
69
P8
DA2
F
⎯
⎯
⎯
(Continued)
DS07-16911-1E
17
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
PA0
70
N8
AN16
E
INT16_1
PA1
71
M8
AN17
E
INT17_1
PA2
AN18
72
K9
TMO0_1
E
INT18_1
PA3
AN19
73
P9
TMO1_1
E
INT19_1
PA4
AN20
74
N9
TMO2_1
E
INT20_1
PA5
AN21
75
M9
TMI0_1
INT21_1
E
Function
CMOS
level
input
CMOS level
hysteresis
input
General-purpose I/O port
⎯
10-bit A/D converter ch.16 analog
input pin
⎯
External interrupt request 16 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.17 analog
input pin
⎯
External interrupt request 17 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.18 analog
input pin
⎯
⎯
16-bit reload timer ch.0 output pin
(Port 1)
⎯
⎯
External interrupt request 18 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.19 analog
input pin
⎯
⎯
16-bit reload timer ch.1 output pin
(Port 1)
⎯
⎯
External interrupt request 19 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.20 analog
input pin
⎯
⎯
16-bit reload timer ch.2 output pin
(Port 1)
⎯
⎯
External interrupt request 20 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.21 analog
input pin
⎯
16-bit reload timer ch.0 input pin
(Port 1)
⎯
External interrupt request 21 input
pin (Port 1)
⎯
⎯
⎯
⎯
(Continued)
18
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
PA6
AN22
76
L9
TMI1_1
E
INT22_1
PA7
AN23
77
P10
TMI2_1
E
INT23_1
PB0
78
N10
AN24
E
INT24_1
PB1
79
M10
AN25
E
INT25_1
PB2
80
L10
AN26
E
INT26_1
PB3
81
P11
AN27
E
INT27_1
PB4
82
N11
AN28
INT28_1
E
Function
CMOS
level
input
General-purpose I/O port
⎯
10-bit A/D converter ch.22 analog
input pin
⎯
16-bit reload timer ch.1 input pin
(Port 1)
⎯
External interrupt request 22 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.23 analog
input pin
⎯
16-bit reload timer ch.2 input pin
(Port 1)
⎯
External interrupt request 23 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.24 analog
input pin
⎯
External interrupt request 24 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.25 analog
input pin
⎯
External interrupt request 25 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.26 analog
input pin
⎯
External interrupt request 26 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.27 analog
input pin
⎯
External interrupt request 27 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.28 analog
input pin
⎯
External interrupt request 28 input
pin (Port 1)
⎯
CMOS level
hysteresis
input
⎯
⎯
⎯
⎯
⎯
⎯
⎯
(Continued)
DS07-16911-1E
19
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
M11
⎯
10-bit A/D converter ch.29 analog
input pin
⎯
External interrupt request 29 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.30 analog
input pin
⎯
External interrupt request 30 input
pin (Port 1)
⎯
General-purpose I/O port
⎯
10-bit A/D converter ch.31 analog
input pin
⎯
External interrupt request 31 input
pin (Port 1)
⎯
P50
General-purpose I/O port
⎯
CS0
External bus interface chip select 0
output pin
⎯
SOUT10
(SDA10)
Multifunction serial interface ch.10
output pin.
This pin operates as SOUT10 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SDA10 when it
is used in an I2C (operation mode 4).
⎯
Up/Down counter ch.0 AIN input pin
(Port 1)
⎯
P51
General-purpose I/O port
⎯
CS1
External bus interface chip select 1
output pin
⎯
Multifunction serial interface ch.10
input pin
⎯
Up/Down counter ch.0 BIN input pin
(Port 1)
⎯
AN29
E
INT29_1
PB6
84
K10
AN30
E
INT30_1
PB7
85
P12
AN31
E
INT31_1
86
N12
C
AIN0_1
87
M12
CMOS
level
input
General-purpose I/O port
PB5
83
Function
SIN10
C
BIN0_1
CMOS level
hysteresis
input
⎯
⎯
⎯
⎯
⎯
88
P13
VSS
⎯
GND pin
⎯
⎯
89
N14
VCC
⎯
3.3V power supply pin
⎯
⎯
(Continued)
20
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
90
PFBGA*2
N13
Pin name
I/O
circuit
type*3
L11
General-purpose I/O port
⎯
CS2
External bus interface chip select 2
output pin
⎯
SCK10
(SCL10)
Multifunction serial interface ch.10
clock I/O pin.
This pin operates as SCK10 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SCL10 when it
is used in an I2C (operation mode 4).
⎯
Up/Down counter ch.0 ZIN input pin
(Port 1)
⎯
P53
General-purpose I/O port
⎯
CS3
External bus interface chip select 3
output pin
⎯
32-bit free-run timer ch.1 external
clock input pin
⎯
External interrupt request 21 input
pin (Port 2)
⎯
P54
General-purpose I/O port
⎯
AS
External bus interface address
strobe output pin
⎯
Multifunction serial interface ch.11
output pin.
This pin operates as SOUT11 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SDA11 when it
is used in an I2C (operation mode 4).
⎯
Up/Down counter ch.1 AIN input pin
(Port 1)
⎯
P55
General-purpose I/O port
⎯
RD
External bus interface read strobe
output pin
⎯
Multifunction serial interface ch.11
input pin
⎯
BIN1_1
Up/Down counter ch.1 BIN input pin
(Port 1)
⎯
ADTRG0
10-bit A/D converter external trigger
input pin
⎯
C
FRCK1
C
INT21_2
92
M13
SOUT11
(SDA11)
C
AIN1_1
93
M14
CMOS
level
input
P52
ZIN0_1
91
Function
SIN11
C
CMOS level
hysteresis
input
⎯
⎯
⎯
⎯
(Continued)
DS07-16911-1E
21
MB91645A Series
Pin no.
LQFP*1
94
PFBGA*2
L12
Pin name
I/O
circuit
type*3
K11
General-purpose I/O port
⎯
WR0
External bus interface write strobe 0
output pin
⎯
SCK11
(SCL11)
Multifunction serial interface ch.11
clock I/O pin.
This pin operates as SCK11 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SCL11 when it
is used in an I2C (operation mode 4).
⎯
ZIN1_1
Up/Down counter ch.1 ZIN input pin
(Port 1)
⎯
FRCK0
32-bit free-run timer ch.0 external
clock input pin
⎯
General-purpose I/O port
⎯
External bus interface write strobe 1
output pin
⎯
General-purpose I/O port
⎯
C
WR1
C
P60
96
L13
RDY
B
General-purpose I/O port
⎯
External bus interface bus clock
output pin
⎯
Up/Down counter ch.2 BIN input pin
(Port 1)
⎯
General-purpose I/O port
⎯
DMA controller (DMAC) ch.0 transfer request input pin
⎯
Up/Down counter ch.2 ZIN input pin
(Port 1)
⎯
General-purpose I/O port
⎯
DMA controller (DMAC) ch.0 transfer request acceptance signal output
pin
⎯
FRCK1_1
32-bit free-run timer ch.1 external
clock input pin (Port 1)
⎯
INT22_2
External interrupt request 22 input
pin (Port 2)
⎯
SYSCLK
C
BIN2_1
P62
98
J10
DREQ0
C
ZIN2_1
P63
DACK0
99
K12
C
CMOS level
hysteresis
input
⎯
⎯
⎯
⎯
P61
L14
External bus interface ready input
pin
Up/Down counter ch.2 AIN input pin
(Port 1)
AIN2_1
97
CMOS
level
input
P56
P57
95
Function
⎯
⎯
(Continued)
22
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
P64
100
K13
DEOP0
C
AIN3_1
P65
DREQ1
101
K14
BIN3_1
C
ADTRG0_1
P66
DACK1
102
J11
C
ZIN3_1
FRCK0_1
P67
103
J12
DEOP1
C
INT23_2
Function
CMOS
level
input
General-purpose I/O port
⎯
DMA controller (DMAC) ch.0 last
transfer signal output pin
⎯
Up/Down counter ch.3 AIN input pin
(Port 1)
⎯
General-purpose I/O port
⎯
DMA controller (DMAC) ch.1 transfer request input pin
⎯
Up/Down counter ch.3 BIN input pin
(Port 1)
⎯
10-bit A/D converter external trigger
input pin (Port 1)
⎯
General-purpose I/O port
⎯
DMA controller (DMAC) ch.1 transfer request acceptance signal output
pin
⎯
Up/Down counter ch.3 ZIN input pin
(Port 1)
⎯
32-bit free-run timer ch.0 external
clock input pin (Port 1)
⎯
General-purpose I/O port
⎯
DMA controller (DMAC) ch.1 last
transfer signal output pin
⎯
External interrupt request 23 input
pin (Port 2)
⎯
CMOS level
hysteresis
input
⎯
⎯
⎯
104
J13
VSS
⎯
GND pin
⎯
⎯
105
J14
VDDI
-⎯
1.8V power supply pin
⎯
⎯
P00
General-purpose I/O port
⎯
D00
External bus interface data bus bit0
Base timer ch.0 TIOA pin
⎯
⎯
SOUT0_1
Multifunction serial interface ch.0
output pin (Port 1).
This pin operates as SOUT0_1
when it is used in a UART/CSIO
(operation modes 0 to 2).
⎯
⎯
IN0
32-bit input capture ch.0 input pin
⎯
TIOA0
106
⎯
H11
B
(Continued)
DS07-16911-1E
23
MB91645A Series
Pin no.
LQFP*1
107
PFBGA*2
H12
Pin name
I/O
circuit
type*3
P01
General-purpose I/O port
D01
External bus interface data bus bit1
110
111
H14
Multifunction serial interface ch.0
input pin (Port 1)
⎯
IN1
32-bit input capture ch.1 input pin
⎯
P02
General-purpose I/O port
⎯
D02
External bus interface data bus bit2
⎯
Base timer ch.1 TIOA pin
⎯
Multifunction serial interface ch.0
clock I/O pin (Port 1).
This pin operates as SCK0_1 when
it is used in a UART/CSIO (operation
modes 0 to 2).
⎯
IN2
32-bit input capture ch.2 input pin
⎯
P03
General-purpose I/O port
⎯
B
D03
B
⎯
External bus interface data bus bit3
Base timer ch.1 TIOB pin
⎯
IN3
32-bit input capture ch.3 input pin
⎯
P04
General-purpose I/O port
⎯
D04
External bus interface data bus bit4
TIOB1
⎯
TIOA2
Base timer ch.2 TIOA pin
⎯
SOUT1
(SDA1)
Multifunction serial interface ch.1
output pin.
This pin operates as SOUT1 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SDA1 when it
is used in an I2C (operation mode 4).
⎯
IN4
32-bit input capture ch.4 input pin
⎯
P05
General-purpose I/O port
⎯
D05
External bus interface data bus bit5
H10
G10
⎯
SIN0_1
H13
B
⎯
SIN1
Multifunction serial interface ch.1
input pin
⎯
IN5
32-bit input capture ch.5 input pin
⎯
B
⎯
⎯
Base timer ch.2 TIOB pin
TIOB2
CMOS level
hysteresis
input
⎯
⎯
B
SCK0_1
109
CMOS
level
input
Base timer ch.0 TIOB pin
TIOB0
TIOA1
108
Function
(Continued)
24
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
P06
General-purpose I/O port
D06
External bus interface data bus bit6
114
G14
G13
⎯
IN6
32-bit input capture ch.6 input pin
⎯
P07
General-purpose I/O port
⎯
B
D07
B
G12
⎯
External bus interface data bus bit7
Base timer ch.3 TIOB pin
⎯
IN7
32-bit input capture ch.7 input pin
⎯
P10
General-purpose I/O port
⎯
D08
External bus interface data bus bit8
TIOB3
⎯
TIOA4
Base timer ch.4 TIOA pin
⎯
SOUT2
(SDA2)
Multifunction serial interface ch.2
output pin.
This pin operates as SOUT2 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SDA2 when it
is used in an I2C (operation mode 4).
⎯
AIN0
Up/Down counter ch.0 AIN input pin
⎯
INT0
External interrupt request 0 input pin
⎯
P11
General-purpose I/O port
⎯
D09
External bus interface data bus bit9
B
⎯
Multifunction serial interface ch.2
input pin
⎯
BIN0
Up/Down counter ch.0 BIN input pin
⎯
INT1
External interrupt request 1 input pin
⎯
SIN2
B
⎯
⎯
Base timer ch.4 TIOB pin
TIOB4
115
⎯
Multifunction serial interface ch.1
clock I/O pin.
This pin operates as SCK1 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL1 when it
is used in an I2C (operation mode 4).
G11
CMOS level
hysteresis
input
⎯
⎯
SCK1
(SCL1)
113
CMOS
level
input
Base timer ch.3 TIOA pin
TIOA3
112
Function
(Continued)
DS07-16911-1E
25
MB91645A Series
Pin no.
LQFP*1
116
117
118
PFBGA*2
F10
F14
F13
Pin name
I/O
circuit
type*3
P12
General-purpose I/O port
D10
External bus interface data bus bit10
F12
CMOS
level
input
⎯
Base timer ch.5 TIOA pin
⎯
SCK2
(SCL2)
Multifunction serial interface ch.2
clock I/O pin.
This pin operates as SCK2 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL2 when it
is used in an I2C (operation mode 4).
⎯
ZIN0
Up/Down counter ch.0 ZIN input pin
⎯
INT2
External interrupt request 2 input pin
⎯
P13
General-purpose I/O port
⎯
D11
B
B
⎯
External bus interface data bus bit11
Base timer ch.5 TIOB pin
⎯
INT3
External interrupt request 3 input pin
⎯
P14
General-purpose I/O port
⎯
D12
External bus interface data bus bit12
TIOB5
⎯
TIOA6
Base timer ch.6 TIOA pin
⎯
SOUT3
(SDA3)
Multifunction serial interface ch.3
output pin.
This pin operates as SOUT3 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SDA3 when it
is used in an I2C (operation mode 4).
⎯
AIN1
Up/Down counter ch.1 AIN input pin
⎯
INT4
External interrupt request 4 input pin
⎯
P15
General-purpose I/O port
⎯
D13
External bus interface data bus bit13
B
⎯
Multifunction serial interface ch.3
input pin
⎯
BIN1
Up/Down counter ch.1 BIN input pin
⎯
INT5
External interrupt request 5 input pin
⎯
SIN3
⎯
⎯
Base timer ch.6 TIOB pin
B
CMOS level
hysteresis
input
⎯
TIOA5
TIOB6
119
Function
(Continued)
26
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
120
121
PFBGA*2
F11
E14
Pin name
I/O
circuit
type*3
P16
General-purpose I/O port
D14
External bus interface data bus bit14
123
⎯
⎯
SCK3
(SCL3)
Multifunction serial interface ch.3
clock I/O pin.
This pin operates as SCK3 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL3 when it
is used in an I2C (operation mode 4).
⎯
ZIN1
Up/Down counter ch.1 ZIN input pin
⎯
INT6
External interrupt request 6 input pin
⎯
P17
General-purpose I/O port
⎯
D15
B
B
CMOS level
hysteresis
input
⎯
Base timer ch.7 TIOA pin
⎯
External bus interface data bus bit15
Base timer ch.7 TIOB pin
⎯
INT7
External interrupt request 7 input pin
⎯
P20
General-purpose I/O port
⎯
A00
External bus interface address bus
bit0
⎯
⎯
Base timer ch.8 TIOA pin
⎯
⎯
SOUT4
(SDA4)
Multifunction serial interface ch.4
output pin.
This pin operates as SOUT4 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SDA4 when it
is used in an I2C (operation mode 4).
⎯
AIN2
Up/Down counter ch.2 AIN input pin
⎯
P21
General-purpose I/O port
⎯
A01
External bus interface address bus
bit1
⎯
Base timer ch.8 TIOB pin
⎯
SIN4
Multifunction serial interface ch.4
input pin
⎯
BIN2
Up/Down counter ch.2 BIN input pin
⎯
TIOB7
D*4
E13
E12
CMOS
level
input
TIOA7
TIOA8
122
Function
TIOB8
D*4
⎯
(Continued)
DS07-16911-1E
27
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
125
126
D13
⎯
A02
External bus interface address bus
bit2
⎯
Base timer ch.9 TIOA pin
⎯
SCK4
(SCL4)
Multifunction serial interface ch.4
clock I/O pin.
This pin operates as SCK4 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL4 when it
is used in an I2C (operation mode 4).
⎯
ZIN2
Up/Down counter ch.2 ZIN input pin
⎯
P23
General-purpose I/O port
⎯
External bus interface address bus
bit3
⎯
TIOB9
Base timer ch.9 TIOB pin
⎯
P24
General-purpose I/O port
⎯
A04
External bus interface address bus
bit4
⎯
⎯
TIOA10
Base timer ch.10 TIOA pin
⎯
⎯
SOUT5
(SDA5)
Multifunction serial interface ch.5
output pin.
This pin operates as SOUT5 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SDA5 when it
is used in an I2C (operation mode 4).
⎯
AIN3
Up/Down counter ch.3 AIN input pin
⎯
OUT0
32-bit output compare ch.0 output
pin
⎯
P25
General-purpose I/O port
⎯
A05
External bus interface address bus
bit5
⎯
Base timer ch.10 TIOB pin
⎯
Multifunction serial interface ch.5
input pin
⎯
BIN3
Up/Down counter ch.3 BIN input pin
⎯
OUT1
32-bit output compare ch.1 output
pin
⎯
D*4
A03
D*4
D*4
TIOB10
127
D12
CMOS level
hysteresis
input
General-purpose I/O port
E11
D14
CMOS
level
input
P22
TIOA9
124
Function
SIN5
D*
4
⎯
⎯
⎯
⎯
⎯
(Continued)
28
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
128
129
PFBGA*2
E10
C14
Pin name
I/O
circuit
type*3
⎯
A06
External bus interface address bus
bit6
⎯
TIOA11
Base timer ch.11 TIOA pin
⎯
SCK5
(SCL5)
Multifunction serial interface ch.5
clock I/O pin.
This pin operates as SCK5 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL5 when it
is used in an I2C (operation mode 4).
⎯
ZIN3
Up/Down counter ch.3 ZIN input pin
⎯
OUT2
32-bit output compare ch.2 output
pin
⎯
P27
General-purpose I/O port
⎯
A07
External bus interface address bus
bit7
⎯
Base timer ch.11 TIOB pin
⎯
32-bit output compare ch.3 output
pin
⎯
P30
General-purpose I/O port
⎯
A08
External bus interface address bus
bit8
⎯
⎯
Base timer ch.12 TIOA pin
⎯
⎯
SOUT6
(SDA6)
Multifunction serial interface ch.6
output pin.
This pin operates as SOUT6 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SDA6 when it
is used in an I2C (operation mode 4).
⎯
INT8
External interrupt request 8 input pin
⎯
P31
General-purpose I/O port
⎯
A09
External bus interface address bus
bit9
⎯
Base timer ch.12 TIOB pin
⎯
SIN6
Multifunction serial interface ch.6
input pin
⎯
INT9
External interrupt request 9 input pin
⎯
TIOB11
D*4
D*
4
D*4
C13
C12
CMOS level
hysteresis
input
General-purpose I/O port
TIOA12
131
CMOS
level
input
P26
OUT3
130
Function
TIOB12
D*4
⎯
⎯
⎯
⎯
⎯
132
B14
VSS
⎯
GND pin
⎯
⎯
133
A13
VCC
⎯
3.3V power supply pin
⎯
⎯
(Continued)
DS07-16911-1E
29
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
135
⎯
A10
External bus interface address bus
bit10
⎯
Base timer ch.13 TIOA pin
⎯
SCK6
(SCL6)
Multifunction serial interface ch.6
clock I/O pin.
This pin operates as SCK6 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL6 when it
is used in an I2C (operation mode 4).
⎯
INT10
External interrupt request 10 input
pin
⎯
P33
General-purpose I/O port
⎯
A11
External bus interface address bus
bit11
⎯
Base timer ch.13 TIOB pin
⎯
External interrupt request 11 input
pin
⎯
P34
General-purpose I/O port
⎯
A12
External bus interface address bus
bit12
⎯
⎯
TIOA14
Base timer ch.14 TIOA pin
⎯
⎯
SOUT7
(SDA7)
Multifunction serial interface ch.7
output pin.
This pin operates as SOUT7 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SDA7 when it
is used in an I2C (operation mode 4).
⎯
OUT4
32-bit output compare ch.4 output
pin
⎯
INT12
External interrupt request 12 input
pin
⎯
D*4
TIOB13
D*
4
INT11
136
B12
CMOS level
hysteresis
input
General-purpose I/O port
B13
D11
CMOS
level
input
P32
TIOA13
134
Function
D*4
⎯
⎯
⎯
(Continued)
30
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
138
139
A12
C11
D10
CMOS
level
input
P35
General-purpose I/O port
⎯
A13
External bus interface address bus
bit13
⎯
Base timer ch.14 TIOB pin
⎯
Multifunction serial interface ch.7
input pin
⎯
OUT5
32-bit output compare ch.5 output
pin
⎯
INT13
External interrupt request 13 input
pin
⎯
P36
General-purpose I/O port
⎯
A14
External bus interface address bus
bit14
⎯
TIOA15
Base timer ch.15 TIOA pin
⎯
SCK7
(SCL7)
Multifunction serial interface ch.7
clock I/O pin.
This pin operates as SCK7 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL7 when it
is used in an I2C (operation mode 4).
⎯
OUT6
32-bit output compare ch.6 output
pin
⎯
INT14
External interrupt request 14 input
pin
⎯
P37
General-purpose I/O port
⎯
A15
External bus interface address bus
bit15
⎯
Base timer ch.15 TIOB pin
⎯
OUT7
32-bit output compare ch.7 output
pin
⎯
INT15
External interrupt request 15 input
pin
⎯
TIOB14
137
Function
SIN7
TIOB15
D*4
D*4
D*4
CMOS level
hysteresis
input
⎯
⎯
⎯
⎯
⎯
⎯
(Continued)
DS07-16911-1E
31
MB91645A Series
Pin no.
LQFP*1
140
PFBGA*2
Pin name
I/O
circuit
type*3
General-purpose I/O port
⎯
A16
External bus interface address bus
bit16
⎯
Multifunction serial interface ch.8
output pin.
This pin operates as SOUT8 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SDA8 when it
is used in an I2C (operation mode 4).
⎯
General-purpose I/O port
⎯
External bus interface address bus
bit17
⎯
SIN8
Multifunction serial interface ch.8
input pin
⎯
P42
General-purpose I/O port
⎯
A18
External bus interface address bus
bit18
⎯
Multifunction serial interface ch.8
clock I/O pin.
This pin operates as SCK8 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL8 when it
is used in an I2C (operation mode 4).
⎯
General-purpose I/O port
⎯
External bus interface address bus
bit19
⎯
P44
General-purpose I/O port
⎯
A20
External bus interface address bus
bit20
⎯
Multifunction serial interface ch.9
output pin.
This pin operates as SOUT9 when it
is used in a UART/CSIO (operation
modes 0 to 2) and as SDA9 when it
is used in an I2C (operation mode 4).
⎯
General-purpose I/O port
⎯
External bus interface address bus
bit21
⎯
Multifunction serial interface ch.9
input pin
⎯
D*4
B11
P41
142
A11
A17
D*4
D*4
E9
SCK8
(SCL8)
P43
143
144
C10
A19
D*
4
D*4
B10
SOUT9
(SDA9)
P45
145
A10
CMOS
level
input
P40
SOUT8
(SDA8)
141
Function
A21
SIN9
D*4
CMOS level
hysteresis
input
⎯
⎯
⎯
⎯
⎯
⎯
(Continued)
32
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
146
PFBGA*2
Pin name
I/O
circuit
type*3
Function
CMOS
level
input
CMOS level
hysteresis
input
P46
General-purpose I/O port
⎯
A22
External bus interface address bus
bit22
⎯
Multifunction serial interface ch.9
clock I/O pin.
This pin operates as SCK9 when it is
used in a UART/CSIO (operation
modes 0 to 2) and as SCL9 when it
is used in an I2C (operation mode 4).
⎯
General-purpose I/O port
⎯
External bus interface address bus
bit23
⎯
⎯
D*4
D9
SCK9
(SCL9)
P47
147
C9
148
B9
VSS
⎯
GND pin
⎯
⎯
149
A9
VDDI
⎯
1.8 V power supply pin
⎯
⎯
General-purpose I/O port
⎯
TIOA4_1
Base timer ch.4 TIOA pin (Port 1)
⎯
SOUT2_1
(SDA2_1)
Multifunction serial interface ch.2
output pin (Port 1).
This pin operates as SOUT2_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA2_1 when it is used in an I2C
(operation mode 4).
⎯
AIN0_2
Up/Down counter ch.0 AIN input pin
(Port 2)
⎯
INT0_1
External interrupt request 0 input pin
(Port 1)
⎯
General-purpose I/O port
⎯
Base timer ch.4 TIOB pin (Port 1)
⎯
Multifunction serial interface ch.2
input pin (Port 1)
⎯
BIN0_2
Up/Down counter ch.0 BIN input pin
(Port 2)
⎯
INT1_1
External interrupt request 1 input pin
(Port 1)
⎯
A23
D*
4
⎯
PH0
150
D8
D*4
PH1
TIOB4_1
SIN2_1
151
C8
D*
4
⎯
(Continued)
DS07-16911-1E
33
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
B8
⎯
TIOA5_1
Base timer ch.5 TIOA pin (Port 1)
⎯
SCK2_1
(SCL2_1)
Multifunction serial interface ch.2
clock I/O pin (Port 1).
This pin operates as SCK2_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL2_1 when
it is used in an I2C (operation mode
4).
⎯
ZIN0_2
Up/Down counter ch.0 ZIN input pin
(Port 2)
⎯
INT2_1
External interrupt request 2 input pin
(Port 1)
⎯
General-purpose I/O port
⎯
Base timer ch.5 TIOB pin (Port 1)
⎯
External interrupt request 3 input pin
(Port 1)
⎯
General-purpose I/O port
⎯
TIOA6_1
Base timer ch.6 TIOA pin (Port 1)
⎯
SOUT3_1
(SDA3_1)
Multifunction serial interface ch.3
output pin (Port 1).
This pin operates as SOUT3_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA3_1 when it is used in an I2C
(operation mode 4).
⎯
AIN1_2
Up/Down counter ch.1 AIN input pin
(Port 2)
⎯
INT4_1
External interrupt request 4 input pin
(Port 1)
⎯
General-purpose I/O port
⎯
TIOB6_1
Base timer ch.6 TIOB pin (Port 1)
⎯
SIN3_1
Multifunction serial interface ch.3
input pin (Port 1)
⎯
BIN1_2
Up/Down counter ch.1 BIN input pin
(Port 2)
⎯
INT5_1
External interrupt request 5 input pin
(Port 1)
⎯
D*4
PH3
153
A8
TIOB5_1
D*4
INT3_1
PH4
154
E8
D*4
PH5
155
CMOS
level
input
General-purpose I/O port
PH2
152
Function
D*4
E7
CMOS level
hysteresis
input
⎯
(Continued)
34
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
D7
A7
TIOA7_1
Base timer ch.7 TIOA pin (Port 1)
⎯
SCK3_1
(SCL3_1)
Multifunction serial interface ch.3
clock I/O pin (Port 1).
This pin operates as SCK3_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL3_1 when
it is used in an I2C (operation mode
4).
⎯
ZIN1_2
Up/Down counter ch.1 ZIN input pin
(Port 2)
⎯
INT6_1
External interrupt request 6 input pin
(Port 1)
⎯
General-purpose I/O port
⎯
Base timer ch.7 TIOB pin (Port 1)
⎯
External interrupt request 7 input pin
(Port 1)
⎯
General-purpose I/O port
⎯
DREQ2
DMA controller (DMAC) ch.2 transfer request input pin
⎯
TIOA0_1
Base timer ch.0 TIOA pin (Port 1)
⎯
⎯
SOUT0_2
Multifunction serial interface ch.0
output pin (Port 2).
This pin operates as SOUT0_2
when it is used in a UART/CSIO
(operation modes 0 to 2).
⎯
⎯
IN0_2
32-bit input capture ch.0 input pin
(Port 2)
⎯
General-purpose I/O port
⎯
DMA controller (DMAC) ch.2 transfer request acceptance signal output
pin
⎯
Base timer ch.0 TIOB pin (Port 1)
⎯
SIN0_2
Multifunction serial interface ch.0
input pin (Port 2)
⎯
IN1_2
32-bit input capture ch.1 input pin
(Port 2)
⎯
D*4
TIOB7_1
D*4
INT7_1
PG0
158
D*4
B7
PG1
DACK2
159
C7
CMOS level
hysteresis
input
⎯
PH7
157
CMOS
level
input
General-purpose I/O port
PH6
156
Function
TIOB0_1
D*4
⎯
(Continued)
DS07-16911-1E
35
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
DEOP2
DMA controller (DMAC) ch.2 last
transfer signal output pin
⎯
TIOA1_1
Base timer ch.1 TIOA pin (Port 1)
⎯
Multifunction serial interface ch.0
clock I/O pin (Port 2).
This pin operates as SCK0_2 when
it is used in a UART/CSIO (operation
modes 0 to 2).
⎯
32-bit input capture ch.2 input pin
(Port 2)
⎯
General-purpose I/O port
⎯
DMA controller (DMAC) ch.3 transfer request input pin
⎯
Base timer ch.1 TIOB pin (Port 1)
⎯
32-bit input capture ch.3 input pin
(Port 2)
⎯
General-purpose I/O port
⎯
DMA controller (DMAC) ch.3 transfer request acceptance signal output
pin
⎯
⎯
Base timer ch.2 TIOA pin (Port 1)
⎯
⎯
SOUT1_1
(SDA1_1)
Multifunction serial interface ch.1
output pin (Port 1).
This pin operates as SOUT1_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA1_1 when it is used in an I2C
(operation mode 4).
⎯
IN4_2
32-bit input capture ch.4 input pin
(Port 2)
⎯
D*4
E6
IN2_2
PG3
DREQ3
A6
TIOB1_1
D*
4
IN3_2
PG4
DACK3
TIOA2_1
162
CMOS level
hysteresis
input
⎯
SCK0_2
161
CMOS
level
input
General-purpose I/O port
PG2
160
Function
D*4
B6
⎯
(Continued)
36
DS07-16911-1E
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
⎯
DMA controller (DMAC) ch.3 last
transfer signal output pin
⎯
Base timer ch.2 TIOB pin (Port 1)
⎯
SIN1_1
Multifunction serial interface ch.1
input pin (Port 1)
⎯
IN5_2
32-bit input capture ch.5 input pin
(Port 2)
⎯
General-purpose I/O port
⎯
TIOA3_1
Base timer ch.3 TIOA pin (Port 1)
⎯
SCK1_1
(SCL1_1)
Multifunction serial interface ch.1
clock I/O pin (Port 1).
This pin operates as SCK1_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL1_1 when
it is used in an I2C (operation mode
4).
⎯
32-bit input capture ch.6 input pin
(Port 2)
⎯
General-purpose I/O port
⎯
Base timer ch.3 TIOB pin (Port 1)
⎯
32-bit input capture ch.7 input pin
(Port 2)
⎯
General-purpose I/O port
⎯
TIOA8_1
Base timer ch.8 TIOA pin (Port 1)
⎯
SOUT4_1
(SDA4_1)
Multifunction serial interface ch.4
output pin (Port 1).
This pin operates as SOUT4_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA4_1 when it is used in an I2C
(operation mode 4).
⎯
Up/Down counter ch.2 AIN input pin
(Port 2)
⎯
General-purpose I/O port
⎯
Base timer ch.8 TIOB pin (Port 1)
⎯
Multifunction serial interface ch.4
input pin (Port 1)
⎯
Up/Down counter ch.2 BIN input pin
(Port 2)
⎯
DEOP3
C6
TIOB2_1
D*4
PG6
164
D6
D*4
IN6_2
PG7
165
A5
TIOB3_1
D*4
IN7_2
PI0
166
B5
D*4
AIN2_2
PI1
TIOB8_1
167
C5
CMOS
level
input
General-purpose I/O port
PG5
163
Function
SIN4_1
BIN2_2
D*4
CMOS level
hysteresis
input
⎯
⎯
(Continued)
DS07-16911-1E
37
MB91645A Series
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
D5
⎯
TIOA9_1
Base timer ch.9 TIOA pin (Port 1)
⎯
SCK4_1
(SCL4_1)
Multifunction serial interface ch.4
clock I/O pin (Port 1).
This pin operates as SCK4_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL4_1 when
it is used in an I2C (operation mode
4).
⎯
Up/Down counter ch.2 ZIN input pin
(Port 2)
⎯
General-purpose I/O port
⎯
Base timer ch.9 TIOB pin (Port 1)
⎯
General-purpose I/O port
⎯
TIOA10_1
Base timer ch.10 TIOA pin (Port 1)
⎯
SOUT5_1
(SDA5_1)
Multifunction serial interface ch.5
output pin (Port 1).
This pin operates as SOUT5_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA5_1 when it is used in an I2C
(operation mode 4).
⎯
AIN3_2
Up/Down counter ch.3 AIN input pin
(Port 2)
⎯
OUT0_2
32-bit output compare ch.0 output
pin (Port 2)
⎯
General-purpose I/O port
⎯
Base timer ch.10 TIOB pin (Port 1)
⎯
Multifunction serial interface ch.5
input pin (Port 1)
⎯
BIN3_2
Up/Down counter ch.3 BIN input pin
(Port 2)
⎯
OUT1_2
32-bit output compare ch.1 output
pin (Port 2)
⎯
D*4
ZIN2_2
169
A4
PI3
TIOB9_1
D*4
PI4
170
B4
D*4
PI5
TIOB10_1
SIN5_1
171
CMOS
level
input
General-purpose I/O port
PI2
168
Function
D*4
C4
CMOS level
hysteresis
input
⎯
⎯
⎯
(Continued)
38
DS07-16911-1E
MB91645A Series
(Continued)
Pin no.
LQFP*1
PFBGA*2
Pin name
I/O
circuit
type*3
E5
⎯
TIOA11_1
Base timer ch.11 TIOA pin (Port 1)
⎯
SCK5_1
(SCL5_1)
Multifunction serial interface ch.5
clock I/O pin (Port 1).
This pin operates as SCK5_1 when
it is used in a UART/CSIO (operation
modes 0 to 2) and as SCL5_1 when
it is used in an I2C (operation mode
4).
⎯
ZIN3_2
Up/Down counter ch.3 ZIN input pin
(Port 2)
⎯
OUT2_2
32-bit output compare ch.2 output
pin (Port 2)
⎯
General-purpose I/O port
⎯
Base timer ch.11 TIOB pin (Port 1)
⎯
32-bit output compare ch.3 output
pin (Port 2)
⎯
General-purpose I/O port
⎯
TIOA12_1
Base timer ch.12 TIOA pin (Port 1)
⎯
SOUT6_1
(SDA6_1)
Multifunction serial interface ch.6
output pin (Port 1).
This pin operates as SOUT6_1
when it is used in a UART/CSIO
(operation modes 0 to 2) and as
SDA6_1 when it is used in an I2C
(operation mode 4).
⎯
External interrupt request 8 input pin
(Port 1)
⎯
General-purpose I/O port
⎯
Base timer ch.12 TIOB pin (Port 1)
⎯
Multifunction serial interface ch.6
input pin (Port 1)
⎯
External interrupt request 9 input pin
(Port 1)
⎯
3.3 V power supply pin
⎯
D*4
PI7
173
A3
TIOB11_1
D*4
OUT3_2
PC0
174
B3
C
INT8_1
PC1
TIOB12_1
175
C3
SIN6_1
C
INT9_1
176
A2
CMOS
level
input
General-purpose I/O port
PI6
172
Function
VCC
⎯
CMOS level
hysteresis
input
⎯
⎯
⎯
⎯
*1: FPT-176P-M07
*2: BGA-176P-M04
*3: Refer to “■ I/O CIRCUIT TYPE” for details on the I/O circuit types.
*4: 5 V tolerant pin
DS07-16911-1E
39
MB91645A Series
■ I/O CIRCUIT TYPE
Type
Circuit
Remarks
A
X1
Clock input
• Oscillation feedback resistance
approx. 1 MΩ
• With standby control
X0
Standby control
B
P-ch
P-ch
N-ch
Digital output
Digital output
•
•
•
•
•
CMOS level output
CMOS level input
CMOS level hysteresis input
With pull-up control
With standby control
Notes: • CMOS level input when input data,
RDY pin of external bus interface.
Input other than above situations,
CMOS level hysteresis input.
• When this pin is used as an I2C pin,
the digital output P-ch transistor is always off.
R
Pull-up control
Digital input
Standby control
Digital input
Standby control
(Continued)
40
DS07-16911-1E
MB91645A Series
Type
Circuit
Remarks
C
•
•
•
•
P-ch
P-ch
Digital output
N-ch
Digital output
CMOS level output
CMOS level hysteresis input
With pull-up control
With standby control
Note: When this pin is used as an I2C pin,
the digital output P-ch transistor is
always off.
R
Pull-up control
Digital input
Standby
control
D
P-ch
Digital output
•
•
•
•
CMOS level output
CMOS level hysteresis input
5 V tolerant input
With standby control
Note: When this pin is used as an I2C pin,
the digital output P-ch transistor is
always off.
N-ch
Digital output
R
Digital input
Standby
control
(Continued)
DS07-16911-1E
41
MB91645A Series
Type
Circuit
Remarks
E
P-ch
P-ch
Digital output
N-ch
Digital output
•
•
•
•
•
•
CMOS level output
CMOS level hysteresis input
With input control
Analog input
With pull-up control
With standby control
•
•
•
•
•
•
CMOS level output
CMOS level hysteresis input
With input control
Analog output
With pull-up control
With standby control
Pull-up control
R
Digital input
Standby control
Analog input
Input control
F
P-ch
R
P-ch
Digital output
N-ch
Digital output
Pull-up control
Digital input
Standby control
Analog output
Output control
(Continued)
42
DS07-16911-1E
MB91645A Series
(Continued)
Type
Circuit
Remarks
I
X1A
P-ch
Digital output
N-ch
Digital output
• Oscillation feedback resistance
approx.10 MΩ
• CMOS level output
• CMOS level hysteresis input
• With standby control
R
Digital input
Standby
control
Clock input
Standby control
Digital input
R
P-ch
Standby
control
Digital output
N-ch
Digital output
X0A
P
• Flash memory product only
• CMOS level hysteresis input
• High voltage control for testing Flash
memory
N-ch
N-ch
Control pin
N-ch
N-ch
DS07-16911-1E
N-ch
Mode input
R
43
MB91645A Series
■ PRECAUTIONS FOR HANDLING THE DEVICES
Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly affected
by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This page describes
precautions that must be observed to minimize the chance of failure and to obtain higher reliability from your
FUJITSU MICROELECTRONICS semiconductor devices.
1. Precautions for Product Design
This section describes precautions when designing electronic equipment using semiconductor devices.
• Absolute Maximum Ratings
Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature,
etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
• Recommended Operating Conditions
The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these
ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation outside
these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on the data
sheet. Users considering application outside the listed conditions are advised to contact their representatives
beforehand.
• Processing and Protection of Pins
These precautions must be followed when handling the pins which connect semiconductor devices to power
supply and input/output functions.
(1) Preventing Over-Voltage and Over-Current Conditions
Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause deterioration
within the device, and in extreme cases leads to permanent damage of the device. Try to prevent such
overvoltage or over-current conditions at the design stage.
(2) Protection of Output Pins
Shorting of output pins to supply pins or other output pins, or connection to large capacitance can cause
large current flows. Such conditions if present for extended periods of time can damage the device.
Therefore, avoid this type of connection.
(3) Handling of Unused Input Pins
Unconnected input pins with very high impedance levels can adversely affect stability of operation. Such
pins should be connected through an appropriate resistance to a power supply pin or ground pin.
44
DS07-16911-1E
MB91645A Series
• Latch-up
Semiconductor devices are constructed by the formation of P-type and N-type areas on a substrate. When
subjected to abnormally high voltages, internal parasitic PNPN junctions (called thyristor structures) may be
formed, causing large current levels in excess of several hundred mA to flow continuously at the power supply
pin. This condition is called latch-up.
Note: The occurrence of latch-up not only causes loss of reliability in the semiconductor device, but can cause
injury or damage from high heat, smoke or flame. To prevent this from happening, do the following:
(a) Be sure that voltages applied to pins do not exceed the absolute maximum ratings. This should
include attention to abnormal noise, surge levels, etc.
(b) Be sure that abnormal current flows do not occur during the power-on sequence.
• Observance of Safety Regulations and Standards
Most countries in the world have established standards and regulations regarding safety, protection from electromagnetic interference, etc. Customers are requested to observe applicable regulations and standards in the
design of products.
• Fail-Safe Design
Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or
loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions.
• Precautions Related to Usage of Devices
FUJITSU MICROELECTRONICS semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment,
personal or household devices, etc.).
CAUTION: Customers considering the use of our products in special applications where failure or abnormal
operation may directly affect human lives or cause physical injury or property damage, or where extremely high
levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters,
vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU MICROELECTRONICS sales representatives before such use. The company will not be responsible for damages arising
from such use without prior approval.
DS07-16911-1E
45
MB91645A Series
2. Precautions for Package Mounting
Package mounting may be either lead insertion type or surface mount type. In either case, for heat resistance
during soldering, you should only mount under FUJITSU MICROELECTRONICS's recommended conditions.
For detailed information about mount conditions, contact your sales representative.
• Lead Insertion Type
Mounting of lead insertion type packages onto printed circuit boards may be done by two methods: direct
soldering on the board, or mounting by using a socket.
Direct mounting onto boards normally involves processes for inserting leads into through-holes on the board
and using the flow soldering (wave soldering) method of applying liquid solder.
In this case, the soldering process usually causes leads to be subjected to thermal stress in excess of the
absolute ratings for storage temperature. Mounting processes should conform to recommended mounting conditions.
If socket mounting is used, differences in surface treatment of the socket contacts and IC lead surfaces can lead
to contact deterioration after long periods. For this reason it is recommended that the surface treatment of socket
contacts and IC leads be verified before mounting.
• Surface Mount Type
Surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads are
more easily deformed or bent. The use of packages with higher pin counts and narrower pin pitch results in
increased susceptibility to open connections caused by deformed pins, or shorting due to solder bridges.
You must use appropriate mounting techniques. FUJITSU MICROELECTRONICS recommends the solder reflow
method, and has established a ranking of mounting conditions for each product. Users are advised to mount
packages in accordance with FUJITSU MICROELECTRONICS ranking of recommended conditions.
• Lead-Free Packaging
Note: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic soldering,
junction strength may be reduced under some conditions of use.
• Storage of Semiconductor Devices
Because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions will
cause absorption of moisture. During mounting, the application of heat to a package that has absorbed moisture
can cause surfaces to peel, reducing moisture resistance and causing packages to crack. To prevent, do the
following:
(a) Avoid exposure to rapid temperature changes, which cause moisture to condense inside the product. Store
products in locations where temperature changes are slight.
(b) Use dry boxes for product storage. Products should be stored below 70% relative humidity, and at temperatures between 5 °C and 30 °C. When you open Dry Package that recommends humidity 40% to 70%
relative humidity.
(c) When necessary, FUJITSU MICROELECTRONICS packages semiconductor devices in highly moistureresistant aluminum laminate bags, with a silica gel desiccant. Devices should be sealed in their aluminum
laminate bags for storage.
(d) Avoid storing packages where they are exposed to corrosive gases or high levels of dust.
46
DS07-16911-1E
MB91645A Series
• Baking
Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the FUJITSU
MICROELECTRONICS recommended conditions for baking.
Condition: 125 °C/24 h
• Static Electricity
Because semiconductor devices are particularly susceptible to damage by static electricity, you must take the
following precautions:
(a) Maintain relative humidity in the working environment between 40% and 70%. Use of an apparatus for ion
generation may be needed to remove electricity.
(b) Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment.
(c) Eliminate static body electricity by the use of rings or bracelets connected to ground through high resistance
(on the level of 1 MΩ). Wearing of conductive clothing and shoes, use of conductive floor mats and other
measures to minimize shock loads is recommended.
(d) Ground all fixtures and instruments, or protect with anti-static measures.
(e) Avoid the use of styrofoam or other highly static-prone materials for storage of completed board assemblies.
3. Precautions for Use Environment
Reliability of semiconductor devices depends on ambient temperature and other conditions as described above.
For reliable performance, do the following:
(1) Humidity
Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high
humidity levels are anticipated, consider anti-humidity processing.
(2) Discharge of Static Electricity
When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal operation.
In such cases, use anti-static measures or processing to prevent discharges.
(3) Corrosive Gases, Dust, or Oil
Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely
affect the device. If you use devices in such conditions, consider ways to prevent such exposure or to protect
the devices.
(4) Radiation, Including Cosmic Radiation
Most devices are not designed for environments involving exposure to radiation or cosmic radiation. Users
should provide shielding as appropriate.
(5) Smoke, Flame
Note: Plastic molded devices are flammable, and therefore should not be used near combustible substances.
If devices begin to smoke or burn, there is danger of the release of toxic gases.
Customers considering the use of FUJITSU MICROELECTRONICS products in other special environmental
conditions should consult with sales representatives.
DS07-16911-1E
47
MB91645A Series
■ HANDLING DEVICES
• Power supply pins
In products with multiple VCC, VDDI and VSS pins, respective pins at the same potential are interconnected within
the device in order to prevent malfunctions such as latch-up. However, all of these pins should be connected
externally to the power supply or ground lines in order to reduce electromagnetic emission levels, to prevent
abnormal operation of strobe signals caused by the rise in the ground level, and to conform to the total output
current rating.
Moreover, connect the current supply source with the VCC, VDDI and VSS pins of this device at low impedance.
It is also advisable that a ceramic capacitor of approximately 0.1 μF be connected as a bypass capacitor between
VCC and VSS pins, and VDDI and VSS pins near this device.
• Noise measurement of VDDI pins (recommended)
VDDI pins are affected with a noise because internal core type of power-supply is used, and it may be a problem
related with a radiated noise.
It is recommended to set a pad (land) to each VDDI in advance, so that ferrites (beads) can be input (set decoupling
capacitors and ferrites very close to LSI).
If a problem occurs with the radiated noise, insert ferrite parts.
(Connect the pads with 0 Ω connector if ferrite parts are no longer required.)
Example recommended pattern
Set a PAD.
LSI
VDDI
Vss
VDDI
Vss
48
DS07-16911-1E
MB91645A Series
• Crystal oscillator circuit
Noise near the X0 and X1 pins may cause the device to malfunction. Design the printed circuit board so that X0,
X1, the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground are located as close to the
device as possible.
It is strongly recommended that the PC board artwork be designed such that the X0 and X1 pins are surrounded
by ground plane as this is expected to produce stable operation.
If a 32 kHz oscillator is used (X0A, X1A), use the PK2 pin for an input that changes as infrequently as possible.
Furthermore, take steps such as shown in the following figure to prevent the X0A and PK2 wiring from running
parallel to each other.
If 32 kHz oscillation is not used, there are no limitations.
X0A
GND
PK2
• Using an external clock
When using an external clock, the clock signal should be input to the X0 pin only and the X1 should be kept open.
• Example of Using an External Clock
MB91645A series
X0
Open
X1
• Mode pins (MD0, MD1)
Connect the MD pin (MD0, MD1) directly to VCC or VSS pins. Design the printed circuit board such that the pullup/down resistance stays low, as well as the distance between the mode pins and VCC pins or VSS pins is as
short as possible and the connection impedance is low, when the pins are pulled-up/down such as for switching
the pin level and rewriting the Flash memory data. It is because of preventing the device erroneously switching
to test mode due to noise.
DS07-16911-1E
49
MB91645A Series
• Notes on power-on
• To ensure that the oscillator have stabilized immediately after the power is turned on, keep an “L” level input
connected to the INIT pin for the duration of the oscillator start time of the oscillator + the main oscillator
stabilization wait time.
• Turn power on/off in the following order
Turning on : VDDI → VCC → AVCC → AVRH
Turning off : AVRH → AVCC → VCC → VDDI
Release the reset (INIT pin “L” level to “H” level) after the power supply has stabilized.
• Caution on Operations during PLL Clock Mode
On this microcontroller, if in case the crystal oscillator breaks off or an external reference clock input stops while
the PLL clock mode is selected, a self-oscillator circuit contained in the PLL may continue its operation at its
self-running frequency.
However, Fujitsu Microelectronics will not guarantee results of operations if such failure occurs.
Note: Changes of PLL clock specification from MB91645 series
PLL macro
Product type
oscillation clock
Temperature range
frequency
PLL multiple rate
Multiplied by 15
Multiplied by 30
16 MHz to 60 MHz
− 20 °C to + 85 °C
50 MHz to 60 MHz
− 40 °C to + 85 °C
Divided by
1 to 4
80 MHz to 120 MHz
− 40 °C to + 85 °C
Divided by 2 to 4
MB91F647
MB91F647A
PLL macro
oscillation clock
divider
MB91645A series has been modified, and specifications of the PLL macro oscillation clock frequency,
temperature range, PLL macro oscillation clock division value, and PLL multiple rate prohibit the setting of
dividing by 1.
Therefore, please use the device with setting as dividing by 2 to 4 by ODS0 or ODS1 bit in the PLL configuration register (PLLCR).
Example) To use the PLL clock at 60MHz
50
Product type
PLL input clock
frequency
PDS
ODS
PMS
PLL macro
oscillation clock
frequency
MB91F647
4 MHz
0000
00
1110
60 MHz
MB91F647A
4 MHz
0000
01
1110
120 MHz
DS07-16911-1E
MB91645A Series
■ BLOCK DIAGRAM
FR80
CPU
Built-in program
memory Flash
memory
Cross bar
switch
RAM
On-chip bus
DMAC
8 channels
Peripheral bus
bridge
Watchdog timer
Interrupt controller
Delay interrupt
Clock generation
Watch counter
16 -bit reload timer
3 channels
32-bit free-run timer
2channels
Base timer
16 channels
Up/down counter
4 channels
32-bit input capture
8 channels
A/D converter
32 channels (2 units)
32-bit output compare
8 channels
D/A converter
3 channels
Multi-function serial interface
8 channels
Port
Port
External interrupt
32 channels
16 -bit peripheral bus
Clock control
32 -bit peripheral bus
External bus I/F
Multi-function serial interface
with FIFO 4 channels
Port
DS07-16911-1E
51
MB91645A Series
■ MEMORY SPACE
1. Memory Space
The FR family has 4 Gbytes of logical address space (232 addresses) available to the CPU by linear access.
• Direct Addressing Areas
The following areas in the address space are used as I/O areas.
These areas are called direct addressing areas, and the address of an operand in these areas can be specified
directly within an instruction. The size of the directly addressable area depends on the length of the data being
accessed as follows.
• Byte data access
: 0000 0000H to 0000 00FFH
• Half word data access : 0000 0000H to 0000 01FFH
• Word data access
: 0000 0000H to 0000 03FFH
52
DS07-16911-1E
MB91645A Series
2. Memory Map
MB91F647A
Flash 512 Kbytes
RAM 48 Kbytes
0000 0000H
I/O area
(Direct addressing)
0000 0400H
I/O area
0001 0000H
Reserved
0003 4000H
0004 0000H
Internal RAM area
48 Kbytes
Reserved
0008 0000H
000F 0000H
0010 0000H
Flash area
512 Kbytes
Small sector area
Reserved
0024 0000H
External bus area
FFFF FFFFH
Notes: • Small sector area is related to flash products only. Please refer to “Flash Memory” in the “Hardware
Manual” for more details.
• Do not access the reserved areas.
DS07-16911-1E
53
MB91645A Series
■ I/O MAP
[How to read the table]
Address
Register
Block
+0
+1
+2
+3
0000 0000H
PDR0 [R/W] B, H
XXXXXXXX
PDR1 [R/W] B, H
XXXXXXXX
PDR2 [R/W] B, H
XXXXXXXXXXX
PDR3 [R/W] B, H
XXXXXXXX
0000 003CH
WDTCR0 [R/W]
B, H
-0--0000
WDTCPR0 [R/W]
B, H
00000000
⎯
Watchdog
timer
0000 0040H
EIRR0 [R/W] B, H,
W
000 0000
ENIR0 [R/W]
B, H, W
00000000
ELVR0 [R/W] B, H, W
00000000 00000000
External
interrupt
0 to 7
Port data
register
⎯ : Reserved area
Initial value after reset
“1” : Initial value“1”
“0” : Initial value“0”
“X” : Initial value undefined
“ - ” : Reserved bit or undefined bit
Access unit
(B : byte, H : half word, W : word)
Read/write attribute
“R”
: Indicates that there is a read only bit.
“R/W” : Indicates that there is a read/write bit.
“W” : Indicates that there is a write only bit.
Register name (column 1 of the register is at address 4n, column 2 is
at address 4 n + 2...)
Leftmost register address (For word-length access, column 1 of the
register is the MSB of the data.)
Notes: • When performing a data access, the addresses should be as below.
- Word access : Address should be multiples of 4 (least significant 2 bits should be "00B")
- Half word access : Address should be multiples of 2 (least significant bit should be "0B")
- Byte access : ⎯
• Do not access the reserved areas.
54
DS07-16911-1E
MB91645A Series
Register
Address
+0
+1
+2
+3
0000 0000H
PDR0 [R/W] B,H
XXXXXXXX
PDR1 [R/W] B,H
XXXXXXXX
PDR2 [R/W] B,H
XXXXXXXX
PDR3 [R/W] B,H
XXXXXXXX
0000 0004H
PDR4 [R/W] B,H
XXXXXXXX
PDR5 [R/W] B,H
XXXXXXXX
PDR6 [R/W] B,H
XXXXXXXX
PDR7[R/W] B,H
XXXXXXXX
0000 0008H
PDR8 [R/W] B,H
XXXXXXXX
PDR9 [R/W] B,H
-----XXX
PDRA [R/W] B,H
XXXXXXXX
PDRB[R/W] B,H
XXXXXXXX
0000 000CH
PDRC [R/W] B,H
XXXXXXXX
PDRD [R/W] B,H
XXXXXXXX
PDRE [R/W] B,H
XXXXXXXX
PDRF [R/W] B,H
-XXXXXXX
0000 0010H
PDRG [R/W] B,H
XXXXXXXX
PDRH [R/W] B,H
XXXXXXXX
PDRI [R/W] B,H
XXXXXXXX
PDRJ [R/W] B,H
-----XXX
0000 0014H
PDRK [R/W] B
----XXXX
⎯
0000 0020H
to
0000 0038H
⎯
0000 0040H
WDTCR0[R/W]
B,H
-0--0000
Reserved
WDTCPR0[R/W]
B,H
00000000
EIRR0[R/W] B,H,W ENIR0[R/W] B,H,W
00000000
00000000
0000 0044H
Port data
register
⎯
0000 0018H
to
0000 001CH
0000 003CH
Block
DICR [R/W] B
-------0
⎯
Watchdog
timer
ELVR0[R/W] B,H,W
00000000 00000000
External
interrupt
0 to 7
⎯
0000 0048H
TMRLRA0 [R/W] H
XXXXXXXX XXXXXXXX
TMR0 [R] H
XXXXXXXX XXXXXXXX
0000 004CH
⎯
TMCSR0 [R/W] H
--000000 --000000
0000 0050H
TMRLRA1 [R/W] H
XXXXXXXX XXXXXXXX
TMR1 [R] H
XXXXXXXX XXXXXXXX
0000 0054H
⎯
TMCSR1 [R/W] H
--000000 --000000
0000 0058H
TMRLRA2 [R/W] H
XXXXXXXX XXXXXXXX
TMR2 [R] H
XXXXXXXX XXXXXXXX
0000 005CH
⎯
TMCSR2 [R/W] H
--000000 --000000
Delay
interrupt
16-bit
reload timer
ch.0
16-bit
reload timer
ch.1
16-bit
reload timer
ch.2
(Continued)
DS07-16911-1E
55
MB91645A Series
Address
0000 0060H
0000 0064H
0000 0068H
Register
+0
+1
+2
+3
SCR0
[R/W] B,H,W
0--00000
SMR0 [R/W] B,H,W
000-0000
SSR0 [R,R/W]
B,H,W
0-000011
ESCR0
[R/W] B,H,W
-0000000
BGR10[R/W]H,W
00000000
BGR00[R/W] H,W
00000000
SSR1 [R,R/W]
B,H,W
0-000011
ESCR1 [R/W]/
IBSR1
[R,R/W] B,H,W*2
-0000000
BGR11[R/W] H,W
00000000
BGR01[R/W] H,W
00000000
RDR0[R]/TDR0[W] B,H,W*1
-------0 00000000
SCR1 [R/W] /
IBCR1
[R,R/W] B,H,W*2
0--00000
SMR1 [R/W] B,H,W
000-0000
0000 006CH
RDR1[R]/TDR1[W] B,H,W*1
-------0 00000000
0000 0070H
ISMK1 [R/W] B,H*2 ISBA1 [R/W] B,H*2
---------------
0000 0074H
SCR2 [R/W] /
IBCR2
[R,R/W] B,H,W*2
0--00000
SMR2 [R/W] B,H,W
000-0000
1
0000 0078H
RDR2[R]/TDR2[W] B,H,W*
-------0 00000000
0000 007CH
ISMK2 [R/W] B,H*2 ISBA2 [R/W] B,H*2
---------------
0000 0080H
SCR3 [R/W] /
IBCR3
[R,R/W] B,H,W*2
0--00000
SMR3 [R/W] B,H,W
000-0000
0000 0084H
RDR3[R]/TDR3[W] B,H,W*1
-------0 00000000
0000 0088H
ISMK3 [R/W] B,H*2 ISBA3 [R/W] B,H*2
---------------
0000 008CH
SCR4 [R/W] /
IBCR4
[R,R/W] B,H,W*2
0--00000
SMR4 [R/W] B,H,W
000-0000
0000 0090H
RDR4[R]/TDR4[W] B,H,W*1
-------0 00000000
0000 0094H
ISMK4 [R/W] B,H*2 ISBA4 [R/W] B,H*2
---------------
Block
Multi-function
serial interface
ch.0
Multi-function
serial interface
ch.1
⎯
SSR2 [R,R/W]
B,H,W
0-000011
ESCR2 [R/W]/
IBSR2 [R,R/W]
B,H,W*2
-0000000
BGR12[R/W] H,W
00000000
BGR02[R/W] H,W
00000000
Multi-function
serial interface
ch.2
⎯
SSR3 [R,R/W]
B,H,W
0-000011
ESCR3 [R/W]/
IBSR3 [R,R/W]
B,H,W*2
-0000000
BGR13[R/W] H,W
00000000
BGR03[R/W] H,W
00000000
Multi-function
serial interface
ch.3
⎯
SSR4 [R,R/W]
B,H,W
0-000011
ESCR4 [R/W] /
IBSR4 [R,R/W]
B,H,W*2
-0000000
BGR14[R/W] H,W
00000000
BGR04[R/W] H,W
00000000
Multi-function
serial interface
ch.4
⎯
(Continued)
56
DS07-16911-1E
MB91645A Series
Register
Address
0000 0098H
+0
+1
+2
+3
SCR5 [R/W]/
IBCR5
[R,R/W] B,H,W*2
0--00000
SMR5 [R/W]
B,H,W
000-0000
SSR5 [R,R/W]
B,H,W
0-000011
ESCR5 [R/W]/
IBSR5 [R,R/W]
B,H,W*2
-0000000
Multi-function
serial interface
BGR15 [R/W] H,W BGR05 [R/W] H,W
ch.5
00000000
00000000
1
0000 009CH
RDR5[R]/TDR5[W] B,H,W*
-------0 00000000
0000 00A0H
ISMK5 [R/W] B,H*2 ISBA5 [R/W] B,H*2
--------------SCR6 [R/W]/
IBCR6 [R,R/W]
B,H,W*2
0--00000
0000 00A4H
SMR6 [R/W]
B,H,W
000-0000
ESCR6 [R/W]/
IBSR6
[R,R/W] B,H,W*2
-0000000
Multi-function
serial interface
BGR16 [R/W] H,W BGR06 [R/W] H,W
ch.6
00000000
00000000
RDR6[R]/TDR6[W] B,H,W*1
-------0 00000000
0000 00ACH
ISMK6 [R/W] B,H*2 ISBA6 [R/W] B,H*2
---------------
0000 00B0H
⎯
SSR6 [R,R/W]
B,H,W
0-000011
0000 00A8H
SCR7 [R/W]/
IBCR7
[R,R/W] B,H,W*2
0--00000
SMR7 [R/W]
B,H,W
000-0000
⎯
ESCR7 [R/W]/
IBSR7 [R,R/W]
B,H,W*2
-0000000
SSR7 [R,R/W]
B,H,W
0-000011
Multi-function
serial interface
BGR17 [R/W] H,W BGR07 [R/W] H,W
ch.7
00000000
00000000
0000 00B4H
RDR7[R]/TDR7[W] B,H,W*1
-------0 00000000
0000 00B8H
ISMK7 [R/W] B,H*2 ISBA7 [R/W] B,H*2
---------------
⎯
⎯
0000 00BCH
Reserved
0000 00C0H
RDRM0 [R]/
TDRM0
[W] B,H,W
00000000
RDRM1 [R]/
TDRM1
[W] B,H,W
00000000
RDRM2 [R]/
TDRM2
[W] B,H,W
00000000
RDRM3 [R]/
TDRM3
[W] B,H,W
00000000
0000 00C4H
RDRM4 [R]/
TDRM4
[W] B,H,W
00000000
RDRM5 [R]/
TDRM5
[W] B,H,W
00000000
RDRM6 [R]/
TDRM6
[W] B,H,W
00000000
RDRM7 [R]/
TDRM7
[W] B,H,W
00000000
0000 00C8H
SSEL0123 [R/W] B
------00
⎯
SSEL4567 [R/W] B
------00
0000 00CCH
Block
⎯
⎯
Multi-function
serial interface
data register
(mirror)
Multi-function
serial interface
serial clock
selection
Reserved
(Continued)
DS07-16911-1E
57
MB91645A Series
Address
0000 00D0H
Register
+0
+1
+2
+3
SCR8 [R/W]/
IBCR8
[R,R/W] B,H,W*2
0--00000
SMR8 [R/W]
B,H,W
000-0000
SSR8 [R,R/W]
B,H,W
0-000011
ESCR8 [R/W]/
IBSR8
[R,R/W] B,H,W*2
-0000000
0000 00D4H
RDR8[R]/TDR8[W] B,H,W*1
-------0 00000000
BGR18 [R/W] H,W BGR08 [R/W] H,W
00000000
00000000
0000 00D8H
ISMK8 [R/W] B,H*2 ISBA8 [R/W] B,H*2
---------------
⎯
0000 00DCH
FCR18 [R/W]
B,H,W
---00100
FCR08 [R,R/W]
B,H,W
-0000000
FBYTE28 [R/W]
B,H,W
00000000
FBYTE18 [R/W]
B,H,W
00000000
0000 00E0H
SCR9 [R/W]/
IBCR9
[R,R/W] B,H,W*2
0--00000
SMR9 [R/W]
B,H,W
000-0000
SSR9 [R,R/W]
B,H,W
0-000011
ESCR9 [R/W]/
IBSR9 [R,R/W]
B,H,W*2
-0000000
0000 00E4H
RDR9[R]/TDR9[W] B,H,W*1
-------0 00000000
BGR19 [R/W] H,W BGR09 [R/W] H,W
00000000
00000000
0000 00E8H
ISMK9 [R/W] B,H*2 ISBA9 [R/W] B,H*2
---------------
⎯
0000 00ECH
FCR19 [R/W]
B,H,W
---00100
FCR09 [R,R/W]
B,H,W
-0000000
FBYTE29 [R/W]
B,H,W
00000000
FBYTE19 [R/W]
B,H,W
00000000
0000 00F0H
SCR10 [R/W]/
IBCR10
[R,R/W] B,H,W*2
0--00000
SMR10 [R/W]
B,H,W
000-0000
SSR10 [R,R/W]
B,H,W
0-000011
ESCR10 [R/W]/
IBSR10
[R,R/W] B,H,W*2
-0000000
BGR110 [R/W]
H,W
00000000
BGR010 [R/W]
H,W
00000000
0000 00F4H
RDR10[R]/TDR10[W] B,H,W*1
-------0 00000000
0000 00F8H
ISMK10 [R/W]
B,H*2
--------
ISBA10 [R/W]
B,H*2
--------
0000 00FCH
FCR110 [R/W]
B,H,W
---00100
FCR010 [R,R/W]
B,H,W
-0000000
⎯
FBYTE210 [R/W]
B,H,W
00000000
Block
Multi-function
serial interface
ch. 8
(FIFO)
Multi-function
serial interface
ch. 9
(FIFO)
Multi-function
serial interface
ch.10
(FIFO)
FBYTE110 [R/W]
B,H,W
00000000
(Continued)
58
DS07-16911-1E
MB91645A Series
Register
Address
0000 0100H
+0
+1
+2
+3
SCR11 [R/W]/
IBCR11
[R,R/W] B,H,W*2
0--00000
SMR11 [R/W]
B,H,W
000-0000
SSR11 [R,R/W]
B,H,W
0-000011
ESCR11 [R/W]/
IBSR11
[R,R/W] B,H,W*2
-0000000
Block
RDR11[R]/TDR11[W] B,H,W*1
-------0 00000000
0000 0104H
0000 0108H
ISMK11 [R/W]
B,H*2
--------
0000 010CH
FCR111 [R/W]
B,H,W
---00100
BGR111 [R/W] H,W BGR011 [R/W] H,W Multi-function
00000000
00000000
serial interface
ch.11
ISBA11 [R/W] B,H*2
(FIFO)
⎯
-------FCR011 [R,R/W]
B,H,W
-0000000
FBYTE211 [R/W]
B,H,W
00000000
FBYTE111 [R/W]
B,H,W
00000000
0000 0110H
EIRR1[R/W] B,H,W ENIR1[R/W] B,H,W
00000000
00000000
ELVR1[R/W] B,H,W
00000000 00000000
External
interrupt
8 to 15
0000 0114H
EIRR2[R/W] B,H,W ENIR2[R/W] B,H,W
00000000
00000000
ELVR2[R/W] B,H,W
00000000 00000000
External
interrupt
16 to 23
0000 0118H
EIRR3[R/W] B,H,W ENIR3[R/W] B,H,W
00000000
00000000
ELVR3[R/W] B,H,W
00000000 00000000
External
interrupt
24 to 31
⎯
0000 011CH
Reserved
0000 0120H
ADCR0[R/W] B,H
000-0000
ADSR0[R,R/W]
B,H
00---000
⎯
0000 0124H
SCCR0[R,R/W]
B,H
1000-000
SFNS0[R/W] B,H
----0000
SCFD0[R] B,H
XXXXXXXX XX-XXXXX
0000 0128H
SCIS30[R/W]
B,H,W
00000000
SCIS20[R/W]
B,H,W
00000000
0000 012CH
PCCR0[R,R/W]
B,H
1000-000
PFNS0[R/W] B,H
------00
PCFD0[R] B,H
XXXXXXXX XXXXXXXX
0000 0130H
PCIS0[R/W] B
00000000
⎯
CMPD0[R/W] B,H CMPCR0[R/W] B,H
00000000
00000000
0000 0134H
ADSS30[R/W]
B,H,W
00000000
ADSS20[R/W]
B,H,W
00000000
0000 0138H
ADST00[R/W] B,H ADST10[R/W] B,H
00100000
00100000
SCIS10[R/W]
B,H,W
00000000
SCIS00[R/W]
B,H,W
00000000
ADSS10[R/W]
B,H,W
00000000
ADSS00[R/W]
B,H,W
00000000
ADCT0[R/W] B
-----111
⎯
A/D
converter
unit 0
(Continued)
DS07-16911-1E
59
MB91645A Series
Address
Register
+0
+1
0000 0144H
0000 0148H
BT0TMR[R]H
00000000 00000000
⎯
0000 0154H
0000 0158H
0000 0164H
0000 0168H
0000 0174H
0000 0178H
⎯
BT0PDUT/BT0PRLH/BT0DTBF[R/W]H
XXXXXXXX XXXXXXXX
BT1TMR[R]H
00000000 00000000
⎯
BT1TMCR[R/W] B,H
-0000000 00000000
BT1STC[R/W]B
0000-000
⎯
BT1PCSR/BT1PRLL[R/W]H
XXXXXXXX XXXXXXXX
BT1PDUT/BT1PRLH/BT1DTBF[R/W]H
XXXXXXXX XXXXXXXX
Base timer
ch.1
⎯
BT2TMR[R]H
00000000 00000000
⎯
BT2TMCR [R/W] B,H
-0000000 00000000
BT2STC[R/W]B
0000-000
⎯
BT2PCSR/BT2PRLL[R/W]H
XXXXXXXX XXXXXXXX
BT2PDUT/BT2PRLH/BT2DTBF[R/W]H
XXXXXXXX XXXXXXXX
Base timer
ch.2
⎯
BT3TMR[R]H
00000000 00000000
⎯
BT3TMCR[R/W] B,H
-0000000 00000000
BT3STC[R/W]B
0000-000
⎯
BT3PCSR/BT3PRLL[R/W]H
XXXXXXXX XXXXXXXX
BT3PDUT/BT3PRLH/BT3DTBF[R/W]H
XXXXXXXX XXXXXXXX
0000 017CH
BTSEL0123 [R/W] B
00000000
0000 0180H
DACR0[R/W] B,H,W
-------0
DADR0[R/W]
B,H,W
XXXXXXXX
0000 0184H
DACR2[R/W] B,H
-------0
DADR2[R/W] B,H
XXXXXXXX
0000 0188H
to
0000 018CH
Base timer
ch.0
⎯
0000 016CH
0000 0170H
BT0TMCR[R/W] B,H
-0000000 00000000
BT0PCSR/BT0PRLL[R/W]H
XXXXXXXX XXXXXXXX
0000 015CH
0000 0160H
Block
Reserved
BT0STC[R/W]B
0000-000
0000 014CH
0000 0150H
+3
⎯
0000 013CH
0000 0140H
+2
Base timer
ch.3
⎯
DACR1[R/W]
B,H,W
-------0
DADR1[R/W]
B,H,W
XXXXXXXX
⎯
D/A
converter
⎯
(Continued)
60
DS07-16911-1E
MB91645A Series
Register
Address
0000 0190H
+0
+1
ADCR1[R/W] B,H
000-0000
ADSR1[R,R/W]
B,H
00---000
+2
+3
⎯
0000 0194H
SCCR1[R,R/W] B,H SFNS1[R/W] B,H
1000-000
----0000
0000 0198H
SCIS31[R/W] B,H,W
00000000
0000 019CH
PCCR1[R,R/W] B,H PFNS1[R/W] B,H
1000-000
------00
SCIS21[R/W]
B,H,W
00000000
SCFD1[R] B,H
XXXXXXXX XX-XXXXX
SCIS11[R/W]
B,H,W
00000000
SCIS01[R/W]
B,H,W
00000000
PCFD1[R] B,H
XXXXXXXX XXXXXXXX
0000 01A0H
PCIS1[R/W] B
00000000
⎯
CMPD1[R/W] B,H
00000000
CMPCR1[R/W]
B,H
00000000
0000 01A4H
ADSS31[R/W]
B,H,W
00000000
ADSS21[R/W]
B,H,W
00000000
ADSS11[R/W]
B,H,W
00000000
ADSS01[R/W]
B,H,W
00000000
ADCT1[R/W] B
-----111
⎯
0000 01A8H
ADST01[R/W] B,H ADST11[R/W] B,H
00100000
00100000
ADCHE [R/W] B,H,W
11111111 11111111 11111111 11111111
0000 01ACH
IRPR0H [R] B
000-----
0000 01B0H
IRPR1H [R] B,H
000-000-
⎯
IRPR1L [R] B,H
000-000-
IRPR2H [R] B,H,W IRPR2L [R] B,H,W IRPR3H [R] B,H,W IRPR3L [R] B,H,W
0000---000----0000---00000---
0000 01B8H
IRPR4H [R] B,H,W IRPR4L [R] B,H,W IRPR5H [R] B,H,W IRPR5L [R] B,H,W
0000---000000-0000---0000----
0000 01BCH
IRPR6H [R] B,H,W IRPR6L [R] B,H,W IRPR7H [R] B,H,W IRPR7L [R] B,H,W
0000---0000---0000---0000----
0000 01C4H
RCRH0 [W] H,W
00000000
RCRL0 [W] B,H,W UDCRH0 [R] H,W
00000000
00000000
CCR0 [R,R/W] B,H
00000000 -0001000
⎯
0000 01C8H
⎯
0000 01CCH
⎯
A/D
converter
unit 1
A/D channel
enable
0000 01B4H
0000 01C0H
Block
UDCRL0 [R]
B,H,W
00000000
CSR0 [R,R/W] B
00000000
Interrupt
request
batch read
function
Up/down
counter ch.0
Reserved
(Continued)
DS07-16911-1E
61
MB91645A Series
Address
0000 01D0H
0000 01D4H
Register
+0
+1
RCRH1 [W] H,W
00000000
+2
RCRL1 [W] B,H,W UDCRH1 [R] H,W
00000000
00000000
CCR1 [R,R/W] B,H
00000000 -0001000
⎯
0000 01DCH
⎯
0000 01E4H
RCRH2 [W] H,W
00000000
⎯
0000 01ECH
⎯
0000 01F0H
0000 01F4H
RCRH3 [W] H,W
00000000
UDCRL3 [R]
B,H,W
00000000
CSR3 [R,R/W] B
00000000
⎯
0000 01F8H
⎯
0000 01FCH
⎯
0000 0200H
CPCLR0 [R/W] W
11111111 11111111 11111111 11111111
0000 0204H
TCDT0 [R/W] W
00000000 00000000 00000000 00000000
0000 0208H
TCCSH0 [R/W] B,H TCCSL0 [R/W] B,H
0-----00
-1-00000
⎯
0000 0210H
IPCP1 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0214H
IPCP2 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0218H
IPCP3 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ICS01 [R/W] B
00000000
Up/down
counter ch.3
32-bit
Free-run timer
ch.0
IPCP0 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
⎯
Up/down
counter ch.2
Reserved
0000 020CH
0000 021CH
Up/down
counter ch.1
Reserved
RCRL3 [W] B,H,W UDCRH3 [R] H,W
00000000
00000000
CCR3 [R,R/W] B,H
00000000 -0001000
UDCRL2 [R]
B,H,W
00000000
CSR2 [R,R/W] B
00000000
⎯
0000 01E8H
Block
Reserved
RCRL2 [W] B,H,W UDCRH2 [R] H,W
00000000
00000000
CCR2 [R,R/W] B,H
00000000 -0001000
UDCRL1 [R]
B,H,W
00000000
CSR1 [R,R/W] B
00000000
⎯
0000 01D8H
0000 01E0H
+3
⎯
32-bit
Input capture
ch.0 to ch.3
ICS23 [R/W] B
00000000
(Continued)
62
DS07-16911-1E
MB91645A Series
Register
Address
+0
+1
+2
+3
0000 0220H
IPCP4 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0224H
IPCP5 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0228H
IPCP6 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 022CH
IPCP7 [R] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
ICS45 [R/W] B
00000000
⎯
0000 0230H
OCCP0 [R/W] W
00000000 00000000 00000000 00000000
0000 0238H
OCCP1 [R/W] W
00000000 00000000 00000000 00000000
0000 023CH
OCCP2 [R/W] W
00000000 00000000 00000000 00000000
0000 0240H
OCCP3 [R/W] W
00000000 00000000 00000000 00000000
OCSH1 [R/W] B,H,W
---0--00
OCSL0 [R/W]
B,H,W
0000--00
OCSH3 [R/W]
B,H,W
---0--00
OCCP4 [R/W] W
00000000 00000000 00000000 00000000
0000 024CH
OCCP5 [R/W] W
00000000 00000000 00000000 00000000
0000 0250H
OCCP6 [R/W] W
00000000 00000000 00000000 00000000
0000 0254H
OCCP7 [R/W] W
00000000 00000000 00000000 00000000
OCSH5 [R/W] B,H,W
---0--00
0000 025CH
FRTSEL [R/W] B
------00
OCSL4 [R/W]
B,H,W
0000--00
OCSH7 [R/W]
B,H,W
---0--00
Free-run timer
selector
⎯
CPCLR1 [R/W] W
11111111 11111111 11111111 11111111
0000 0264H
TCDT1 [R/W] W
00000000 00000000 00000000 00000000
TCCSH1 [R/W] B,H TCCSL1 [R/W] B,H
0-----00
-1-00000
32-bit
Output
compare
ch.4 to ch.7
OCSL6 [R/W]
B,H,W
0000--00
0000 0260H
0000 0268H
32-bit
Output
compare
ch.0 to ch.3
OCSL2 [R/W]
B,H,W
0000--00
0000 0248H
0000 0258H
32-bit
Input capture
ch.4 to ch.7
ICS67 [R/W] B
00000000
⎯
0000 0234H
0000 0244H
Block
32-bit
Free-run timer
ch.1
⎯
(Continued)
DS07-16911-1E
63
MB91645A Series
Address
Register
+0
+1
0000 026CH
to
0000 031CH
0000 0320H
+3
⎯
FCTLR[R/W] H
-0--1011 --------
0000 0324H
to
0000 0334H
0000 0338H
+2
Reserved
⎯
FSTR[R] B
-------1
⎯
Flash memory
control
Reserved
WREN[R/W] B,H
00000000 00000000
⎯
Block
0000 033CH
⎯
0000 0340H
to
0000 037CH
⎯
0000 0380H
WRAR00[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 0384H
WRDR00[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0388H
WRAR01[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 038CH
WRDR01[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0390H
WRAR02[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 0394H
WRDR02[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0398H
WRAR03[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 039CH
WRDR03[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03A0H
WRAR04[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03A4H
WRDR04[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03A8H
WRAR05[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03ACH
WRDR05[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03B0H
WRAR06[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
Wild register
Reserved
Wild register
(Continued)
64
DS07-16911-1E
MB91645A Series
Address
Register
+0
+1
+2
0000 03B4H
WRDR06[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03B8H
WRAR07[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03BCH
WRDR07[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03C0H
WRAR08[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03C4H
WRDR08[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03C8H
WRAR09[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03CCH
WRDR09[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03D0H
WRAR10[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03D4H
WRDR10[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03D8H
WRAR11[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03DCH
WRDR11[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03E0H
WRAR12[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03E4H
WRDR12[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03E8H
WRAR13[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03ECH
WRDR13[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03F0H
WRAR14[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03F4H
WRDR14[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 03F8H
WRAR15[R/W] W
-------- --XXXXXX XXXXXXXX XXXXXX--
0000 03FCH
WRDR15[R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
+3
Block
Wild register
(Continued)
DS07-16911-1E
65
MB91645A Series
Address
Register
Block
+0
+1
+2
+3
0000 0400H
DDR0 [R/W] B,H
00000000
DDR1 [R/W] B,H
00000000
DDR2 [R/W] B,H
00000000
DDR3 [R/W] B,H
00000000
0000 0404H
DDR4 [R/W] B,H
00000000
DDR5 [R/W] B,H
00000000
DDR6 [R/W] B,H
00000000
DDR7[R/W] B,H
00000000
0000 0408H
DDR8 [R/W] B,H
00000000
DDR9 [R/W] B,H
-----000
DDRA [R/W] B,H
00000000
DDRB[R/W] B,H
00000000
0000 040CH
DDRC [R/W] B,H
00000000
DDRD [R/W] B,H
00000000
DDRE [R/W] B,H
00000000
0000 0410H
DDRG [R/W] B,H
00000000
DDRH [R/W] B,H
00000000
DDRI [R/W] B,H
00000000
DDRF [R/W] B,H
Data direction
-0000000
register
DDRJ [R/W] B,H
-----000
0000 0414H
DDRK [R/W] B
----0000
⎯
0000 0418H
to
0000 041CH
⎯
0000 0420H
PCR0 [R/W] B,H
00000000
PCR1 [R/W] B,H
00000000
0000 0424H
⎯
PCR5 [R/W] B
00000000
PCR6 [R/W] B,H
00000000
PCR7[R/W] B,H
00000000
0000 0428H
PCR8 [R/W] B,H
00000000
PCR9 [R/W] B,H
-----000
PCRA [R/W] B,H
00000000
PCRB[R/W] B,H
00000000
0000 042CH
PCRC [R/W] B,H
00000000
PCRD [R/W] B,H
00000000
PCRE [R/W] B,H
00000000
PCRF [R/W] B,H
-0000000
0000 0438H
to
0000 043CH
PCRJ [R/W] B
-----000
⎯
0000 0430H
0000 0434H
⎯
PCRK [R/W] B
----00--
Pull-up
control
register
⎯
⎯
(Continued)
66
DS07-16911-1E
MB91645A Series
Register
Address
+0
+1
+2
+3
0000 0440H
ICR00 [R,R/W]
B,H,W
---11111
ICR01 [R,R/W]
B,H,W
---11111
ICR02 [R,R/W]
B,H,W
---11111
ICR03 [R,R/W]
B,H,W
---11111
0000 0444H
ICR04 [R,R/W]
B,H,W
---11111
ICR05 [R,R/W]
B,H,W
---11111
ICR06 [R,R/W]
B,H,W
---11111
ICR07 [R,R/W]
B,H,W
---11111
0000 0448H
ICR08 [R,R/W]
B,H,W
---11111
ICR09 [R,R/W]
B,H,W
---11111
ICR10 [R,R/W]
B,H,W
---11111
ICR11 [R,R/W]
B,H,W
---11111
0000 044CH
ICR12 [R,R/W]
B,H,W
---11111
ICR13 [R,R/W]
B,H,W
---11111
ICR14 [R,R/W]
B,H,W
---11111
ICR15 [R,R/W]
B,H,W
---11111
0000 0450H
ICR16 [R,R/W]
B,H,W
---11111
ICR17 [R,R/W]
B,H,W
---11111
ICR18 [R,R/W]
B,H,W
---11111
ICR19 [R,R/W]
B,H,W
---11111
0000 0454H
ICR20 [R,R/W]
B,H,W
---11111
ICR21 [R,R/W]
B,H,W
---11111
ICR22 [R,R/W]
B,H,W
---11111
ICR23 [R,R/W]
B,H,W
---11111
0000 0458H
ICR24 [R,R/W]
B,H,W
---11111
ICR25 [R,R/W]
B,H,W
---11111
ICR26 [R,R/W]
B,H,W
---11111
ICR27 [R,R/W]
B,H,W
---11111
0000 045CH
ICR28 [R,R/W]
B,H,W
---11111
ICR29 [R,R/W]
B,H,W
---11111
ICR30 [R,R/W]
B,H,W
---11111
ICR31 [R,R/W]
B,H,W
---11111
0000 0460H
ICR32 [R,R/W]
B,H,W
---11111
ICR33 [R,R/W]
B,H,W
---11111
ICR34 [R,R/W]
B,H,W
---11111
ICR35 [R,R/W]
B,H,W
---11111
0000 0464H
ICR36 [R,R/W]
B,H,W
---11111
ICR37 [R,R/W]
B,H,W
---11111
ICR38 [R,R/W]
B,H,W
---11111
ICR39 [R,R/W]
B,H,W
---11111
0000 0468H
ICR40 [R,R/W]
B,H,W
---11111
ICR41 [R,R/W]
B,H,W
---11111
ICR42 [R,R/W]
B,H,W
---11111
ICR43 [R,R/W]
B,H,W
---11111
0000 046CH
ICR44 [R,R/W]
B,H,W
---11111
ICR45 [R,R/W]
B,H,W
---11111
ICR46 [R,R/W]
B,H,W
---11111
ICR47 [R,R/W]
B,H,W
---11111
0000 0470H
to
0000 047CH
0000 0480H
⎯
RSTRR [R] B,H,W
11-X---X*3
0000 0484H
RSTCR [R/W]
B,H,W
000----0
Interrupt
control
Reserved
STBCR [R/W]
B,H,W
0000--11
⎯
Block
SLPRR [R/W]
B,H,W
00000000
Reset control/
Power
consumption
control
(Continued)
DS07-16911-1E
67
MB91645A Series
Address
0000 0488H
Register
+0
+1
+2
+3
DIVR0 [R/W] B,H
000-----
DIVR1 [R/W] B,H
0001----
DIVR2 [R/W] B
0011----
⎯
⎯
0000 048CH
0000 0490H
IORR0 [R/W] B,H,W
-0000000
IORR1 [R/W]
B,H,W
-0000000
IORR2 [R/W]
B,H,W
-0000000
IORR3 [R/W]
B,H,W
-0000000
0000 0494H
IORR4 [R/W] B,H,W
-0000000
IORR5 [R/W]
B,H,W
-0000000
IORR6 [R/W]
B,H,W
-0000000
IORR7 [R/W]
B,H,W
-0000000
0000 0498H
to
0000 049CH
⎯
PFR0 [R/W] B,H
00000000
PFR1 [R/W] B,H
00000000
PFR2 [R/W] B,H
00000000
PFR3 [R/W] B,H
00000000
0000 04A4H
PFR4 [R/W] B,H
00000000
PFR5 [R/W] B,H
00000000
PFR6 [R/W] B,H
00-00-0-
PFR7[R/W] B,H
00000000
0000 04A8H
PFR8 [R/W] B
00000000
⎯
PFRA [R/W] B
00-00000
⎯
0000 04ACH
PFRC [R/W] B,H
0000-0-0
PFRD [R/W] B,H
-0-0-0-0
PFRE [R/W] B
0-0--0-0
⎯
0000 04B0H
PFRG [R/W] B,H
-000-000
PFRH [R/W] B,H
00-0-0-0
PFRI [R/W] B
0000-0-0
⎯
0000 04B8H
EPFR0 [R/W] B,H
--000000
EPFR1 [R/W] B,H EPFR2 [R/W] B,H EPFR3 [R/W] B,H
--000000
--000000
--000000
0000 04BCH
EPFR4 [R/W] B,H
00000000
EPFR5 [R/W] B,H EPFR6 [R/W] B,H EPFR7 [R/W] B,H
00000000
00000000
---00000
0000 04C0H
EPFR8 [R/W] B,H
---00000
EPFR9 [R/W] B,H EPFR10 [R/W] B,H EPFR11 [R/W] B,H
---00000
---00000
---00000
0000 04C4H
EPFR12 [R/W] B,H EPFR13 [R/W] B,H EPFR14 [R/W] B,H EPFR15 [R/W] B,H
---00000
---00000
---00000
---00000
Port function
register
EPFR16 [R/W] B,H EPFR17 [R/W] B,H EPFR18 [R/W] B,H EPFR19 [R/W] B,H Extended port
---00000
---00000
00000000
-0000001
function
register
EPFR20 [R/W] B,H EPFR21 [R/W] B,H EPFR22 [R/W] B,H EPFR23 [R/W] B,H
--000000
--000000
--000000
--000000
0000 04D0H
EPFR24 [R/W] B,H EPFR25 [R/W] B,H EPFR26 [R/W] B,H EPFR27 [R/W] B,H
--000000
--000000
--000000
--000000
0000 04D4H
EPFR28 [R/W] B,H EPFR29 [R/W] B,H EPFR30 [R/W] B,H EPFR31 [R/W] B,H
00000000
00000000
----0000
-0000000
0000 04D8H
EPFR32 [R/W] B,H EPFR33 [R/W] B,H EPFR34 [R/W] B
00000000
--000000
-0000000
0000 04DCH
Peripheral
DMA
transmission
request control
⎯
0000 04B4H
0000 04CCH
Clock division
control
Reserved
0000 04A0H
0000 04C8H
Block
⎯
⎯
(Continued)
68
DS07-16911-1E
MB91645A Series
Address
Register
+0
+1
0000 04E0H
to
0000 04ECH
+2
+3
⎯
Reserved
0000 04F0H
ICSEL0[R/W]
B,H,W
-----000
ICSEL1[R/W]
B,H,W
-----000
ICSEL2[R/W]
B,H,W
-----000
ICSEL3[R/W]
B,H,W
-----000
0000 04F4H
ICSEL4[R/W]
B,H,W
------00
ICSEL5[R/W]
B,H,W
-----000
ICSEL6[R/W]
B,H,W
------00
ICSEL7[R/W]
B,H,W
------00
0000 04F8H
ICSEL8[R/W]
B,H,W
------00
ICSEL9[R/W]
B,H,W
-----000
ICSEL10[R/W]
B,H,W
----0000
ICSEL11[R/W]
B,H,W
----0000
0000 04FCH
ICSEL12[R/W] B,H
----0000
ICSEL13[R/W]
B,H
-----0-0
ICSEL14[R/W] B
------00
⎯
0000 0500H
to
0000 050CH
0000 0510H
0000 0514H
0000 0518H
⎯
CSELR [R/W]
B,H,W
001---00
CMONR [R]
B,H,W
001---00
PLLCR [R/W] B,H
--000000 11110000
WCRD [R] B,H
--000000
Block
DMA start
request clear
select function
Reserved
MTMCR [R/W]
B,H,W
00001111
STMCR [R/W]
B,H,W
0000-111
CSTBR [R/W] B
-0000000
⎯
Clock
generation/
Main timer/
Sub timer
⎯
Clock counter
WCRL [R/W] B,H WCCR [R,R/W] B
--000000
00--0000
0000 051CH
to
0000 05FCH
⎯
0000 0600H
ASR0 [R/W] W
00000000 00000000 -------- 1111-001
0000 0604H
ASR1 [R/W] W
XXXXXXXX XXXXXXXX -------- XXXX-XX0
0000 0608H
ASR2 [R/W] W
XXXXXXXX XXXXXXXX -------- XXXX-XX0
0000 060CH
ASR3 [R/W] W
XXXXXXXX XXXXXXXX -------- XXXX-XX0
0000 0610H
to
0000 063CH
⎯
Reserved
External bus I/F
(Continued)
DS07-16911-1E
69
MB91645A Series
Address
Register
+0
+1
+2
+3
Block
0000 0640H
ACR0[R/W] W
-------- -------- -------- 00--00-0
0000 0644H
ACR1[R/W] W
-------- -------- -------- XX--XX-X
0000 0648H
ACR2[R/W] W
-------- -------- -------- XX--XX-X
0000 064CH
ACR3[R/W] W
-------- -------- -------- XX--XX-X
0000 0650H
to
0000 067CH
⎯
0000 0680H
AWR0 [R/W] W
----1111 00000000 11110000 00000-0-
0000 0684H
AWR1 [R/W] W
----XXXX XXXXXXXX XXXXXXXX XXXXX-X-
0000 0688H
AWR2 [R/W] W
----XXXX XXXXXXXX XXXXXXXX XXXXX-X-
0000 068CH
AWR3 [R/W] W
----XXXX XXXXXXXX XXXXXXXX XXXXX-X-
0000 0690H
to
0000 06BCH
⎯
0000 06C0H
DMAR0 [R/W] W
-------- -------- -------- ----0000
0000 06C4H
DMAR1 [R/W] W
-------- -------- -------- ----0000
0000 06C8H
DMAR2 [R/W] W
-------- -------- -------- ----0000
0000 06CCH
DMAR3 [R/W] W
-------- -------- -------- ----0000
0000 06D0H
to
0000 06FCH
⎯
Reserved
0000 0700H
to
0000 0BFCH
⎯
Reserved
External bus
I/F
(Continued)
70
DS07-16911-1E
MB91645A Series
Address
0000 0C00H
0000 0C04H
Register
+0
+1
+2
DCSR0 [R, R/W] H
0------- -----000
DTCR0 [R/W] H
00000000 00000000
DSAR0 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C0CH
DDAR0 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C10H
DCCR1 [R/W] W
0----000 --00--00 00000000 0-000000
DCSR1 [R, R/W] H
0------- -----000
DTCR1 [R/W] H
00000000 00000000
0000 0C18H
DSAR1 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C1CH
DDAR1 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C20H
DCCR2 [R/W] W
0----000 --00--00 00000000 0-000000
0000 0C24H
DCSR2 [R, R/W] H
0------- -----000
DTCR2 [R/W] H
00000000 00000000
0000 0C28H
DSAR2 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C2CH
DDAR2 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C30H
DCCR3 [R/W] W
0----000 --00--00 00000000 0-000000
0000 0C34H
DCSR3 [R, R/W] H
0------- -----000
DSAR3 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C3CH
DDAR3 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C40H
DCCR4 [R/W] W
0----000 --00--00 00000000 0-000000
DCSR4 [R, R/W] H
0------- -----000
DMAC
DTCR3 [R/W] H
00000000 00000000
0000 0C38H
0000 0C44H
Block
DCCR0 [R/W] W
0----000 --00--00 00000000 0-000000
0000 0C08H
0000 0C14H
+3
DTCR4 [R/W] H
00000000 00000000
0000 0C48H
DSAR4 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C4CH
DDAR4 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
(Continued)
DS07-16911-1E
71
MB91645A Series
Address
0000 0C50H
0000 0C54H
Register
+0
+1
+2
+3
DCCR5 [R/W] W
0----000 --00--00 00000000 0-000000
DCSR5 [R, R/W] H
0------- -----000
DTCR5 [R/W] H
00000000 00000000
0000 0C58H
DSAR5 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C5CH
DDAR5 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C60H
DCCR6 [R/W] W
0----000 --00--00 00000000 0-000000
0000 0C64H
DCSR6 [R, R/W] H
0------- -----000
DTCR6 [R/W] H
00000000 00000000
0000 0C68H
DSAR6 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C6CH
DDAR6 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C70H
DCCR7 [R/W] W
0----000 --00--00 00000000 0-000000
0000 0C74H
DCSR7 [R, R/W] H
0------- -----000
DMAC
DTCR7 [R/W] H
00000000 00000000
0000 0C78H
DSAR7 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C7CH
DDAR7 [R/W] W
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0000 0C80H
to
0000 0DF0H
⎯
0000 0DF4H
Block
DILVR [R,R/W] B
---11111
⎯
0000 0DF8H
DMACR [R/W] W
0------- -------- 0------- --------
0000 0DFCH
to
0000 0F3CH
⎯
Reserved
(Continued)
72
DS07-16911-1E
MB91645A Series
Register
Address
+0
+1
BT4TMR[R]H
00000000 00000000
0000 0F40H
⎯
0000 0F44H
+3
Block
BT4TMCR[R/W] B,H
-0000000 00000000
BT4STC[R/W]B
0000-000
⎯
BT4PCSR/BT4PRLL[R/W]H
XXXXXXXX XXXXXXXX
0000 0F48H
Base timer ch.4
BT4PDUT/BT4PRLH/BT4DTBF[R/W]H
XXXXXXXX XXXXXXXX
⎯
0000 0F4CH
BT5TMR[R]H
00000000 00000000
0000 0F50H
⎯
0000 0F54H
BT5TMCR[R/W] B,H
-0000000 00000000
BT5STC[R/W]B
0000-000
⎯
BT5PCSR/BT5PRLL[R/W]H
XXXXXXXX XXXXXXXX
0000 0F58H
Base timer ch.5
BT5PDUT/BT5PRLH/BT5DTBF[R/W]H
XXXXXXXX XXXXXXXX
⎯
0000 0F5CH
BT6TMR[R]H
00000000 00000000
0000 0F60H
⎯
0000 0F64H
BT6TMCR[R/W] B,H
-0000000 00000000
BT6STC[R/W]B
0000-000
⎯
BT6PCSR/BT6PRLL[R/W]H
XXXXXXXX XXXXXXXX
0000 0F68H
Base timer ch.6
BT6PDUT/BT6PRLH/BT6DTBF[R/W]H
XXXXXXXX XXXXXXXX
⎯
0000 0F6CH
BT7TMR[R]H
00000000 00000000
0000 0F70H
⎯
0000 0F74H
BT7TMCR[R/W] B,H
-0000000 00000000
BT7STC[R/W]B
0000-000
⎯
BT7PCSR/BT7PRLL[R/W]H
XXXXXXXX XXXXXXXX
0000 0F78H
0000 0F7CH
+2
BT7PDUT/BT7PRLH/BT7DTBF[R/W]H
XXXXXXXX XXXXXXXX
BTSEL4567 [R/W]B
00000000
0000 0F80H
0000 0F84H
0000 0F88H
0000 0F8CH
⎯
BT8TMR[R]H
00000000 00000000
⎯
Base timer ch.7
BT8TMCR[R/W] B,H
-0000000 00000000
BT8STC[R/W]B
0000-000
⎯
BT8PCSR/BT8PRLL[R/W]H
XXXXXXXX XXXXXXXX
Base timer ch.8
BT8PDUT/BT8PRLH/BT8DTBF[R/W]H
XXXXXXXX XXXXXXXX
⎯
(Continued)
DS07-16911-1E
73
MB91645A Series
Address
0000 0F90H
0000 0F94H
0000 0F98H
Register
+0
+1
BT9TMR[R]H
00000000 00000000
⎯
0000 0FA4H
0000 0FA8H
0000 0FB4H
0000 0FB8H
0000 0FBCH
0000 0FC0H
0000 0FC4H
0000 0FC8H
0000 0FD4H
0000 0FD8H
0000 0FDCH
Block
Base timer ch.9
BT9PDUT/BT9PRLH/BT9DTBF[R/W]H
XXXXXXXX XXXXXXXX
⎯
BTATMR[R]H
00000000 00000000
⎯
BTATMCR[R/W] B,H
-0000000 00000000
BTASTC[R/W]B
0000-000
⎯
BTAPDUT/BTAPRLH/BTADTBF
[R/W]H
XXXXXXXX XXXXXXXX
BTAPCSR/BTAPRLL[R/W]H
XXXXXXXX XXXXXXXX
Base timer
ch.10
⎯
BTBTMR[R]H
00000000 00000000
⎯
BTBTMCR[R/W] B,H
-0000000 00000000
BTBSTC[R/W]B
0000-000
BTSEL89AB[R/W]B
00000000
Base timer
ch.11
⎯
BTCTMR[R]H
00000000 00000000
⎯
⎯
BTBPDUT/BTBPRLH/BTBDTBF
[R/W]H
XXXXXXXX XXXXXXXX
BTBPCSR/BTBPRLL[R/W]H
XXXXXXXX XXXXXXXX
BTCTMCR[R/W] B,H
-0000000 00000000
BTCSTC[R/W]B
0000-000
⎯
BTCPDUT/BTCPRLH/BTCDTBF
[R/W]H
XXXXXXXX XXXXXXXX
BTCPCSR/BTCPRLL[R/W]H
XXXXXXXX XXXXXXXX
Base timer
ch.12
⎯
0000 0FCCH
0000 0FD0H
⎯
BT9PCSR/BT9PRLL[R/W]H
XXXXXXXX XXXXXXXX
0000 0FACH
0000 0FB0H
+3
BT9TMCR[R/W] B,H
-0000000 00000000
BT9STC[R/W]B
0000-000
0000 0F9CH
0000 0FA0H
+2
BTDTMR[R]H
00000000 00000000
⎯
BTDTMCR[R/W] B,H
-0000000 00000000
BTDSTC[R/W]B
0000-000
⎯
BTDPDUT/BTDPRLH/BTDDTBF
[R/W]H
XXXXXXXX XXXXXXXX
BTDPCSR/BTDPRLL[R/W]H
XXXXXXXX XXXXXXXX
Base timer
ch.13
⎯
(Continued)
74
DS07-16911-1E
MB91645A Series
(Continued)
Register
Address
+0
+1
BTETMR[R]H
00000000 00000000
0000 0FE0H
⎯
0000 0FE4H
+3
Block
BTETMCR[R/W] B,H
-0000000 00000000
BTESTC[R/W]B
0000-000
⎯
BTEPDUT/BTEPRLH/BTEDTBF
[R/W]H
XXXXXXXX XXXXXXXX
BTEPCSR/BTEPRLL[R/W]H
XXXXXXXX XXXXXXXX
0000 0FE8H
Base timer
ch.14
⎯
0000 0FECH
BTFTMR[R]H
00000000 00000000
0000 0FF0H
⎯
0000 0FF4H
BTFTMCR[R/W] B,H
-0000000 00000000
BTFSTC[R/W]B
0000-000
⎯
BTFPDUT/BTFPRLH/BTFDTBF
[R/W]H
XXXXXXXX XXXXXXXX
BTFPCSR/BTFPRLL[R/W]H
XXXXXXXX XXXXXXXX
0000 0FF8H
0000 0FFCH
+2
BTSELCDEF [R/W]
B
00000000
0000 1000H
to
0000 FFFCH
Base timer
ch.15
BTSSSR [W] H
XXXXXXXX XXXXXXXX
⎯
⎯
Reserved
*1 : Byte access is available only when accessing the lower 8 bits within 9 bits.
*2 : The register of I2C can not be read immediate after reset.
*3 : Value just after reset by INIT pin.
Do not access the reserved areas.
DS07-16911-1E
75
MB91645A Series
■ VECTOR TABLE
Interrupt number
Interrupt source (Peripheral resource)
Interrupt
Address of
Hexa- level setting Offset TBR default
Decimal
decimal register
Reset
0
00
⎯
3FCH
000F FFFCH
System reserved
1
01
⎯
3F8H
000F FFF8H
System reserved
2
02
⎯
3F4H
000F FFF4H
System reserved
3
03
⎯
3F0H
000F FFF0H
System reserved
4
04
⎯
3ECH
000F FFECH
System reserved
5
05
⎯
3E8H
000F FFE8H
System reserved
6
06
⎯
3E4H
000F FFE4H
System reserved
7
07
⎯
3E0H
000F FFE0H
System reserved
8
08
⎯
3DCH 000F FFDCH
INTE instruction
9
09
⎯
3D8H
000F FFD8H
System reserved
10
0A
⎯
3D4H
000F FFD4H
System reserved
11
0B
⎯
3D0H
000F FFD0H
Step trace trap
12
0C
⎯
3CCH 000F FFCCH
System reserved
13
0D
⎯
3C8H
000F FFC8H
Undefined instruction exception
14
0E
⎯
3C4H
000F FFC4H
15
0F
15(FH) fixed
3C0H
000F FFC0H
External interrupt request ch.0 to ch.7
16
10
ICR00
3BCH
000F FFBCH
External interrupt request ch.8 to ch.15
17
11
ICR01
3B8H
000F FFB8H
External interrupt request ch.16 to ch.23
18
12
ICR02
3B4H
000F FFB4H
External interrupt request ch.24 to ch.31
19
13
ICR03
3B0H
000F FFB0H
16-bit reload timer ch.0 to ch.2
20
14
ICR04
3ACH
000F FFACH
Reception interrupt request of UART/CSIO ch.0
21
15
ICR05
3A8H
000F FFA8H
Transmission interrupt request of UART/CSIO ch.0
Transmission bus idle interrupt request of UART/CSIO
ch.0
22
16
ICR06
3A4H
000F FFA4H
Reception interrupt request of UART/CSIO/ I2C ch.1
23
17
ICR07
3A0H
000F FFA0H
Transmission interrupt request of UART/CSIO/ I2C ch.1
Transmission bus idle interrupt request of UART/CSIO
ch.1
24
18
ICR08
39CH
000F FF9CH
Status interrupt request of I2C ch.1
25
19
ICR09
398H
000F FF98H
26
1A
ICR10
394H
000F FF94H
27
1B
ICR11
390H
000F FF90H
⎯
2
Reception interrupt request of UART/CSIO/I C ch.2
2
Transmission interrupt request of UART/CSIO/I C ch.2
Transmission bus idle interrupt request of UART/CSIO
ch.2
(Continued)
76
DS07-16911-1E
MB91645A Series
Interrupt number
Interrupt
level
setting
HexaDecimal
register
decimal
Interrupt source (Peripheral resource)
Status interrupt request of I2C ch.2
Offset
Address of
TBR default
28
1C
ICR12
38CH
000F FF8CH
29
1D
ICR13
388H
000F FF88H
Transmission interrupt request of UART/CSIO/I C
ch.3 Transmission bus idle interrupt request of UART/
CSIO ch.3 Status interrupt request of I2C ch.3
30
1E
ICR14
384H
000F FF84H
Reception interrupt request of UART/CSIO/I2C ch.4
31
1F
ICR15
380H
000F FF80H
Transmission interrupt request of UART/CSIO/I2C
ch.4 Transmission bus idle interrupt request of UART/
CSIO ch.4 Status interrupt request of I2C ch.4
32
20
ICR16
37CH
000F FF7CH
Reception interrupt request of UART/CSIO/I2C ch.5
33
21
ICR17
378H
000F FF78H
Transmission interrupt request of UART/CSIO/I C
ch.5 Transmission bus idle interrupt request of UART/
CSIO ch.5 Status interrupt request of I2C ch.5
34
22
ICR18
374H
000F FF74H
Reception interrupt request of UART/CSIO/ I2C ch.6
35
23
ICR19
370H
000F FF70H
Transmission interrupt request of UART/CSIO/I2C
ch.6 Transmission bus idle interrupt request of UART/
CSIO ch.6 Status interrupt request of I2C ch.6
36
24
ICR20
36CH
000F FF6CH
Reception interrupt request of UART/CSIO/I2C ch.7
32-bit input capture ch.4 to ch.7
37
25
ICR21
368H
000F FF68H
Transmission interrupt request of UART/CSIO/I2C
ch.7 Transmission bus idle interrupt request of UART/
CSIO ch.7 Status interrupt request of I2C ch.7
32-bit output compare ch.4 to ch.7
38
26
ICR22
364H
000F FF64H
Reception interrupt request of UART/CSIO/I2C ch.8 to
ch.11 Transmission interrupt request of UART/CSIO/
I2C ch.8 to ch.11 Transmission bus idle interrupt
request of UART/CSIO ch.8 to ch.11 Transmission
FIFO interrupt request UART/CSIO/I2C ch.8 to ch.11
Status interrupt request of I2C ch.8 to ch.11
39
27
ICR23
360H
000F FF60H
16-bit up/down counter ch.0 to ch.3
40
28
ICR24
35CH
000F FF5CH
Main timer/Sub timer/Watch counter
41
29
ICR25
358H
000F FF58H
Unit 0 of 10-bit A/D converter
• Scan conversion interrupt request
• Priority conversion interrupt request
• FIFO overrun interrupt request
• Conversion result compare interrupt request
42
2A
ICR26
354H
000F FF54H
32-bit free run timer ch.0, ch.1
43
2B
ICR27
350H
000F FF50H
32-bit input capture ch.0 to ch.3
44
2C
ICR28
34CH
000F FF4CH
32-bit output compare ch.0 to ch.3
45
2D
ICR29
348H
000F FF48H
2
Reception interrupt request of UART/CSIO/I C ch.3
2
2
(Continued)
DS07-16911-1E
77
MB91645A Series
(Continued)
Interrupt number
Interrupt source (Peripheral resource)
Interrupt
Hexa- level setting
Decimal
register
decimal
Offset
Address of
TBR default
Base timer ch.0
46
2E
ICR30
344H
000F FF44H
Base timer ch.1
47
2F
ICR31
340H
000F FF40H
Base timer ch.2
48
30
ICR32
33CH
000F FF3CH
Base timer ch.3
49
31
ICR33
338H
000F FF38H
Base timer ch.4, ch.5
50
32
ICR34
334H
000F FF34H
Base timer ch.6, ch.7
51
33
ICR35
330H
000F FF30H
Base timer ch.8, ch.9
52
34
ICR36
32CH
000F FF2CH
Base timer ch.10, ch.11
53
35
ICR37
328H
000F FF28H
Base timer ch.12
54
36
ICR38
324H
000F FF24H
Base timer ch.13
55
37
ICR39
320H
000F FF20H
Base timer ch.14, ch.15
56
38
ICR40
31CH
000F FF1CH
DMA controller (DMAC) ch.0
57
39
ICR41
318H
000F FF18H
DMA controller (DMAC) ch.1
58
3A
ICR42
314H
000F FF14H
DMA controller (DMAC) ch.2
59
3B
ICR43
310H
000F FF10H
DMA controller (DMAC) ch.3
60
3C
ICR44
30CH
000F FF0CH
DMA controller (DMAC) ch.4 to ch.7
61
3D
ICR45
308H
000F FF08H
Unit 1 of 10-bit A/D converter
• Scan conversion interrupt request
• Priority conversion interrupt request
• FIFO overrun interrupt request
• Conversion result compare interrupt request
62
3E
ICR46
304H
000F FF04H
Delay interrupt
63
3F
ICR47
300H
000F FF00H
System reserved (Used by REALOS)
64
40
⎯
2FCH
000F FEFCH
System reserved (Used by REALOS)
65
41
⎯
2F8H
000F FEF8H
Used by INT instruction
66
to
255
42
to
FF
⎯
2F4H
to
000H
000F FEF4H
to
000F FC00H
78
DS07-16911-1E
MB91645A Series
■ PIN STATUS IN EACH CPU STATE
The terms used for pin status have the following meanings.
• When INIT = “L”
This is the period when the INIT pin is the “L” level.
• When INIT = “H”
The status immediately after the INIT pin changes from the “L” level to the “H” level.
• SLVL1
This bit is a standby level setting bit in the standby mode control register (STBCR).
• Input enabled
Indicates that the input function can be used.
• Input disabled
Indicates that the input function cannot be used.
• Output Hi-Z
Indicates that the output drive transistor is disabled and the pin is put in the Hi-Z state.
• Maintain previous state
Maintains the state that was being output immediately prior to entering the current mode.
If a built-in peripheral function is operating, the output follows the peripheral function.
If the pin is being used as a port, that output is maintained.
• Internal input fixed at “0”
The input gate connected to the pin is disconnected from the external input and internally connected to “0”.
• Input enabled when interrupt function selected and enabled
Inputs are allowed only when the pin is configured as an external interrupt request input pin and the external
interrupt request is enabled.
DS07-16911-1E
79
MB91645A Series
• List of pin status
Pin
name
Function
INIT
During initialization
INIT = “H”
INIT
⎯
Standby Mode
SLVL1 = 0
SLVL1 = 1
⎯
Input
enabled
Input
enabled
X0
Input
enabled
Input
enabled
Hi-Z
or
Input
enabled
Hi-Z
or
Input
enabled
X1
X1
Input
enabled
Input
enabled
“H” output
or
Input
enabled
“H”output
or
Input
enabled
X0A
X0A
(When INIT input, see PK1.
When port selected,
input disabled)
Input
disabled
Input
disabled
Hi-Z
or
Input
enabled
Hi-Z
or
Input
enabled
X1A
X1A
(When INIT input, see PK0.
When port selected,
input disabled)
Input
disabled
Input
disabled
“H”output
or
Input
enabled
“H”output
or
Input
enabled
MD0
MD0
Input
enabled
Input
enabled
MD1
MD1
Input
enabled
Input
enabled
Input
enabled
Input
enabled
P00
P00/D00/TIOA0/SOUT0_1/IN0
P01
P01/D01/TIOB0/SIN0_1/IN1
P02
P02/D02/TIOA1/SCK0_1/IN2
Output Hi-Z
Output
Hi-Z/
Input
enabled
Maintain
previous
state
Output
Hi-Z/
Internal
input
fixed at “0”
X0
INIT = “L”
Sleep Mode
P03
P03/D03/TIOB1/IN3
P04
P04/D04/TIOA2/SOUT1/IN4
P05
P05/D05/TIOB2/SIN1/IN5
P06
P06/D06/TIOA3/SCK1/IN6
P07
P07/D07/TIOB3/IN7
Input enabled
Maintain
previous
state
(Continued)
80
DS07-16911-1E
MB91645A Series
Pin
name
Function
P10
P10/D08/TIOA4/SOUT2/AIN0/INT0
P11
P11/D09/TIOB4/SIN2/BIN0/INT1
P12
P12/D10/TIOA5/SCK2/ZIN0/INT2
P13
P13/D11/TIOB5/INT3
P14
P14/D12/TIOA6/SOUT3/AIN1/INT4
P15
P15/D13/TIOB6/SIN3/BIN1/INT5
P16
P16/D14/TIOA7/SCK3/ZIN1/INT6
P17
P17/D15/TIOB7/INT7
P20
P20/A00/TIOA8/SOUT4/AIN2
P21
P21/A01/TIOB8/SIN4/BIN2
P22
P22/A02/TIOA9/SCK4/ZIN2
P23
P23/A03/TIOB9
P24
P24/A04/TIOA10/SOUT5/AIN3/
OUT0
P25
P25/A05/TIOB10/SIN5/BIN3/OUT1
P26
P26/A06/TIOA11/SCK5/ZIN3/
OUT2
P27
P27/A07/TIOB11/OUT3
P30
P30/A08/TIOA12/SOUT6/INT8
P31
P31/A09/TIOB12/SIN6/INT9
P32
P32/A10/TIOA13/SCK6/INT10
P33
P33/A11/TIOB13/INT11
P34
P34/A12/TIOA14/SOUT7/OUT4/
INT12
P35
P35/A13/TIOB14/SIN7/OUT5/
INT13
P36
P36/A14/TIOA15/SCK7/OUT6/
INT14
P37
P37/A15/TIOB15/OUT7/INT15
During initialization
INIT = “L”
INIT = “H”
Sleep Mode
Standby Mode
SLVL1 = 0 SLVL1 = 1
Output
Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z/
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z/
Output Hi-Z
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z
Input
enabled
when
interrupt
function
selected
and
enabled
Output
Hi-Z/
Internal
input fixed
at “0”
Output
Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z
Output Hi-Z/
Input
enabled
Maintain
previous
state
Maintain
previous
state
Input
enabled
when
interrupt
function
selected
and
enabled
(Continued)
DS07-16911-1E
81
MB91645A Series
Pin
name
Function
P40
P40/A16/SOUT8
P41
P41/A17/SIN8
P42
P42/A18/SCK8
P43
P43/A19
P44
P44/A20/SOUT9
P45
P45/A21/SIN9
P46
P46/A22/SCK9
P47
P47/A23
P50
P50/CS0/SOUT10/AIN0_1
P51
P51/CS1/SIN10/BIN0_1
P52
P52/CS2/SCK10/ZIN0_1
During initialization
INIT = “L”
INIT = “H”
Output Hi-Z/
Output Hi-Z
Input
enabled
Sleep Mode
Maintain
previous
state
Standby Mode
SLVL1 = 0 SLVL1 = 1
Maintain
previous
state
Output
Hi-Z/
Internal
input fixed
at “0”
Output
Hi-Z/
Internal
input fixed
at “0”
Output
Hi-Z/
Internal
input fixed
at “0”
P53
P53/CS3/FRCK1/INT21_2
P54
P54/AS/SOUT11/AIN1_1
P55
P55/RD/SIN11/BIN1_1/ADTRG0
P56
P56/WR0/SCK11/ZIN1_1/FRCK0
P57
P57/WR1
Output Hi-Z/
Output Hi-Z
Input
enabled
Maintain
previous
state
Maintain
previous
state
Input
enabled
when
interrupt
function
selected
and
enabled
Output
Hi-Z/
Internal
input fixed
at “0”
(Continued)
82
DS07-16911-1E
MB91645A Series
Pin
name
Function
P60
P60/RDY/AIN2_1
P61
P61/SYSCLK/BIN2_1
P62
P62/DREQ0/ZIN2_1
During initialization
INIT = “L”
INIT = “H”
Sleep Mode
Standby Mode
SLVL1 = 0 SLVL1 = 1
Output
Hi-Z/
Internal
input fixed
at “0”
Output
Hi-Z/
Internal
input fixed
at “0”
P63
P63/DACK0/FRCK1_1/INT22_2
P64
P64/DEOP0/AIN3_1
P65
P65/DREQ1/BIN3_1/ADTRG0_1
P66
P66/DACK1/ZIN3_1/FRCK0_1
Output Hi-Z
Output Hi-Z/
Input
enabled
Maintain
previous
state
Maintain
previous
state
Input
enabled
when
interrupt
function
selected
and
enabled
Output
Hi-Z/
Internal
input fixed
at “0”
Output
Hi-Z/
Internal
input fixed
at “0”
P67
P67/DEOP1/INT23_2
Input
enabled
when
interrupt
function
selected
and
enabled
(Continued)
DS07-16911-1E
83
MB91645A Series
Pin
name
Function
P70
P70/AN0/OUT0_1/INT16
P71
P71/AN1/OUT1_1/INT17
P72
P72/AN2/TMO0/OUT2_1/INT18
P73
P73/AN3/TMO1/OUT3_1/INT19
P74
P74/AN4/TMO2/OUT4_1/INT20
P75
P75/AN5/SOUT0/TMI0/
OUT5_1/INT21
P76
P76/AN6/SIN0/TMI1/OUT6_1/
INT22
P77
P77/AN7/SCK0/TMI2/OUT7_1/
INT23
P80
P80/AN8/IN0_1/INT24
P81
P81/AN9/IN1_1/INT25
P82
P82/AN10/IN2_1/INT26
P83
P83/AN11/IN3_1/INT27
P84
P84/AN12/IN4_1/INT28
P85
P85/AN13/IN5_1/INT29
P86
P86/AN14/IN6_1/INT30
P87
P87/AN15/IN7_1/INT31
P90
P90/DA0
P91
P91/DA1
P92
P92/DA2
PA0
PA0/AN16/INT16_1
PA1
PA1/AN17/INT17_1
PA2
PA2/AN18/TMO0_1/INT18_1
PA3
PA3/AN19/TMO1_1/INT19_1
PA4
PA4/AN20/TMO2_1/INT20_1
PA5
PA5/AN21/TMI0_1/INT21_1
PA6
PA6/AN22/TMI1_1/INT22_1
PA7
PA7/AN23/TMI2_1/INT23_1
During initialization
INIT = “L”
INIT = “H”
Sleep Mode
Standby Mode
SLVL1 = 0
SLVL1 = 1
Output
Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z
Output Hi-Z/
Input
disabled
Maintain
previous
state
Maintain
previous
state
Input
enabled
when
interrupt
function
selected and
enabled
Output
Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z/
Input
disabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z/
Output Hi-Z
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z
Input
enabled
when
interrupt
function
selected and
enabled
Output
Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z
Output Hi-Z/
Input
disabled
Maintain
previous
state
Maintain
previous
state
Input
enabled
when
interrupt
function
selected and
enabled
(Continued)
84
DS07-16911-1E
MB91645A Series
Pin
name
Function
PB0
PB0/AN24/INT24_1
PB1
PB1/AN25/INT25_1
PB2
PB2/AN26/INT26_1
PB3
PB3/AN27/INT27_1
PB4
PB4/AN28/INT28_1
PB5
PB5/AN29/INT29_1
PB6
PB6/AN30/INT30_1
PB7
PB7/AN31/INT31_1
PC0
PC0/TIOA12_1/SOUT6_1/INT8_1
PC1
PC1/TIOB12_1/SIN6_1/INT9_1
PC2
PC2/TIOA13_1/SCK6_1/INT10_1
PC3
PC3/TIOB13_1/INT11_1
PC4
PC4/TIOA14_1/SOUT7_1/
OUT4_2/INT12_1
PC5
PC5/TIOB14_1/SIN7_1/OUT5_2/
INT13_1
PC6
PC6/TIOA15_1/SCK7_1/OUT6_2/
INT14_1
PC7
PC7/TIOB15_1/OUT7_2/INT15_1
PD0
PD0/SOUT8_1
PD1
PD1/SIN8_1
PD2
PD2/SCK8_1
PD3
PD3
PD4
PD4/SOUT9_1
PD5
PD5/SIN9_1
PD6
PD6/SCK9_1
PD7
PD7
During initialization
INIT = “L”
INIT = “H”
Sleep
Mode
Standby Mode
SLVL1 = 0
SLVL1 = 1
Output Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z
Output Hi-Z/
Input
disabled
Maintain
previous
state
Maintain
previous
state
Input
enabled
when
interrupt
function
selected
and
enabled
Output Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z/
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z/
Output Hi-Z
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z
Input
enabled
when
interrupt
function
selected
and
enabled
Output Hi-Z/
Internal
input fixed
at “0”
(Continued)
DS07-16911-1E
85
MB91645A Series
Pin
name
Function
PE0
PE0/SOUT10_1/AIN0_3
PE1
PE1/SIN10_1/BIN0_3
PE2
PE2/SCK10_1/ZIN0_3
PE3
PE3/FRCK1_2
PE4
PE4/AIN1_3
PE5
PE5/SOUT11_1/BIN1_3/
ADTRG0_4
PE6
PE6/SIN11_1/ZIN1_3/FRCK0_2
PE7
PE7/SCK11_1
PF0
PF0/AIN2_3
PF1
PF1/BIN2_3
PF2
PF2/ZIN2_3
PF3
PF3/FRCK1_3
PF4
PF4/AIN3_3
PF5
PF5/BIN3_3/ADTRG0_5
PF6
PF6/ZIN3_3/FRCK0_3
PG0
PG0/DREQ2/TIOA0_1/SOUT0_2/
IN0_2
PG1
PG1/DACK2/TIOB0_1/SIN0_2/
IN1_2
PG2
PG2/DEOP2/TIOA1_1/SCK0_2/
IN2_2
PG3
PG3/DREQ3/TIOB1_1/IN3_2
PG4
PG4/DACK3/TIOA2_1/SOUT1_1/
IN4_2
PG5
PG5/DEOP3/TIOB2_1/SIN1_1/
IN5_2
PG6
PG6/TIOA3_1/SCK1_1/IN6_2
PG7
PG7/TIOB3_1/IN7_2
During initialization
Standby Mode
Sleep
Mode
SLVL1 = 0
SLVL1 = 1
Output Hi-Z/
Output Hi-Z
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z/
Output Hi-Z
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z/
Output Hi-Z
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z/
Internal
input fixed
at “0”
INIT = “L”
INIT = “H”
(Continued)
86
DS07-16911-1E
MB91645A Series
(Continued)
Pin
name
Function
PH0
PH0/TIOA4_1/SOUT2_1/AIN0_2/
INT0_1
PH1
PH1/TIOB4_1/SIN2_1/BIN0_2/
INT1_1
PH2
PH2/TIOA5_1/SCK2_1/ZIN0_2/
INT2_1
PH3
PH3/TIOB5_1/INT3_1
PH4
PH4/TIOA6_1/SOUT3_1/AIN1_2/
INT4_1
PH5
PH5/TIOB6_1/SIN3_1/BIN1_2/
INT5_1
PH6
PH6/TIOA7_1/SCK3_1/ZIN1_2/
INT6_1
PH7
PH7/TIOB7_1/INT7_1
PI0
PI0/TIOA8_1/SOUT4_1/AIN2_2
PI1
PI1/TIOB8_1/SIN4_1/BIN2_2
PI2
PI2/TIOA9_1/SCK4_1/ZIN2_2
PI3
PI3/TIOB9_1
PI4
PI4/TIOA10_1/SOUT5_1/AIN3_2/
OUT0_2
PI5
PI5/TIOB10_1/SIN5_1/BIN3_2/
OUT1_2
PI6
PI6/TIOA11_1/SCK5_1/ZIN3_2/
OUT2_2
PI7
PI7/TIOB11_1/OUT3_2
PJ0
PJ0
PJ1
PJ1
PJ2
PJ2
PK0
PK0
PK1
PK1
PK2
PK2/ADTRG0_2
PK3
PK3/ADTRG0_3
DS07-16911-1E
During initialization
INIT = “L”
INIT = “H”
Sleep
Mode
Standby Mode
SLVL1 = 0
SLVL1 = 1
Output Hi-Z/
Internal
input fixed
at “0”
Input
enabled
when
interrupt
function
selected
and
enabled
Output Hi-Z/
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z/
Output Hi-Z
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z/
Output Hi-Z
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z/
Internal
input fixed at
“0”
Output Hi-Z
Output Hi-Z/
Input
enabled
Maintain
previous
state
Maintain
previous
state
Output Hi-Z/
Internal
input fixed
at “0”
Output Hi-Z
87
MB91645A Series
• List of pin status (serial write mode)
During initialization
During asynchronous During synchronous
write operation
write operation
INIT = “L”
INIT = “H”
Pin
name
Function
INIT
INIT
⎯
⎯
⎯
X0
X0
Input
enabled
Input
enabled
Input
enabled
X1
X1
Input
enabled
Input
enabled
Input
enabled
X0A
X0A
(When INIT input, see PK1.
When port selected,
input disabled)
Input
disabled
Input
disabled
Input
disabled
X1A
X1A
(When INIT input, see PK0.
When port selected,
input disabled)
Input
disabled
Input
disabled
Input
disabled
MD0
MD0
Input
enabled
Input
enabled
Input
enabled
MD1
MD1
Input
enabled
Input
enabled
Input
enabled
P00
P00/D00/TIOA0/SOUT0_1/IN0
P01
P01/D01/TIOB0/SIN0_1/IN1
P02
P02/D02/TIOA1/SCK0_1/IN2
P03
P03/D03/TIOB1/IN3
P04
P04/D04/TIOA2/SOUT1/IN4
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
P05
P05/D05/TIOB2/SIN1/IN5
P06
P06/D06/TIOA3/SCK1/IN6
P07
P07/D07/TIOB3/IN7
P10
P10/D08/TIOA4/SOUT2/AIN0/
INT0
P11
P11/D09/TIOB4/SIN2/BIN0/
INT1
P12
P12/D10/TIOA5/SCK2/ZIN0/
INT2
P13
P13/D11/TIOB5/INT3
P14
P14/D12/TIOA6/SOUT3/AIN1/
INT4
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
P15
P15/D13/TIOB6/SIN3/BIN1/
INT5
P16
P16/D14/TIOA7/SCK3/ZIN1/
INT6
P17
P17/D15/TIOB7/INT7
(Continued)
88
DS07-16911-1E
MB91645A Series
Pin
name
Function
P20
P20/A00/TIOA8/SOUT4/AIN2
P21
P21/A01/TIOB8/SIN4/BIN2
P22
P22/A02/TIOA9/SCK4/ZIN2
P23
P23/A03/TIOB9
P24
P24/A04/TIOA10/SOUT5/AIN3/
OUT0
P25
P25/A05/TIOB10/SIN5/BIN3/
OUT1
P26
P26/A06/TIOA11/SCK5/ZIN3/
OUT2
P27
P27/A07/TIOB11/OUT3
P30
P30/A08/TIOA12/SOUT6/INT8
P31
P31/A09/TIOB12/SIN6/INT9
P32
P32/A10/TIOA13/SCK6/INT10
P33
P33/A11/TIOB13/INT11
P34
P34/A12/TIOA14/SOUT7/OUT4/
INT12
P35
P35/A13/TIOB14/SIN7/OUT5/
INT13
P36
P36/A14/TIOA15/SCK7/OUT6/
INT14
P37
P37/A15/TIOB15/OUT7/INT15
P40
P40/A16/SOUT8
P41
P41/A17/SIN8
P42
P42/A18/SCK8
P43
P43/A19
P44
P44/A20/SOUT9
P45
P45/A21/SIN9
P46
P46/A22/SCK9
P47
P47/A23
During initialization
During asynchronous During synchronous
write operation
write operation
INIT = “L”
INIT = “H”
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
(Continued)
DS07-16911-1E
89
MB91645A Series
Pin
name
Function
P50
P50/CS0/SOUT10/AIN0_1
P51
P51/CS1/SIN10/BIN0_1
P52
P52/CS2/SCK10/ZIN0_1
P53
P53/CS3/FRCK1/INT21_2
P54
P54/AS/SOUT11/AIN1_1
P55
P55/RD/SIN11/BIN1_1/
ADTRG0
P56
P56/WR0/SCK11/ZIN1_1/
FRCK0
P57
P57/WR1
P60
P60/RDY/AIN2_1
P61
P61/SYSCLK/BIN2_1
P62
P62/DREQ0/ZIN2_1
P63
P63/DACK0/FRCK1_1/INT22_2
P64
P64/DEOP0/AIN3_1
P65
P65/DREQ1/BIN3_1/
ADTRG0_1
P66
P66/DACK1/ZIN3_1/FRCK0_1
P67
P67/DEOP1/INT23_2
P70
P70/AN0/OUT0_1/INT16
P71
P71/AN1/OUT1_1/INT17
P72
P72/AN2/TMO0/OUT2_1/INT18
P73
P73/AN3/TMO1/OUT3_1/INT19
P74
P74/AN4/TMO2/OUT4_1/INT20
P75
P75/AN5/SOUT0/TMI0/
OUT5_1/INT21
P76
P76/AN6/SIN0/TMI1/OUT6_1/
INT22
P77
P77/AN7/SCK0/TMI2/OUT7_1/
INT23
During initialization
During asynchronous During synchronous
write operation
write operation
INIT = “L”
INIT = “H”
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
disabled
Output Hi-Z/
Input
disabled
Output Hi-Z/
Input enabled
Output
Output
Output Hi-Z/
Input enabled
Output Hi-Z/
Input enabled
Output Hi-Z/
Input disabled
Output Hi-Z/
Input enabled
Output Hi-Z
(Continued)
90
DS07-16911-1E
MB91645A Series
Pin
name
Function
P80
P80/AN8/IN0_1/INT24
P81
P81/AN9/IN1_1/INT25
P82
P82/AN10/IN2_1/INT26
P83
P83/AN11/IN3_1/INT27
P84
P84/AN12/IN4_1/INT28
P85
P85/AN13/IN5_1/INT29
P86
P86/AN14/IN6_1/INT30
P87
P87/AN15/IN7_1/INT31
P90
P90/DA0
P91
P91/DA1
P92
P92/DA2
PA0
PA0/AN16/INT16_1
PA1
PA1/AN17/INT17_1
PA2
PA2/AN18/TMO0_1/INT18_1
PA3
PA3/AN19/TMO1_1/INT19_1
PA4
PA4/AN20/TMO2_1/INT20_1
PA5
PA5/AN21/TMI0_1/INT21_1
PA6
PA6/AN22/TMI1_1/INT22_1
PA7
PA7/AN23/TMI2_1/INT23_1
PB0
PB0/AN24/INT24_1
PB1
PB1/AN25/INT25_1
PB2
PB2/AN26/INT26_1
PB3
PB3/AN27/INT27_1
PB4
PB4/AN28/INT28_1
PB5
PB5/AN29/INT29_1
PB6
PB6/AN30/INT30_1
PB7
PB7/AN31/INT31_1
During initialization
During asynchronous During synchronous
write operation
write operation
INIT = “L”
INIT = “H”
Output Hi-Z
Output Hi-Z/
Input
disabled
Output Hi-Z/
Input
disabled
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
disabled
Output Hi-Z/
Input
disabled
Output Hi-Z
Output Hi-Z/
Input
disabled
Output Hi-Z/
Input
disabled
(Continued)
DS07-16911-1E
91
MB91645A Series
Pin
name
Function
PC0
PC0/TIOA12_1/SOUT6_1/
INT8_1
PC1
PC1/TIOB12_1/SIN6_1/INT9_1
PC2
PC2/TIOA13_1/SCK6_1/
INT10_1
PC3
PC3/TIOB13_1/INT11_1
PC4
PC4/TIOA14_1/SOUT7_1/
OUT4_2/INT12_1
PC5
PC5/TIOB14_1/SIN7_1/
OUT5_2/INT13_1
PC6
PC6/TIOA15_1/SCK7_1/
OUT6_2/INT14_1
PC7
PC7/TIOB15_1/OUT7_2/
INT15_1
PD0
PD0/SOUT8_1
PD1
PD1/SIN8_1
PD2
PD2/SCK8_1
PD3
PD3
PD4
PD4/SOUT9_1
PD5
PD5/SIN9_1
PD6
PD6/SCK9_1
PD7
PD7
PE0
PE0/SOUT10_1/AIN0_3
PE1
PE1/SIN10_1/BIN0_3
PE2
PE2/SCK10_1/ZIN0_3
PE3
PE3/FRCK1_2
PE4
PE4/AIN1_3
PE5
PE5/SOUT11_1/BIN1_3/
ADTRG0_4
PE6
PE6/SIN11_1/ZIN1_3/FRCK0_2
PE7
PE7/SCK11_1
During initialization
During asynchronous During synchronous
write operation
write operation
INIT = “L”
INIT = “H”
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
(Continued)
92
DS07-16911-1E
MB91645A Series
Pin
name
Function
PF0
PF0/AIN2_3
PF1
PF1/BIN2_3
PF2
PF2/ZIN2_3
PF3
PF3/FRCK1_3
PF4
PF4/AIN3_3
PF5
PF5/BIN3_3/ADTRG0_5
PF6
PF6/ZIN3_3/FRCK0_3
PG0
PG0/DREQ2/TIOA0_1/
SOUT0_2/IN0_2
PG1
PG1/DACK2/TIOB0_1/SIN0_2/
IN1_2
PG2
PG2/DEOP2/TIOA1_1/SCK0_2/
IN2_2
PG3
PG3/DREQ3/TIOB1_1/IN3_2
PG4
PG4/DACK3/TIOA2_1/
SOUT1_1/IN4_2
PG5
PG5/DEOP3/TIOB2_1/SIN1_1/
IN5_2
PG6
PG6/TIOA3_1/SCK1_1/IN6_2
PG7
PG7/TIOB3_1/IN7_2
PH0
PH0/TIOA4_1/SOUT2_1/
AIN0_2/INT0_1
PH1
PH1/TIOB4_1/SIN2_1/BIN0_2/
INT1_1
PH2
PH2/TIOA5_1/SCK2_1/ZIN0_2/
INT2_1
PH3
PH3/TIOB5_1/INT3_1
PH4
PH4/TIOA6_1/SOUT3_1/
AIN1_2/INT4_1
PH5
PH5/TIOB6_1/SIN3_1/BIN1_2/
INT5_1
PH6
PH6/TIOA7_1/SCK3_1/ZIN1_2/
INT6_1
PH7
PH7/TIOB7_1/INT7_1
During initialization
During asynchronous During synchronous
write operation
write operation
INIT = “L”
INIT = “H”
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
(Continued)
DS07-16911-1E
93
MB91645A Series
(Continued)
Pin
name
Function
PI0
PI0/TIOA8_1/SOUT4_1/AIN2_2
PI1
PI1/TIOB8_1/SIN4_1/BIN2_2
PI2
PI2/TIOA9_1/SCK4_1/ZIN2_2
PI3
PI3/TIOB9_1
PI4
PI4/TIOA10_1/SOUT5_1/
AIN3_2/OUT0_2
PI5
PI5/TIOB10_1/SIN5_1/BIN3_2/
OUT1_2
PI6
PI6/TIOA11_1/SCK5_1/ZIN3_2/
OUT2_2
PI7
PI7/TIOB11_1/OUT3_2
PJ0
PJ0
PJ1
PJ1
PJ2
PJ2
PK0
PK0
PK1
PK1
PK2
PK2/ADTRG0_2
PK3
PK3/ADTRG0_3
94
During initialization
During asynchronous During synchronous
write operation
write operation
INIT = “L”
INIT = “H”
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
Output Hi-Z
Output Hi-Z/
Input
enabled
Output Hi-Z/
Input
enabled
DS07-16911-1E
MB91645A Series
■ ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Remarks
Min
Max
VCC
Vss − 0.3
Vss + 4.0
V
VDDI
Vss − 0.3
Vss + 2.5
V
AVCC
Vss − 0.3
Vss + 4.0
V
AVRH
Vss − 0.3
Vss + 4.0
V
Vss − 0.3
Vcc + 0.3 ( ≤ 4.0)
V
*7
Vss − 0.3
Vss + 6.0
V
5 V tolerant
VIA
Vss − 0.3
Vss + 4.0
V
VO
Vss − 0.3
Vcc + 0.3
V
ICLAMP
−4
+4
mA
*8
Σ|ICLAMP|
⎯
40
mA
*8
IOL
⎯
10
mA
“L” level average output current*
IOLAV
⎯
4
mA
“L” level total maximum
output current
ΣIOL
⎯
100
mA
ΣIOLAV
⎯
50
mA
IOH
⎯
− 10
mA
“H” level average output current*5
IOHAV
⎯
−4
mA
“H” level total maximum output
current
ΣIOH
⎯
− 100
mA
ΣIOHAV
⎯
− 50
mA
Power consumption
PD
⎯
500
mW
Operating temperature
Ta
− 40
+ 85
°C
TSTG
− 55
+ 125
°C
Power supply voltage*1, *2
1
Analog power supply voltage* , *
1
3
3
Analog reference voltage* , *
Input voltage*1
VI
Analog pin input voltage*1
Output voltage*
1
Maximum clamp current
Total maximum clamp current
“L” level maximum output current*4
5
“L” level total average output current*6
“H” level maximum output current*4
“H” level total average output current*6
Storage temperature
*1 : The parameter is based on VSS = AVSS = 0.0 V.
*2 : VCC must not drop below VSS − 0.3 V.
*3 : Be careful not to exceed VCC + 0.3 V, for example, when the power is turned on.
*4 : The maximum output current is the peak value for a single pin.
*5 : The average output is the average current for a single pin over a period of 100 ms.
*6 : The total average output current is the average current for all pins over a period of 100 ms.
*7 : If the input current or the maximum input current are limited by some means with external components, the
ICLAMP rating supersedes the VI rating.
(Continued)
DS07-16911-1E
95
MB91645A Series
(Continued)
*8 : • Corresponding pins : P14 to P17, P20 to P27, P30 to P37, P40 to P47, P50 to P57, P60 to P62, P67,
PC0 to PC7, PD0 to PD7, PE0 to PE7, PF0 to PF6, PG0 to PG7, PH0 to PH7,
PI0 to PI7, PJ0 to PJ2, PK2, PK3
• Use within recommended operating conditions.
• Use at DC voltage (current).
• The +B signal should always be applied by connecting a limiting resistor between the +B signal and the
microcontroller.
• The value of the limiting resistor should be set so that the current input to the microcontroller pin does not
exceed rated values at any time regardless of instantaneously or constantly when the +B signal is input.
• Note that when the microcontroller drive current is low, such as in the low power consumption modes, the
+B input potential can increase the potential at the VCC pin via a protective diode, possibly affecting other
devices.
• Note that if the +B signal is input when the microcontroller is off (not fixed at 0V), since the power is supplied
through the pin, the microcontroller may operate incompletely.
• Do not leave +B input pins open.
• Sample recommended circuit
• Input/output equivalent circuit
ICLAMP
Protective diode
VCC
+B input (0 V to 16 V)
P-ch
Limiting
resistor
N-ch
R
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
96
DS07-16911-1E
MB91645A Series
2. Recommended Operating Conditions
(VSS = AVSS = 0.0 V)
Parameter
Symbol
Value
Unit
Min
Max
VCC
2.7
3.6
V
VDDI
1.65
1.95
V
Analog power supply voltage
AVCC
2.7
3.6
V
Analog reference voltage
AVRH
AVSS
AVCC
V
Ta
− 40
+ 85
°C
Power supply voltage
Operating temperature
Remarks
AVCC ≤ VCC
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
DS07-16911-1E
97
MB91645A Series
3. DC Characteristics
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
Conditions
Value
Min
Typ
Max
Unit
Remarks
CPU: 60MHz
Peripheral: 30 MHz*3,*11
ICC
Normal
operation
⎯
10
15
mA
ICCS
SLEEP mode
⎯
10
15
mA Peripheral: 30 MHz*3,*11
Sub
operation
⎯
15
100
μA
CPU: 32 kHz
Peripheral: 32 kHz
*1,*2,*4
ICCL
Power supply
current
(Flash product)
Pin name
VCC
ICCT
Watch mode
⎯
15
100
μA
*1,*2,*4
ICCH
STOP mode
⎯
10
80
μA
*1,*2
IDDI
Normal
operation
⎯
70
90
mA
CPU: 60 MHz
Peripheral: 30 MHz*3,*11
IDDIS
SLEEP mode
⎯
20
26
mA Peripheral: 30 MHz*3,*11
Sub
operation
⎯
150
550
μA
CPU: 32 kHz
Peripheral: 32 kHz
*1,*2,*4
Watch mode
⎯
50
450
μA
*1,*2,*4
STOP mode
⎯
50
450
μA
*1,*2
IDDIL
VDDI
IDDIT
IDDIH
5
“H” level input
voltage
“L” level input
voltage
VIH
P00 to P07* ,
P10 to P17*6,
P60*7
⎯
VCC × 0.7
⎯
VCC + 0.3
V
VIL
P00 to P07*5,
P10 to P17*6,
P60*7
⎯
VSS − 0.3
⎯
VCC × 0.3
V
(Continued)
98
DS07-16911-1E
MB91645A Series
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
“H” level input
voltage
VIHS
(hysteresis input)
Pin name
Conditions
P00 to P07*8,
P10 to P17*9,
P50 to P57,
P60*10
P61 to P67,
P70 to P77,
P80 to P87,
P90 to P92,
PA0 to PA7,
PB0 to PB7,
PC0 to PC7,
PD0 to PD7,
PE0 to PE7,
PF0 to PF6,
PJ0 to PJ2,
PK0 to PK3,
INIT, MD0,
MD1
P20 to P27,
P30 to P37,
P40 to P47,
PG0 to PG7,
PH0 to PH7,
PI0 to PI7
Value
Unit
Min
Typ
Max
⎯
VCC × 0.8
⎯
VCC + 0.3
V
⎯
VCC × 0.8
⎯
VSS + 5.5
V
Remarks
5 V tolerant
(Continued)
DS07-16911-1E
99
MB91645A Series
Parameter
“L”level input
voltage
(hysteresis input)
Symbol
Pin name
Conditions
VILS
P00 to P07*8,
P10 to P17*9,
P20 to P27,
P30 to P37,
P40 to P47,
P50 to P57,
P60*10,
P61 to P67,
P70 to P77,
P80 to P87,
P90 to P92,
PA0 to PA7,
PB0 to PB7,
PC0 to PC7,
PD0 to PD7,
PE0 to PE7,
PF0 to PF6,
PJ0 to PJ2,
PG0 to PG7,
PH0 to PH7,
PI0 to PI7,
PK0 to PK3,
INIT, MD0,
MD1
⎯
“H” level
output voltage
VOH
“L” level
output voltage
VOL
Input leak current
100
IIL
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P37,
P40 to P47,
P50 to P57,
P60 to P67,
P70 to P77,
P80 to P87,
P90 to P92,
PA0 to PA7,
PB0 to PB7,
PC0 to PC7,
PD0 to PD7,
PE0 to PE7,
PF0 to PF6,
PJ0 to PJ2,
PG0 to PG7,
PH0 to PH7,
PI0 to PI7,
PK0 to PK3
⎯
Value
Unit
Remarks
Min
Typ
Max
Vss − 0.3
⎯
VCC × 0.2
V
VCC = 2.7 V
VCC − 0.5
IOH = − 4 mA
⎯
VCC
V
VSS
⎯
0.4
V
−5
⎯
+5
μA
Digital pin
− 10
⎯
+ 10
μA
Analog pin
(Continued)
VCC = 2.7 V
IOL = 4 mA
⎯
DS07-16911-1E
MB91645A Series
(Continued)
Parameter
Symbol
Pin name
Conditions
Pull-up resistance
value
RPU
Pull-up pin
CIN
Other than
VCC, VDDI, VSS,
AVCC, AVSS,
AVRH
Input capacitance
Value
Unit
Min
Typ
Max
⎯
16.6
33
66
kΩ
⎯
⎯
10
15
pF
Remarks
*1 : When opened, all ports are fixed to output
*2 : Ta = + 25 °C, VDDI = 1.8 V and VCC = 3.3 V
*3 : X0 = 15 MHz, CPU clock = 60 MHz and X0A = when stopped
*4 : X0 = STOP and X0A = 32 kHz
*5 : When using as D00 to D07 pin
*6 : When using as D08 to D15 pin
*7 : When using as RDY input
*8 : When using other than D00 to D07 pin
*9 : When using other than D08 to D15 pin
*10 : When using other than RDY input
*11 : When 50 pins with an external capacitor of 50 pF each output at the frequency of 1 MHz.
• V-I characteristics
Conditions
Min : Process = Slow, Ta = + 85 °C, VCC = 2.7 V
Typ : Process = Typical, Ta = + 25 °C, VCC = 3.3 V
Max : Process = Fast, Ta = − 40 °C, VCC = 3.6 V
VOL - IOL
IOL [mA]
IOH [mA]
VOH - IOH
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
Typ
Max
Min
-0.5
-0.4
-0.3
-0.2
VOH - VCC [V]
DS07-16911-1E
-0.1
0
20
18
16
14
12
10
8
6
4
2
0
Typ
Max
Min
0
0.1
0.2
0.3
0.4
0.5
VOL [V]
101
MB91645A Series
4. AC Characteristics
(1) Main Clock (MCLK) Input Standard
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Input frequency
Input clock cycle
Symbol
Pin
name
Conditions
Value
Unit
Remarks
48
MHz
When crystal oscillator is connected
4
48
MHz
When using external
clock
⎯
20.83
250
ns
When using external
clock
Min
Max
⎯
4
⎯
FCH
tCYLH
X0, X1
Input clock pulse width
⎯
PWH/tCYLH
PWL/tCYLH
45
55
%
When using external
clock
Input clock rise time
and fall time
tCF
tCR
⎯
⎯
5
ns
When using external
clock
Internal operating
clock frequency
Internal operating
clock cycle time
102
FCS
⎯
⎯
⎯
60
MHz Source clock
FCC
⎯
⎯
⎯
60
MHz CPU clock
FCP
⎯
⎯
⎯
40
MHz Peripheral bus clock
FCT
⎯
⎯
⎯
40
MHz External bus clock
tCYCS
⎯
⎯
16.7
⎯
ns
Source clock
tCYCC
⎯
⎯
16.7
⎯
ns
CPU clock
tCYCP
⎯
⎯
25
⎯
ns
Peripheral bus clock
tCYCT
⎯
⎯
25
⎯
ns
External bus clock
DS07-16911-1E
MB91645A Series
• Operation Guaranteed Range
Power supply voltage VCC (V)
• When the main clock is selected (DIVB = 000)
3.6
3.3
3.0
2.7
2.4
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
Internal operation clock FCC (MHz)
Power supply voltage VCC (V)
• When the PLL clock is selected
*1
*2
3.6
3.3
3.0
2.7
2.4
0 2 4 6 8 10 12 14 16 18 2022 24 26 28 30 32 34 36 3840 42 44 46 4850 52 54 5658 60
Internal operation clock FCC (MHz)
*1 : DIVB = 111, ODS = 11, and PLL macro oscillation frequency = 80 MHz
*2 : DIVB = 000, ODS = 01, and PLL macro oscillation frequency = 120 MHz
Power supply voltage VCC (V)
• When the sub clock is selected (FCL = 32.768 kHz)
DIVB = 111 DIVB = 110 DIVB = 101 DIVB = 100 DIVB = 011 DIVB = 010 DIVB = 001
DIVB = 000
3.6
3.3
3.0
2.7
2.4
0
4
8
12
16
20
24
28
32
Internal operation clock FCC (kHz)
DS07-16911-1E
103
MB91645A Series
• Example of configuration
Internal operation clock FCC (MHz)
• When the main clock is selected (DIVB = 000 *1)
24
22
20
18
16
14
12
10
8
6
4
2
0
0
4
8
12
16
20
24
28
32
36
40
44
48
36
40
44
48
X0 input frequency (MHz)
Internal operation clock FCC (MHz)
• When the PLL clock is selected (DIVB = 000 *1, PDS = 0000 *2)
PMS = 1110
PMS = 1101 to 0010
PMS = 0001
60
ODS = 01
50
40
ODS = 10
30
ODS = 11
20
10
0
0
4
8
12
16
20
24
28
32
X0 input frequency (MHz)
Internal operation clock FCC (MHz)
• When the PLL clock is selected (DIVB = 000 *1, PDS = 0001 *2)
PMS = 1110
PMS = 1101 to 0010
PMS = 0001
60
ODS = 01
50
40
ODS = 10
30
ODS = 11
20
10
0
0
4
8
12
16
20
24
28
32
36
40
44
48
X0 input frequency (MHz)
*1 : The values other than DIVB = 000 are omitted.
*2 : The values other than PDS = 0000 and 0001 are omitted.
Note: DIVB
ODS
PDS
PMS
104
: Base clock division configuration bit
: PLL macro oscillation clock division rate select bit
: PLL input clock division select bit
: PLL clock multiple rate select bit
DS07-16911-1E
MB91645A Series
(2) Sub Clock (SBCLK) Input Standard
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Input frequency
Symbol Pin name
Value
Conditions
Min
Typ
Max
⎯
⎯
32.768
⎯
⎯
⎯
Unit
Remarks
⎯
kHz
When crystal oscillator
is connected
32.768
⎯
kHz
When using external
clock
⎯
30.518
⎯
μs
When using external
clock
FCL
X0A,
X1A
Input clock cycle
tCYLL
Input clock pulse
width
⎯
PWH/tCYLL
PWL/tCYLL
45
⎯
55
%
When using external
clock
Input clock rise
time and fall time
tCF, tCR
⎯
⎯
⎯
200
ns
When using external
clock
<When external clock input>
tCYLH, tCYLL
0.8 × VCC
0.2 × VCC
0.8 × VCC
X0
X0A
PWH
PWL
tCF
DS07-16911-1E
0.8 × VCC
0.2 × VCC
tCR
105
MB91645A Series
(3) Conditions of PLL
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Value
Parameter
Symbol
Conditions
Min
Typ
Max
PLL oscillation stabilization
wait time (LOCK UP time)
tLOCK
⎯
600
⎯
⎯
μs
PLL input clock
frequency
fPLLI
⎯
4
⎯
24
MHz
PLL multiple rate
⎯
⎯
4
⎯
30
fPLLO
⎯
80
⎯
120
PLL macro oscillation
clock frequency
Unit
Remarks
Time from when the PLL
starts operating until the
oscillation stabilizes
multiplied
ODS × PMS
by
MHz
(4) Reset Input Standards
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Reset input time
(At power-on, main oscillation
stop mode)
Symbol Pin name
tINITX
Reset input rise time and fall
time
Unit
Min
Max
Oscillation time of
oscillator + 10 tCYLH
⎯
ns
10 tCYLH
⎯
ns
⎯
10
ms
⎯
INIT
Reset input time
(At other times)
Value
Conditions
tINITXF
tINITXR
Remarks
*
* : To make INIT = “L” during below state, hold the input 50 μs or over to the INIT pin.
• At power-on
• When in stop mode
tINITX
VIHS
VIHS
INIT
VILS
tINITXF
106
VILS
tINITXR
DS07-16911-1E
MB91645A Series
(5) Clock Output Timing
• tCHCL : tCLCH = 1 : 1 (divided by 1, 2, 4, 6, 8)
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
Cycle time
tCYC
SYSCLK↑→SYSCLK↓
tCHCL
SYSCLK↓→SYSCLK↑
tCLCH
Pin name
Conditions
SYSCLK
FCT = FCC,
FCT = FCC/2
Value
Unit
Min
Max
tCYCT
⎯
ns
tCYC / 2 − 5
tCYC / 2 + 5
ns
tCYC / 2 − 5
tCYC / 2 + 5
ns
Notes: • tCYC is a frequency of 1 clock cycle indicating gear ratio.
• When DIVT = 000, be sure to set as DIVB=000.
• tCHCL : tCLCH = 1 : 2 (divided by 3)
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
Cycle time
tCYC
SYSCLK↑→SYSCLK↓
tCHCL
SYSCLK↓→SYSCLK↑
tCLCH
Pin name
Conditions
SYSCLK
FCT = FCC,
FCT = FCC/2
Value
Unit
Min
Max
tCYCT
⎯
ns
1 / 3 tCYC − 5
1 / 3 tCYC + 5
ns
2 / 3 tCYC − 5
2 / 3 tCYC + 5
ns
Note: tCYC is a frequency of 1 clock cycle indicating gear ratio.
• tCHCL : tCLCH = 2 : 3 (divided by 5)
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
Cycle time
tCYC
SYSCLK↑→SYSCLK↓
tCHCL
SYSCLK↓→SYSCLK↑
tCLCH
Pin name
Conditions
SYSCLK
FCT = FCC,
FCT = FCC/2
Value
Unit
Min
Max
tCYCT
⎯
ns
2 / 5 tCYC − 5
2 / 5 tCYC + 5
ns
3 / 5 tCYC − 5
3 / 5 tCYC + 5
ns
Note: tCYC is a frequency of 1 clock cycle indicating gear ratio.
• tCHCL : tCLCH = 3 : 4 (divided by 7)
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
Cycle time
tCYC
SYSCLK↑→SYSCLK↓
tCHCL
SYSCLK↓→SYSCLK↑
tCLCH
Pin name
Conditions
SYSCLK
FCT = FCC,
FCT = FCC/2
Value
Unit
Min
Max
tCYCT
⎯
ns
3 / 7 tCYC − 5
3 / 7 tCYC + 5
ns
4 / 7 tCYC − 5
4 / 7 tCYC + 5
ns
Note: tCYC is a frequency of 1 clock cycle indicating gear ratio.
DS07-16911-1E
107
MB91645A Series
tCYC
tCHCL
tCLCH
VOH
VOH
SYSCLK
VOL
108
DS07-16911-1E
MB91645A Series
(6) Split Bus Access Read/Write Operation
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
Pin name
tCHASL
Conditions
Value
Unit Remarks
Min
Max
SYSCLK
AS
0.6
10
ns
SYSCLK
CS0 to CS3
0.6
10
ns
SYSCLK
A23 to A00
0.6
10
ns
tCHRH
SYSCLK
RD
0.6
10
ns
RD minimum pulse width
tRLRH
RD
tCYC − 10
⎯
ns
Data setup → RD↑ time
tDSRH
18
⎯
ns
RD↑→ data hold time
tRHDH
RD
D15 to D00
0
⎯
ns
tCHWH
SYSCLK
WR0, WR1
0.6
10
ns
WR0, WR1 minimum pulse
width
tWLWH
WR0, WR1
tCYC − 10
⎯
ns
SYSCLK↑→ Data output time
tCHDV
0.6
15
ns
SYSCLK↑→ Data hold time
tCHDX
SYSCLK
D15 to D00
0.6
15
ns
AS delay time
CS0 to CS3 delay time
Address delay time
RD delay time
WR0, WR1 delay time
tCHASH
tCHCSL
tCHCSH
tCHAV
tCHAX
tCHRL
tCHWL
⎯
*
*
* : When the bus timing is delayed by an automatic wait insertion or RDY input, add the time (tCYC × the number
of delay cycles added) to this rating.
Note: When the external load capacitance C = 50pF.
DS07-16911-1E
109
MB91645A Series
t2
t1
t3
tCYC
VOH
VOH
VOH
VOH
SYSCLK
tCHASL
tCHASH
VOH
AS
VOL
tCHCSH
tCHCSL
CS0 to CS3
VOH
VOL
tCHAX
tCHAV
VOH
VOH
A23 to A00
VOL
VOL
tCHRL
tCHRH
tRLRH
VOL
RD
VOH
tDSRH
tRHDH
VIH
D15 to D00
VIH
Read
VIL
tCHWL
VIL
tCHWH
tWLWH
WR0,WR1
VOL
VOH
VOH
VOH
D15 to D00
Write
VOL
VOL
tCHDV
110
tCHDX
DS07-16911-1E
MB91645A Series
(7) Multiplexed Bus Access Read/Write Operation
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
SYSCLK↑ → D15 to D00
address delay time
tCHMAV
tCHMAX
SYSCLK↑ → D15 to D00
data delay time
tCHMDV
Pin name
Conditions
SYSCLK
D15 to D00
(address)
⎯
Value
Unit
Min
Max
0.6
15
ns
0.6
15
ns
Notes: • The ratings not listed here are the same as the split bus interface.
• When the external load capacitance C = 50pF.
tCYC
SYSCLK
AS
tCHMAV
D15 to D00
DS07-16911-1E
Address
tCHMDV
tCHMAX
Write data
111
MB91645A Series
(8) Ready Input Timing
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
RDY setup time → SYSCLK↑
SYSCLK↑→ RDY hold time
Symbol
Pin name
tRDYS
SYSCLK
RDY
Unit
Min
Max
18
⎯
ns
0
⎯
ns
⎯
SYSCLK
RDY
tRDYH
Value
Conditions
tCYC
VOH
SYSCLK
VOH
VOL
VOL
tRDYS tRDYH
tRDYS tRDYH
RDY
(wait applied)
VIH
VIL
RDY
(wait not applied)
VIH
VIH
VIL
112
VIH
VIL
VIL
DS07-16911-1E
MB91645A Series
(9) DMA Controller Timing
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
Pin name
tDRWH
tCHDAL
DREQ input pulse width
DACK delay time
tCHDAH
tCHDEL
DEOP delay time
Conditions
Unit
Min
Max
DREQn
2 tCYCT
⎯
ns
SYSCLK
DACKn
0.6
10
ns
0.6
10
ns
SYSCLK
DEOPn
tCHDEH
Value
⎯
DREQ setup time
tCHDRS
SYSCLK
DREQn
18
⎯
ns
DREQ hold time
tCHDRH
SYSCLK
DREQn
0
⎯
ns
tCYC
VOH
VOH
VOH
VOH
SYSCLK
tDRWH
tCHDRS
DREQn
(When DMAR.REQL = 0)
VILS
tCHDRH
VIHS
tDRWH
tCHDRS
DREQn
(When DMAR.REQL=1)
VIHS
tCHDRH
VILS
Note: When the external load capacitance C = 50pF.
DS07-16911-1E
113
MB91645A Series
tCYC
SYSCLK
VOH
VOH
VOH
VOH
CSn timing
(When DMAR.ACKMD = 0)
CSn
VOH
VOL
tCHDAL
DACKn
(When DMAR.ACKL = 0)
DACKn
(When DMAR.ACKL = 1)
tCHDAH
VOH
VOL
tCHDAH
tCHDAL
VOH
VOL
tCHDEL
DEOPn
(When DMAR.EOPL = 0)
tCHDEH
VOH
VOL
tCHDEH
DEOPn
(When DMAR.EOPL = 1)
tCHDEL
VOH
VOL
RD/WRn timing
(When DMAR.ACKMD = 1)
RD
WRn
VOL
tCHDAL
DACKn
(When DMAR.ACKL = 0)
DACKn
(When DMAR.ACKL = 1)
DEOPn
(When DMAR.EOPL = 0)
DEOPn
(When DMAR.EOPL = 1)
114
VOH
tCHDAH
VOL
VOH
tCHDAH
tCHDAL
VOH
VOL
tCHDEL
tCHDEH
VOL
VOH
tCHDEH
tCHDEL
VOH
VOL
DS07-16911-1E
MB91645A Series
(10) Base Timer Input Timing
• Timer input timing
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Input pulse width
Symbol
Pin name
Conditions
tTIWH
tTIWL
TIOAn/TIOBn
(When used as ECK, TIN)
⎯
tTIWH
ECK
VIHS
Value
Min
Max
2 tCYCP
⎯
Unit
ns
tTIWL
VIHS
VILS
TIN
VILS
• Trigger Input Timing
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Input pulse width
Symbol
Pin name
Conditions
tTRGH
tTRGL
TIOAn/TIOBn
(When used as TGIN)
⎯
tTRGH
VIHS
TGIN
DS07-16911-1E
Value
Min
Max
2 tCYCP
⎯
Unit
ns
tTRGL
VIHS
VILS
VILS
115
MB91645A Series
(11) Synchronous serial (CSIO) timing
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
• Synchronous serial (SPI = 0, SCINV = 0)
Parameter
Symbol
Pin name
Serial clock cycle time
tSCYC
SCKn
SCK ↓ → SOUT delay time
tSLOVI
SCKn
SOUTn
Conditions
Internal shift clock
operation
Value
Unit
Min
Max
4tCYCP
⎯
ns
− 30
+ 30
ns
45
⎯
ns
SIN → SCK ↑ setup time
tIVSHI
SCKn
SINn
SCK ↑ → SIN hold time
tSHIXI
SCKn
SINn
0
⎯
ns
Serial clock “L” pulse width
tSLSH
SCKn
2tCYCP − 10
⎯
ns
Serial clock “H” pulse width
tSHSL
SCKn
tCYCP + 10
⎯
ns
SCK ↓ → SOUT delay time
tSLOVE
SCKn
SOUTn
⎯
40
ns
SIN → SCK↑ setup time
tIVSHE
SCKn
SINn
15
⎯
ns
SCK ↑ → SIN hold time
tSHIXE
SCKn
SINn
20
⎯
ns
SCK fall time
tF
SCKn
⎯
⎯
5
ns
SCK rise time
tR
SCKn
⎯
⎯
5
ns
External shift clock
operation
Notes: • The above standards apply to CLK synchronous mode.
• tCYCP indicates the peripheral clock cycle time.
• When the external load capacitance C = 50pF.
tSCYC
VOH
SCK
VOL
VOL
tSLOVI
VOH
SOUT
VOL
tIVSHI
tSHIXI
VIHS
VIHS
VILS
VILS
SIN
MS bit = 0
116
DS07-16911-1E
MB91645A Series
tSLSH
tSHSL
VIHS
SCK
tF
VIHS
VILS
VILS
VIHS
tR
tSLOVE
VOH
SOUT
VOL
tIVSHE
tSHIXE
VIHS
VIHS
VILS
VILS
SIN
MS bit = 1
• Synchronous serial (SPI = 0, SCINV = 1)
Symbol
Pin name
Serial clock cycle time
tSCYC
SCK ↑→ SOUT delay time
Parameter
Conditions
Value
Unit
Min
Max
SCKn
4tCYCP
⎯
ns
tSHOVI
SCKn
SOUTn
− 30
+ 30
ns
SIN → SCK↓ setup time
tIVSLI
SCKn
SINn
45
⎯
ns
SCK ↓ → SIN hold time
tSLIXI
SCKn
SINn
0
⎯
ns
Serial clock “L” pulse width
tSLSH
SCKn
2tCYCP − 10
⎯
ns
Serial clock “H” pulse width
tSHSL
SCKn
tCYCP + 10
⎯
ns
SCK ↑ → SOUT delay time
tSHOVE
SCKn
SOUTn
⎯
40
ns
SIN → SCK↓ setup time
tIVSLE
SCKn
SINn
15
⎯
ns
SCK ↓ → SIN hold time
tSLIXE
SCKn
SINn
20
⎯
ns
SCK fall time
tF
SCKn
⎯
5
ns
SCK rise time
tR
SCKn
⎯
5
ns
Internal shift clock
operation
External shift clock
operation
Notes: • The above standards apply to CLK synchronous mode.
• tCYCP indicates the peripheral clock cycle time.
• When the external load capacitance C = 50pF.
DS07-16911-1E
117
MB91645A Series
tSCYC
VOH
VOH
VOL
SCK
tSHOVI
VOH
SOUT
VOL
tIVSLI
SIN
tSLIXI
VIHS
VIHS
VILS
VILS
MS bit = 0
tSHSL
VIHS
SCK
tSLSH
VIHS
tR
VILS
VILS
VILS
tF
tSHOVE
VOH
SOUT
VOL
tIVSLE
SIN
tSLIXE
VIHS
VIHS
VILS
VILS
MS bit = 1
118
DS07-16911-1E
MB91645A Series
• Synchronous serial (SPI = 1,SCINV = 0)
Parameter
Symbol
Pin name
Serial clock cycle time
tSCYC
SCK ↑→ SOUT delay time
Value
Conditions
Unit
Min
Max
SCKn
4tcycp
⎯
ns
tSHOVI
SCKn
SOUTn
− 30
+ 30
ns
SIN → SCK↓ setup time
tIVSLI
SCKn
SINn
45
⎯
ns
SCK ↓ → SIN hold time
tSLIXI
SCKn
SINn
0
⎯
ns
SOUT → SCK ↓ delay time
tSOVLI
SCKn
SOUTn
2tcycp − 30
⎯
ns
Serial clock “L” pulse width
tSLSH
SCKn
2tcycp − 10
⎯
ns
Serial clock “H” pulse width
tSHSL
SCKn
tcycp + 10
⎯
ns
SCK ↑ → SOUT delay time
tSHOVE
SCKn
SOUTn
⎯
40
ns
SIN → SCK↓ setup time
tIVSLE
SCKn
SINn
15
⎯
ns
SCK ↓ → SIN hold time
tSLIXE
SCKn
SINn
20
⎯
ns
SCK fall time
tF
SCKn
⎯
5
ns
SCK rise time
tR
SCKn
⎯
5
ns
Internal shift clock
operation
External shift clock
operation
Notes: • The above standards apply to CLK synchronous mode.
• tCYCP indicates the peripheral clock cycle time.
• When the external load capacitance C = 50pF.
tSCYC
VOH
SCK
VOL
tSHOVI
VOL
tSOVLI
SOUT
VOH
VOL
VOH
VOL
tIVSLI
SIN
tSLIXI
VIHS
VILS
VIHS
VILS
MS bit = 0
DS07-16911-1E
119
MB91645A Series
tSHSL
tSLSH
VIHS
SCK
VILS
tSHOVE
tR
VOH
VOL
VOH
VOL
tIVSLE
SIN
VIHS
VILS
tF
*
SOUT
VIHS
VILS
tSLIXE
VIHS
VILS
VIHS
VILS
MS bit = 1
* : Changes when written to TDR register
• Synchronous serial (SPI = 1, SCINV = 1)
Symbol
Pin name
Serial clock cycle time
tSCYC
SCK ↓ → SOUT delay time
Parameter
Conditions
Value
Unit
Min
Max
SCKn
4tcycp
⎯
ns
tSLOVI
SCKn
SOUTn
− 30
+ 30
ns
SIN → SCK ↑ setup time
tIVSHI
SCKn
SINn
45
⎯
ns
SCK ↑→ SIN hold time
tSHIXI
SCKn
SINn
0
⎯
ns
SOUT → SCK ↑ delay time
tSOVHI
SCKn
SOUTn
2tcycp − 30
⎯
ns
Serial clock “L” pulse width
tSLSH
SCKn
2tcycp − 10
⎯
ns
Serial clock “H” pulse width
tSHSL
SCKn
tcycp + 10
⎯
ns
SCK ↓ → SOUT delay time
tSLOVE
SCKn
SOUTn
⎯
40
ns
SIN → SCK ↑ setup time
tIVSHE
SCKn
SINn
15
⎯
ns
SCK ↑ → SIN hold time
tSHIXE
SCKn
SINn
20
⎯
ns
SCK fall time
tF
SCKn
⎯
5
ns
SCK rise time
tR
SCKn
⎯
5
ns
Internal shift clock
operation
External shift clock
operation
Notes: • The above standards apply to CLK synchronous mode.
• tCYCP indicates the peripheral clock cycle time.
• When the external load capacitance C = 50pF.
120
DS07-16911-1E
MB91645A Series
tSCYC
VOH
SCK
VOH
VOL
tSLOVI
tSOVHI
VOH
VOL
VOH
VOL
SOUT
tIVSHI
tSHIXI
VIHS
VILS
SIN
VIHS
VILS
MS bit = 0
tSHSL
tR
VIHS
SCK
tSLSH
VIHS
VILS
tSLOVE
VILS
VIHS
VILS
VOH
VOL
VOH
VOL
SOUT
tIVSHE
tSHIXE
VIHS
VILS
SIN
tF
VIHS
VILS
MS bit = 1
• External clock (EXT = 1) : asynchronous only
Parameter
Symbol
Serial clock “L” pulse width
tSLSH
Serial clock “H” pulse width
tSHSL
SCK fall time
tF
SCK rise time
tR
CL = 50 pF
tSHSL
tR
SCK
VIHS
VILS
DS07-16911-1E
Conditions
Value
Max
tcycp + 10
⎯
ns
tcycp + 10
⎯
ns
⎯
5
ns
⎯
5
ns
tSLSH
VIHS
VILS
Unit
Min
tF
VIHS
VILS
121
MB91645A Series
(12) Free-run Timer Clock, Reload Timer Event Input, Up/down Counter Input, Input Capture Input, Interrupt
Input Timing
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
tTIWH
tTIWL
Input pulse width
Value
Pin name
Conditions
Min
Max
FRCKn
TMIn
INn
AINn
BINn
ZINn
⎯
2 tCYCP
⎯
ns
*1
⎯
3 tCYCP
⎯
ns
*1
⎯
1.0
⎯
μs
*2
INTn
Unit
Remarks
*1 : tCYCP indicates peripheral clock cycle time, except when in stop mode, in main timer mode and in watch mode.
*2 : When in stop mode, in main timer mode, or in watch mode.
FRCKn
TMIn
INn
AINn
BINn
ZINn
INTn
tTIWH
tTIWL
VIHS
VILS
VIHS
VILS
(13) A/D Converter Trigger Input Timing
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Value
Parameter
Symbol
Pin name
Conditions
Min
Max
A/D converter trigger
input
tTADTGL
tTADTGH
ADTRGn
⎯
2 tCYCP
⎯
Unit
ns
Remarks
*
* : tCYCP indicates peripheral clock cycle time.
tTADTGL
tTADTGH
ADTRGn
VIHS
VILS
122
VIHS
VILS
DS07-16911-1E
MB91645A Series
(14) I2C Timing
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Symbol
Pin name
SCL clock frequency
fSCL
“(Repeated) START
condition” hold time
SDA ↓ → SCL ↓
Condition
Typical mode
High-speed mode
Unit
Min
Max
Min
Max
SCKn
(SCLn)
0
100
0
400
kHz
tHDSTA
SOUTn
(SDAn)
SCKn
(SCLn)
4.0
⎯
0.6
⎯
μs
SCL clock “L” width
tLOW
SCKn
(SCLn)
4.7
⎯
1.3
⎯
μs
SCL clock “H” width
tHIGH
SCKn
(SCLn)
4.0
⎯
0.6
⎯
μs
“Repeated START
condition” setup time
SCL ↑→ SDA ↓
tSUSTA
SCKn
(SCLn)
4.7
⎯
0.6
⎯
μs
tHDDAT
SOUTn
(SDAn)
SCKn
(SCLn)
0
3.45*2
0
0.9*3
μs
tSUDAT
SOUTn
(SDAn)
SCKn
(SCLn)
250
⎯
100
⎯
ns
“STOP condition”
setup time
SCL↑→ SDA↑
tSUSTO
SOUTn
(SDAn)
SCKn
(SCLn)
4.0
⎯
0.6
⎯
μs
Bus free time
between “STOP
condition” and
“START condition”
tBUF
⎯
4.7
⎯
1.3
⎯
μs
Noise filter
tSP
⎯
2tCYCP*4
⎯
2tCYCP*4
⎯
ns
Data hold time
SCL ↓ → SDA ↓ ↑
Data setup time
SDA ↓ ↑→ SCL↑
CL = 50 pF
R = (Vp/IOL)*1
⎯
*1 : R and C represent the pull-up resistance and load capacitance of the SCL and SDA lines, respectively. Vp
indicates the power supply voltage of the pull-up resistance and IOL indicates VOL guaranteed current.
*2 : The maximum tHDDAT must satisfy that it doesn't extend at least “L” period (tLOW) of device's SCL signal.
*3 : A high-speed mode I2C bus device can be used on a standard mode I2C bus system as long as the device
satisfies the requirement of “tSUDAT ≥ 250 ns”.
*4 : tCYCP is the peripheral clock cycle time. To use I2C, set the peripheral bus clock at 8 MHz or more.
DS07-16911-1E
123
MB91645A Series
SDA
tSUDAT
tLOW
tSUSTA
tBUF
SCL
tHDSTA
124
tHDDAT
tHIGH
tHDSTA
tSP
tSUSTO
DS07-16911-1E
MB91645A Series
5. Electrical Characteristics for the A/D Converter
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Pin name
Value
Min
Typ
Max
Unit
Remarks
Resolution
⎯
⎯
⎯
10
bit
Total error
⎯
− 5.0
⎯
+ 5.0
LSB
Linearity error
⎯
− 3.5
⎯
+ 3.5
LSB
Differential linearity error
⎯
−3
⎯
+3
LSB
Zero transition voltage
AN0
to
AN31
− 1.5
+ 0.5
+4
AVCC = 3.3 V,
LSB AVRH = 3.3 V
Full transition voltage
AN0
to
AN31
AVRH − 4
AVRH − 1.5
AVRH + 0.5
LSB
Compare time
⎯
0.72*3
⎯
⎯
μs
PCLK = 33 MHz
Conversion time
⎯
1.2*1
⎯
⎯
μs
PCLK = 33 MHz
⎯
⎯
7
When operating 2
mA A/D units
(with D/A stopped)
⎯
⎯
11
μA
⎯
⎯
1.2
When operating
mA 2 A/D units
AVRH = 3.0 V
⎯
⎯
5
μA
Power supply current
(analog + digital)
Reference power supply
current
(between AVRH and
AVSS)
AVCC
AVRH
Analog input
capacitance
⎯
⎯
⎯
8.5
pF
Interchannel disparity
⎯
⎯
⎯
4
LSB
Analog port input current
AN0 to
AN31
⎯
⎯
10
μA
Analog input voltage
AN0 to
AN31
AVSS
⎯
AVRH
V
Reference voltage
AVRH
AVSS
⎯
AVCC
V
At power-down*2
At power-down*2
*1 : It depends on the actual external load and the clock cycle supplied to peripheral resources. Make sure to satisfy
PCLK cycle × 4 or over + below (Equation 1). The condition of minimum conversion time is the value when
PCLK = 33 MHz, sampling time: 0.424 μs, external impedance: 1.4k Ω or below, compare time: 0.72 μs.
*2 : The current when the CPU is in stop mode and the A/D converter is not operating.
*3 : Compare time = {(CT + 1) × 10 + 4} × peripheral clock (PCLK) period. (CT indicates compare time setting bits.)
The condition of the minimum compare time is when CT = 1 and PCLK = 33 MHz.
DS07-16911-1E
125
MB91645A Series
Rext
AN0 to AN31
Analog input pin
Comparator
Rin
Analog signal
source
Cin
Rin
Cin
Approx. 5.3 kΩ Approx. 8.5 pF
The output impedance of the external circuit connected to the analog input affects the sampling time of the A/D
converter. Design the output impedance of the output circuit such that the required sampling time is less than the
value of TS calculated from the following equation.
(Equation1) Ts =
Ts
Rin
Cin
Rext
(Rin + Rext) × Cin × 8
: Sampling time
: Input resistance of A/D = 5.3 kΩ
: Input capacitance of A/D = 8.5 pF
: Output impedance of external circuit
If the sampling time is set as 600 ns,
600 ns ≥ (5.3 kΩ + Rext) × 8.5 pF × 8
∴Rext ≤ 3.5 kΩ
And the impedance of the external circuit therefore needs to be 3.5 kΩ or less.
126
DS07-16911-1E
MB91645A Series
Definition of 10-bit A/D Converter Terms
• Resolution
: Analog variation that is recognized by an A/D converter.
• Linearity error
: Deviation of the line between the zero-transition point
(0000000000←→0000000001) and the full-scale transition point
(1111111110←→1111111111) from the actual conversion characteristics.
• Differential linearity error : Deviation from the ideal value of the input voltage that is required to change the
output code by 1 LSB.
• Total error
: Difference between the actual value and the theoretical value. The total error includes
zero transition error, full-scale transition error, and linear error.
Linearity error
3FFH
Differential linearity error
Actual conversion
characteristics
Actual conversion
characteristics
(N + 1)H
3FEH
{1 LSB (N − 1) + V OT}
VFST
Ideal characteristics
(Actuallymeasured
value)
VNT
004H
(Actually-measured
value)
003H
Actual conversion
characteristics
Ideal characteristics
002H
001H
Digital output
Digital output
3FDH
NH
(N − 1)H
VNT
(N − 2)H
VOT (Actually-measured value)
AVSS
Analog input
V(N+1)T
AVRH
(Actually-measured
value)
(Actually-measured
value)
Actual conversion characteristics
AVSS
AVRH
Analog input
VNT − {1 LSB × (N − 1) + VOT}
[LSB]
1 LSB’
V (N+1) T − VNT
− 1 [LSB]
Differential linearity error of digital output N =
1 LSB
VFST − VOT
1 LSB =
1022
Linearity error of digital output N =
N
VOT
VFST
VNT
: A/D converter digital output value.
: Voltage at which the digital output changes from 000H to 001H.
: Voltage at which the digital output changes from 3FEH to 3FFH.
: Voltage at which the digital output changes from (N − 1)H to NH.
(Continued)
DS07-16911-1E
127
MB91645A Series
(Continued)
Total error
3FFH
1.5 LSB'
3FEH
Actual conversion
characteristics
3FDH
Digital output
{1 LSB' (N − 1) + 0.5 LSB'}
004H
VNT
(Actually-measured value)
Actual conversion
characteristics
003H
002H
001H
Ideal
characteristics
0.5 LSB'
AVSS
Analog input
1 LSB’ (Ideal value)
Total error of digital output N
AVRH
AVRH − AVSS
[V]
1024
VNT − {1 LSB’ × (N − 1) + 0.5 LSB’}
=
1 LSB’
=
N : A/D converter digital output value.
VNT : Voltage at which the digital output changes from (N + 1)H to NH.
VOT’ (Ideal value) = AVSS + 0.5 LSB [V]
VFST’ (Ideal value) = AVRH − 1.5 LSB [V]
128
DS07-16911-1E
MB91645A Series
6. Electrical Characteristics for the D/A Converter
(VCC = AVCC = 2.7 V to 3.6 V, VDDI = 1.65 V to 1.95 V, VSS = AVSS = 0 V, Ta = − 40 °C to + 85 °C)
Parameter
Pin name
Value
Min
Typ
Max
Unit
Remarks
Resolution
⎯
⎯
⎯
8
bit
Linearity error
⎯
− 2.0
⎯
+ 2.0
LSB
When the output is unloaded
Differential linearity
error
⎯
− 1.0
⎯
+ 1.0
LSB
When the output is unloaded
⎯
⎯
0.6
⎯
μs
When load capacitance
(CL) = 20 pF
⎯
⎯
3.0
⎯
μs
When load capacitance
(CL) = 100 pF
DA0 to DA2
3.19
3.51
5.85
kΩ
Conversion time
Analog output
impedance
⎯
Analog current
450
⎯
μA
10 μs conversion, when the
output is unloaded (When 3
channels operating, A/D
stopped)
⎯
⎯
3600*
μA
When the input digital code is
fixed at 7AH or 85H (When 3
channels operating, A/D
stopped)
⎯
⎯
11
μA
At power-down (When A/D
stopped)
AVCC
* : The current consumption of the D/A converter varies with input digital code. The standard value indicates the
current consumed when the digital code that maximizes the current consumption is input.
DS07-16911-1E
129
MB91645A Series
7. Flash Memory Write/Erase Characteristics
(VCC = 3.3 V, VDDI = 1.8 V, Ta = + 25 °C)
Parameter
Value
Unit
Remarks
2.0
s
Excludes write time prior to internal erase
6
100
μs
Not including system-level overhead time.
⎯
8
32
s
Excludes write time prior to internal erase
10000
⎯
⎯
cycle
Average Ta ≤ + 85 °C
10*2
⎯
⎯
year
Average Ta ≤ + 85 °C
Min
Typ
Max
Sector erase time
⎯
0.5
Half word (16 bit) write
time
⎯
Chip erase time*1
Erase/write cycles
Flash memory
data hold time
*1: The chip erase time is the sector erase time multiplied across all sectors.
*2: This value comes from the technology qualification (using Arrhenius equation to translate high temperature
measurements into normalized value at + 85 °C) .
130
DS07-16911-1E
MB91645A Series
■ CHARACTERISTICS
• Characteristics of MB91F647A
Power supply current (sub operation)
250
200
150
100
50
0
-40 -30 -20 -10
0 +10 +20 +30 +40 +50 +60 +70 +80
ICCL temperature characteristics (semi-log)
VCC = 3.3 V
Power supply current [μA] (log)
Power supply current [μA]
ICCL temperature characteristics
VCC = 3.3 V
1000
100
10
1
-40 -30 -20 -10 0 +10 +20 +30 +40 +50 +60 +70 +80
Temperature Ta [ °C]
Temperature Ta [ °C]
Power supply current (watch mode)
180
160
140
120
100
80
60
40
20
0
-40 -30 -20 -10
0 +10 +20 +30 +40 +50 +60 +70 +80
Temperature Ta [ °C]
ICCT temperature characteristics (semi-log)
VCC = 3.3 V
Power supply current [μA] (log)
Power supply current [μA]
ICCT temperature characteristics
VCC = 3.3 V
1000
100
10
1
-40 -30 -20 -10 0 +10 +20 +30 +40 +50 +60 +70 +80
Temperature Ta [ °C]
Power supply current (stop mode)
ICCH temperature characteristics (semi-log)
VCC = 3.3 V
180
160
140
120
100
80
60
40
20
0
-40 -30 -20 -10
0 +10 +20 +30 +40 +50 +60 +70 +80
Temperature Ta [ °C]
DS07-16911-1E
Power supply current [μA] (log)
Power supply current [μA]
ICCH temperature characteristics
VCC = 3.3 V
1000
100
10
1
-40 -30 -20 -10 0 +10 +20 +30 +40 +50 +60 +70 +80
Temperature Ta [ °C]
131
MB91645A Series
■ ORDERING INFORMATION
Part number
Package
MB91F647APMC
176-pin plastic LQFP
(FPT-176P-M07)
MB91F647ABGL
176-pin plastic PFBGA
(BGA-176P-M04)
132
DS07-16911-1E
MB91645A Series
■ PACKAGE DIMENSION
176-pin plastic LQFP
Lead pitch
0.50 mm
Package width ×
package length
24.0 × 24.0 mm
Lead shape
Gullwing
Sealing method
Plastic mold
Mounting height
1.70 mm MAX
Code
(Reference)
P-LQFP-0176-2424-0.50
(FPT-176P-M07)
176-pin plastic LQFP
(FPT-176P-M07)
Note 1) * : Values do not include resin protrusion.
Resin protrusion is +0.25(.010)Max(each side).
Note 2) Pins width and pins thickness include plating thickness
Note 3) Pins width do not include tie bar cutting remainder.
26.00±0.20(1.024±.008)SQ
*24.00±0.10(.945±.004)SQ
0.145±0.055
(.006±.002)
132
89
133
88
0.08(.003)
Details of "A" part
+0.20
1.50 –0.10
+.008
(Mounting height)
.059 –.004
0˚~8˚
0.10±0.10
(.004±.004)
(Stand off)
INDEX
176
45
"A"
LEAD No.
1
44
0.50(.020)
0.22±0.05
(.009±.002)
0.08(.003)
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.25(.010)
M
©2004-2008
FUJITSU MICROELECTRONICS LIMITED F176013S-c-1-2
C
2004 FUJITSU LIMITED F176013S-c-1-1
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
DS07-16911-1E
133
MB91645A Series
(Continued)
176-ball plastic PFBGA
Ball pitch
0.80 mm
Package width ×
package length
12.00 × 12.00 mm
Lead shape
Soldering ball
Sealing method
Plastic mold
Ball size
∅0.45 mm
Mounting height
1.45 mm Max.
Weight
0.32 g
(BGA-176P-M04)
(BGA-176P-M04)
176-ball plastic PFBGA
(BGA-176P-M04)
B
12.00±0.10(.472±.004)
0.20(.008) S B
0.80(.031)
REF
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0.80(.031)
REF
A
12.00±0.10
(.472±.004)
10.40(.410)
REF
(INDEX AREA)
0.20(.008) S A
1.25±0.20
0.35±0.10
(.014±.004)
(Stand off)
(.049±.008)
(Seated height)
P N M L K J H G F E D C B A
INDEX
176-ø0.45±0.10
(176-ø.018±.004)
ø0.08(.003)
M
S A B
S
0.10(.004) S
©2003-2008
FUJITSU MICROELECTRONICS LIMITED B176004S-c-1-2
C
2003 FUJITSU LIMITED B176004S-c-1-1
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
134
DS07-16911-1E
MB91645A Series
MEMO
DS07-16911-1E
135
MB91645A Series
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,
Shinjuku-ku, Tokyo 163-0722, Japan
Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
For further information please contact:
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#05-08 New Tech Park 556741 Singapore
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http://www.fmal.fujitsu.com/
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Shanghai 200002, China
Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
http://cn.fujitsu.com/fmc/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fmk/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fmc/en/
Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
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does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
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Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
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Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
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