APT1201R4BFLL(G)
APT1201R4SFLL(G)
1200V
POWER MOS 7
R
9A 1.50 Ω
FREDFET
D3PAK
®
Power MOS 7 is a new generation of low loss, high voltage, N-Channel
enhancement mode power MOSFETS. Both conduction and switching
®
losses are addressed with Power MOS 7 by significantly lowering RDS(ON)
®
and Qg. Power MOS 7 combines lower conduction and switching losses
along with exceptionally fast switching speeds inherent with Microsem's
patented metal gate structure.
• Lower Input Capacitance
• Lower Miller Capacitance
• Lower Gate Charge, Qg
VDSS
ID
D
• Increased Power Dissipation
• Easier To Drive
• TO-247 or Surface Mount D3PAK Package
MAXIMUM RATINGS
Symbol
TO-247
G
S
All Ratings: TC = 25°C unless otherwise specified.
Parameter
APT1201R4B_SFLL
UNIT
1200
Volts
Drain-Source Voltage
9
Continuous Drain Current @ TC = 25°C
Amps
IDM
Pulsed Drain Current
VGS
Gate-Source Voltage Continuous
±30
VGSM
Gate-Source Voltage Transient
±40
Total Power Dissipation @ TC = 25°C
300
Watts
Linear Derating Factor
2.40
W/°C
PD
TJ,TSTG
1
36
Operating and Storage Junction Temperature Range
TL
Lead Temperature: 0.063" from Case for 10 Sec.
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
EAS
1
-55 to 150
°C
300
Amps
9
(Repetitive and Non-Repetitive)
1
Single Pulse Avalanche Energy
Volts
30
4
mJ
1210
STATIC ELECTRICAL CHARACTERISTICS
MIN
BVDSS
Drain-Source Breakdown Voltage (VGS = 0V, ID = 250µA)
1200
RDS(on)
Drain-Source On-State Resistance
IDSS
IGSS
VGS(th)
2
(VGS = 10V, ID = 4.5A)
TYP
MAX
UNIT
Volts
1.50
Ohms
Zero Gate Voltage Drain Current (VDS = 1200V, VGS = 0V)
250
Zero Gate Voltage Drain Current (VDS = 960V, VGS = 0V, TC = 125°C)
1000
Gate-Source Leakage Current (VGS = ±30V, VDS = 0V)
±100
nA
5
Volts
Gate Threshold Voltage (VDS = VGS, ID = 1mA)
3
CAUTION: These Devices are Sensitive to Electrostatic Discharge. Proper Handling Procedures Should Be Followed.
Microsemi Website - http://www.microsemi.com
µA
2-2009
Characteristic / Test Conditions
050-7392 Rev C
Symbol
APT1201R4B_SFLL
DYNAMIC CHARACTERISTICS
Symbol
Ciss
Characteristic
Test Conditions
Input Capacitance
Coss
VGS = 0V
Output Capacitance
VDS = 25V
C rss
Reverse Transfer Capacitance
f = 1 MHz
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain ("Miller ") Charge
td(on)
Turn-on Delay Time
tr
3
RESISTIVE SWITCHING
VGS = 15V
VDD = 600V
ID = 9A @ 25°C
Turn-on Switching Energy
Eoff
Turn-off Switching Energy
INDUCTIVE SWITCHING @ 25°C
6
Eon
Turn-on Switching Energy
Eoff
Turn-off Switching Energy
ns
500
VDD = 800V, VGS = 15V
XX
ID = 9A, RG = 5Ω
INDUCTIVE SWITCHING @ 125°C
6
nC
11
RG = 1.6Ω
Eon
UNIT
pF
60
75
10
50
8
5
27
VDD = 600V
Fall Time
MAX
2030
310
ID = 9A @ 25°C
Turn-off Delay Time
tf
TYP
VGS = 10V
Rise Time
td(off)
MIN
µJ
545
VDD = 800V, VGS = 15V
ID = 9A, RG = 4.3Ω
18
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Characteristic / Test Conditions
Symbol
IS
ISM
MIN
TYP
MAX
9
Continuous Source Current (Body Diode)
UNIT
Amps
Pulsed Source Current
1
(Body Diode)
36
VSD
Diode Forward Voltage
2
(VGS = 0V, IS = -ID 9A)
1.3
Volts
dv/
Peak Diode Recovery
18
V/ns
dt
dv/
dt
5
t rr
Reverse Recovery Time
(IS = -ID 9A, di/dt = 100A/µs)
Tj = 25°C
210
Tj = 125°C
710
Q rr
Reverse Recovery Charge
(IS = -ID 9A, di/dt = 100A/µs)
Tj = 25°C
0.7
Tj = 125°C
2.0
IRRM
Peak Recovery Current
(IS = -ID 9A, di/dt = 100A/µs)
Tj = 25°C
10
Tj = 125°C
15
ns
µC
Amps
THERMAL CHARACTERISTICS
Symbol
Characteristic
MIN
TYP
MAX
0.42
RθJC
Junction to Case
RθJA
Junction to Ambient
40
1 Repetitive Rating: Pulse width limited by maximum junction
temperature
2 Pulse Test: Pulse width < 380 µs, Duty Cycle < 2%
3 See MIL-STD-750 Method 3471
0.9
0.35
0.7
0.25
0.5
Note:
0.20
0.15
PDM
Z JC, THERMAL IMPEDANCE (°C/W)
θ
050-7392 Rev C
2-2009
0.45
0.30
0.3
0
Duty Factor D = t1/t2
0.1
0.05
SINGLE PULSE
0.05
10-5
t1
t2
0.10
10-4
°C/W
4 Starting Tj = +25°C, L = 29.9mH, RG = 25Ω, Peak IL = 9A
5 dv/dt numbers reflect the limitations of the test circuit rather than the
device itself. IS ≤ -ID9A di/dt ≤ 700A/µs VR ≤ 1200 TJ ≤ 150°C
6 Eon includes diode reverse recovery. See figures 18, 20.
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
0.40
UNIT
Peak TJ = PDM x ZθJC + TC
10-3
10-2
10-1
RECTANGULAR PULSE DURATION (SECONDS)
FIGURE 1, MAXIMUM EFFECTIVE TRANSIENT THERMAL IMPEDANCE, JUNCTION-TO-CASE vs PULSE DURATION
1.0
Typical Performance Curves
APT1201R4B_SFLL
20
VGS =15,10 & 8V
TC ( C)
0.164
0.257
Dissipated Power
(Watts)
0.0022
ZEXT
TJ ( C)
0.060
ZEXT are the external thermal
impedances: Case to sink,
sink to ambient, etc. Set to
zero when modeling only
the case to junction.
ID, DRAIN CURRENT (AMPERES)
18
50
40
30
TJ = +125°C
20
TJ = +25°C
0
2
4
6
8
10
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 4, TRANSFER CHARACTERISTICS
9
BVDSS, DRAIN-TO-SOURCE BREAKDOWN
VOLTAGE (NORMALIZED)
6
5
4
3
2
1
50
75
100
125
150
TC, CASE TEMPERATURE (°C)
FIGURE 6, MAXIMUM DRAIN CURRENT vs CASE TEMPERATURE
25
04
5.5V
02
5V
1.40
NORMALIZED TO
= 10V @ 4.5A
V
GS
1.30
1.20
VGS=10V
1.10
VGS=20V
1.00
0.90
0.80
0
2
4 6 8 10 12 14 16 18 20
ID, DRAIN CURRENT (AMPERES)
FIGURE 5, RDS(ON) vs DRAIN CURRENT
2.5
I
V
D
1.05
1.00
0.95
0.90
0.85
-50
1.2
= 4.5A
GS
1.10
-25
0
25
50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
FIGURE 7, BREAKDOWN VOLTAGE vs TEMPERATURE
= 10V
2.0
1.5
1.0
0.5
-50 -25
0
25 50
75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
FIGURE 8, ON-RESISTANCE vs. TEMPERATURE
VGS(TH), THRESHOLD VOLTAGE
(NORMALIZED)
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
(NORMALIZED)
6V
06
1.1
1.0
0.9
0.8
2-2009
ID, DRAIN CURRENT (AMPERES)
7
0.0
08
1.15
8
0
6.5V
10
0.7
0.6
-50 -25
0
25
50
75 100 125 150
TC, CASE TEMPERATURE (°C)
FIGURE 9, THRESHOLD VOLTAGE vs TEMPERATURE
050-7392 Rev C
0
TJ = -55°C
12
0
5
10
15
20
25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 3, LOW VOLTAGE OUTPUT CHARACTERISTICS
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
ID, DRAIN CURRENT (AMPERES)
VDS> ID (ON) x RDS (ON)MAX.
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
7V
14
0
FIGURE 2, TRANSIENT THERMAL IMPEDANCE MODEL
25
16
36
5,000
100µS
5
1mS
TC =+25°C
TJ =+150°C
SINGLE PULSE
1
1
10
100
1200
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 10, MAXIMUM SAFE OPERATING AREA
16
I
D
10mS
= 9A
12
VDS=100V
VDS=250V
8
VDS=400V
4
0
C, CAPACITANCE (pF)
10
Ciss
0 10 20 30 40 50 60 70 80 90 100
Qg, TOTAL GATE CHARGE (nC)
FIGURE 12, GATE CHARGES vs GATE-TO-SOURCE VOLTAGE
100
TJ =+150°C
TJ =+25°C
10
1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
FIGURE 13, SOURCE-DRAIN DIODE FORWARD VOLTAGE
V
td(off)
DD
G
J
T = 125°C
J
40
L = 100µH
30
20
1200
4
12
16
ID (A)
FIGURE 14, DELAY TIMES vs CURRENT
V
DD
R
G
1000
8
tf
8
tr
0
20
0
4
8
12
16
20
ID (A)
FIGURE 15, RISE AND FALL TIMES vs CURRENT
1200
= 800V
= 4.3Ω
T = 125°C
J
Eon
1000
Eon
L = 100µH
EON includes
800
12
4
td(on)
10
0
L = 100µH
= 800V
= 4.3Ω
tr and tf (ns)
V
R
= 800V
= 4.3Ω
T = 125°C
16
50
DD
G
SWITCHING ENERGY (µJ)
td(on) and td(off) (ns)
200
R
60
Eon and Eoff (µJ)
Crss
100
20
70
2-2009
Coss
10
.01
.1
1
10
50
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 11, CAPACITANCE vs DRAIN-TO-SOURCE VOLTAGE
80
0
1,000
IDR, REVERSE DRAIN CURRENT (AMPERES)
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPERES)
OPERATION HERE
LIMITED BY RDS (ON)
050-7392 Rev C
APT1201R4B_SFLL
10,000
diode reverse recovery
600
400
200
800
V
I
600
DD
D
= 800V
= 9A
T = 125°C
J
L = 100µH
E ON includes
400
diode reverse recovery
Eoff
200
Eoff
0
0
4
8
12
16
20
ID (A)
FIGURE 16, SWITCHING ENERGY vs CURRENT
0
0
10
20
30
40
50
RG, GATE RESISTANCE (Ohms)
FIGURE 17, SWITCHING ENERGY VS. GATE RESISTANCE
Typical Performance Curves
APT1201R4B_SFLL
10%
90%
Gate Voltage
Gate Voltage
TJ125°C
td(off)
td(on)
TJ125°C
tf
tr
Drain Current
90%
90%
10%
5%
5%
Drain Voltage
Drain Voltage
10%
Drain Current
0
Switching Energy
Switching Energy
Figure 19, Turn-off Switching Waveforms and Definitions
Figure 18, Turn-on Switching Waveforms and Definitions
APT15DQ120
APT60D120B
IC
V CC
V CE
G
D.U.T.
Figure 20, Inductive Switching Test Circuit
3
TO-247 Package Outline
15.49 (.610)
16.26 (.640)
6.15 (.242) BSC
5.38 (.212)
6.20 (.244)
Drain
(Heat Sink)
4.69 (.185)
5.31 (.209)
1.49 (.059)
2.49 (.098)
D PAK Package Outline
4.98 (.196)
5.08 (.200)
1.47 (.058)
1.57 (.062)
15.95 (.628)
16.05 (.632)
Revised
4/18/95
Drain
20.80 (.819)
21.46 (.845)
1.04 (.041)
1.15 (.045)
13.79 (.543)
13.99 (.551)
13.41 (.528)
13.51 (.532)
Revised
8/29/97
11.51 (.453)
11.61 (.457)
4.50 (.177) Max.
0.40 (.016)
0.79 (.031)
2.21 (.087)
2.59 (.102)
19.81 (.780)
20.32 (.800)
2.87 (.113)
3.12 (.123)
1.65 (.065)
2.13 (.084)
1.01 (.040)
1.40 (.055)
5.45 (.215) BSC
2-Plcs.
Dimensions in Millimeters and (Inches)
1.27 (.050)
1.40 (.055)
1.22 (.048)
1.32 (.052)
1.98 (.078)
2.08 (.082)
5.45 (.215) BSC
{2 Plcs.}
Gate
Drain
Source
Source
Drain
Gate
Dimensions in Millimeters (Inches)
Microsemi’s products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786
5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.
3.81 (.150)
4.06 (.160)
(Base of Lead)
Heat Sink (Drain)
and Leads
are Plated
050-7392 Rev C
0.46 (.018)
0.56 (.022) {3 Plcs}
0.020 (.001)
0.178 (.007)
2.67 (.105)
2.84 (.112)
2-2009
3.50 (.138)
3.81 (.150)