Migration from Atmel AT25D Series to the Spansion® S25FL-K SPI Flash Family Application Note 1. Introduction This application note provides conversion guidelines when migrating from the Atmel® AT25D SPI series to the Spansion® S25FL-K SPI Flash Family. The application note is based on information available to date from data sheets and other applications notes publicly available from Spansion and Atmel. Please refer also to the latest relevant specifications. The document discusses the specification differences when migrating from AT25D to S25FL-K. 2. Feature Comparison Atmel AT25DF and AT25DQ products are well suited for migrations to Spansion FL-K products. Some of the reasons are compatible pinouts, packages, core command set, and 4/32/64 kB block/sector structure. S25FL-K supports Dual I/O and Quad I/O modes, while AT25D only has Dual I/O mode (except AT25DQ161 which also supports Quad I/O). Note also that AT25DF041A is only single I/O. The major differences are Atmel's USON/WSON packages and the status register structure, which requires some SW changes. Other minor differences are sector architecture and the sector protection scheme. 2.1 Packaging - All Densities The most common packages between AT25D and S25FL-K are the SOIC packages where the pinout is identical. Figure 2.1 shows those SOIC packages and pinouts. Refer to the data sheets for detailed package information. Figure 2.1 SOIC 150/208/300 mil Package and Pinout (16-pin and 8-pin Versions) HOLD#/IO3 1 16 SCK VCC 2 15 SI/IO0 N/C 3 14 N/C N/C 4 13 N/C N/C 5 12 N/C N/C 6 11 N/C CS# 7 10 GND SO/IO1 8 9 CS# 1 8 VCC SO (IO1) 2 7 HOLD# (IO3) WP# (IO2) 3 6 CLK GND 4 5 SI (IO0) W#/ACC/IO2 Table 2.1 summarizes the available packages from Atmel and Spansion. Publication Number Migrate_AT25D_to_S25FL-K Revision 01 Issue Date November 19, 2010 A pplication Note Table 2.1 Package Comparison Atmel AT25D DF041A DF081A Dx161 SOIC8 150 mil X x x SOIC8 208 mil X x x Spansion S25FL-K DF321A x SOIC16 300 mil USON 5x6 FL004K FL008K FL016K x x x x x x FL032K FL064K x x x X x x x x WSON 6x8 2.2 DF641 x Sector Architecture The sector architecture between AT25D and S25FL-K is different. Atmel supports a uniform sector size of 64 kB whereas Spansion's sectors are 4 kB large. This impacts especially the sector protection. However, both Atmel and Spansion support the same flexible erase architectures of 4 kB, 32 kB, and 64 kB and chip erase operations (see Section 3.1, AT25DF vs. S25FL-K Command Set Comparison on page 5). Page programming size of 256 byte is also identical. Table 2.2 shows a summary of the erase and programming granularity. Table 2.2 Erase and Programming Granularity Atmel AT25 2.3 Spansion S25FL-K Sector Size 64 kB 4 kB Erase Size 4 kB, 32 kB, 64 kB, chip erase 4 kB, 32 kB, 64 kB, chip erase Page Prog. Size 256 byte 256 byte Sector Protection The Atmel sector protection is controlled by the status register. This is one difference which requires a software modification between Atmel and Spansion. A protection overview is included below as well as a description of the status register differences. For Atmel, every physical 64 kB sector of the device has a corresponding single-bit Sector Protection Register that is used to control the software protection of a sector. Upon device power-up, each sector protection register will default to the logical 1 state indicating that all sectors are protected and cannot be programmed or erased. Issuing Protect/Unprotect Sector command to a particular sector address will set/ reset the corresponding sector protection register to the logical 1/0 state. The Global Protect and Global Unprotect features can work in conjunction with Protect Sector and Unprotect Sector functions. Performing a Global Protect or Global Unprotect is accomplished by writing a certain combination of data to the status register using Write Status Register Byte 1 command. Spansion supports a different sector protection scheme. All, none, or a portion of the memory array can be protected from Program and Erase instructions via the status register. The Block Protect Bits (BP2, BP1, BP0) are non-volatile read/write bits in the status register (S4, S3, and S2) that provide Write Protection control and status. The factory default setting for the block protection bits is 0 (none of the array is protected.). Block Protect bits can be set using the write status register instruction. The non-volatile Top/Bottom bit (TB) controls if Block Protect Bits (BP2, BP1, BP0) protect from the Top (TB=0) or the Bottom (TB=1) of the array. The non-volatile Sector/Block Protect bit (SEC) controls if Block Protect Bits (BP2, BP1, BP0) protect either 4 kB Sectors (SEC=1) or 64 kB Blocks (SEC=0) in the Top (TB=0) or the Bottom (TB=1) of the array. The Complement Protect bit (CMP) is a non-volatile read/write bit in the status register (S14). It is used in conjunction with SEC, TB, BP2, BP1 and BP0 bits to provide more flexibility for the array protection. Once CMP is set to 1, previous array protection set by SEC, TB, BP2, BP1 and BP0 will be reversed. Refer to the Spansion data sheet for the valid combinations. Table 2.3 shows Spansion's sector protection using S25FL008K as an example. Section 2.4, Status Register on page 3 for further details. 2 Migrate_AT25D_to_S25FL-K_01 November 19, 2010 App l ic atio n No t e Table 2.3 Status Register Memory Protection (CMP = 0) Status Register (1) S25FL008K (8 MBit) Memory Protection SEC TB BP2 BP1 BP0 Block(s) Addresses Density Portion X X 0 0 0 None None None None 0 0 0 0 1 15 0F0000h – 0FFFFFh 64 kB Upper 1/16 0 0 0 1 0 14 and 15 0E0000h – 0FFFFFh 128 kB Upper 1/8 0 0 0 1 1 12 thru 15 0C0000h – 0FFFFFh 256 kB Upper 1/4 0 0 1 0 0 8 thru 15 080000h – 0FFFFFh 512 kB Upper 1/2 0 1 0 0 1 0 000000h – 00FFFFh 64 kB Lower 1/16 0 1 0 1 0 0 and 1 000000h – 01FFFFh 128 kB Lower 1/8 0 1 0 1 1 0 thru 3 000000h – 03FFFFh 256 kB Lower 1/4 0 1 1 0 0 0 thru 7 000000h – 07FFFFh 512 kB Lower 1/2 0 X 1 0 1 0 thru 15 000000h – 0FFFFFh 1 MB All X X 1 1 X 0 thru 15 000000h – 0FFFFFh 1 MB All 1 0 0 0 1 15 0FF000h – 0FFFFFh 4 kB Upper 1/256 1 0 0 1 0 15 0FE000h – 0FFFFFh 8 kB Upper 1/128 1 0 0 1 1 15 0FC000h – 0FFFFFh 16 kB Upper 1/64 1 0 1 0 X 15 0F8000h – 0FFFFFh 32 kB Upper 1/32 1 1 0 0 1 0 000000h – 000FFFh 4 kB Lower 1/256 1 1 0 1 0 0 000000h – 001FFFh 8 kB Lower 1/128 1 1 0 1 1 0 000000h – 003FFFh 16 kB Lower 1/64 1 1 1 0 X 0 000000h – 007FFFh 32 kB Lower 1/32 Note: 1. The Complement Protect bit (CMP) is a non-volatile read/write bit in the status register (S14). It is used in conjunction with SEC, TB, BP2, BP1 and BP0 bits to provide more flexibility for the array protection. Once CMP is set to 1, previous array protection set by SEC, TB, BP2, BP1 and BP0 will be reversed. For instance, when CMP=0, a top 4 kB sector can be protected while the rest of the array is not; when CMP=1, the top 4 kB sector will become unprotected while the rest of the array become read-only 2.4 Status Register The two bytes of Atmel's status register can be read to determine the device's ready/busy status as well as the status of many other functions such as Hardware Locking and Software Protection. Spansion's Read Status Register 1 and Read Status Register 2 instructions can be used to provide status on the availability of the flash memory array, if the device is write enabled or disabled, the state of write protection, Quad I/O mode setting, Security Register lock status and Erase/Program Suspend status. Atmel's AT25D reads both status register values at one time whereas Spansion’s FL-K distinguishes between register 1 and 2 (requires a different read command, see below). For writing, Atmel requires two different write commands (the Write Status Register Byte 1 command is used to modify the SPRL bit of the status register and/or to perform a Global Protect or Global Unprotect operation, write Status Register Byte 2 command is used to modify the RSTE and SLE bits of the status register). Spansion does not distinguish between the two bytes for writing. The Write Status Register instruction allows the Status Register to be written. Only non-volatile Status Register bits SRP0, SEC, TB, BP2, BP1, BP0 (bits 7 thru 2 of Status Register-1) and CMP, LB3, LB2, LB1, QE, SRP1 (bits 14 thru 8 of Status Register-2) can be written. All other status register bit locations are read-only and will not be affected by the Write Status Register instruction. In most cases, status register read and write operations require some SW modifications. Table 2.4 shows the structure of Atmel's status register. November 19, 2010 Migrate_AT25D_to_S25FL-K_01 3 A pplication Note Table 2.4 Atmel Status Register – Byte 1 Bit Name Type Description 7 SPRL Sector Protection Registers Locked R/W 6 RES Reserved for future use R 5 4 3:2 1 0 EPE WPP SWP WEL RDY/BSY Erase/Program Error Write Protect (WP) Pin Status Software Protection Status Write Enable Latch Status Ready/Busy Status 0 Sector Protection Registers are unlocked (default). 1 Sector Protection Registers are locked. 0 Reserved for future use. 0 Erase or program operation was successful. 1 Erase or program error detected. 0 WP is asserted. 1 WP is deasserted. 00 All sectors are software unprotected (all Sector Protection Registers are 0). 01 Some sectors are software protected. Read individual Sector Protection Registers to determine which sectors are protected. 10 Reserved for future use. 11 All sectors are software protected (all Sector Protection Registers are 1 – default). R R R 0 Device is not write enabled (default). 1 Device is write enabled. R 0 Device is ready. 1 Device is busy with an internal operation. R Note: 1. Only bit 7 can be written, the rest is reading status. Table 2.5 Atmel Status Register – Byte 2 Bit Name Type Description 7 RES Reserved for future use R 0 Reserved for future use. 6 RES Reserved for future use R 0 Reserved for future use. 5 RES Reserved for future use R 4 3 RSTE SLE Reset Enabled Sector Lockdown Enabled 0 Reserved for future use. 0 Reset command is disabled (default). 1 Reset command is enabled. 0 Sector Lockdown and Freeze Sector Lockdown State commands are disabled (default). 1 Sector Lockdown and Freeze Sector Lockdown State commands are enabled. R/W R/W 2 RES Reserved for future use R 0 Reserved for future use. 1 RES Reserved for future use R 0 Reserved for future use. 0 RDY/BSY Ready/Busy Status 0 Device is ready. 1 Device is busy with an internal operation. R Note: 1. Only bits 4 and 3 can be modified, the rest is read only. Figure 2.2 shows Spansion's status registers. S0 shows the device status if the device is busy, corresponding to the bit 0, byte 1/2 of Atmel. S1 corresponds to byte 1 bit 1 of Atmel's status register. 4 Migrate_AT25D_to_S25FL-K_01 November 19, 2010 App l ic atio n No t e Figure 2.2 Spansion Status Register 1 and 2 S7 S6 S5 S4 S3 S2 S1 S0 SRP0 SEC TB BP2 BP1 BP0 S15 S14 S13 S12 S11 S10 S9 S8 SUS CMP LB3 LB2 LB1 (R) QE SRP1 WEL BUSY Status Register Protect 0 (non-volatile) Sector Protect (non-volatile) Top/Bottom Protect (non-volatile) Block Protect Bits (non-volatile) Write Enable Latch Erase/Write In Progress Suspend Status Complement Protect (non-volatile) Security Register Lock Bits (non-volatile OTP) Reserved Quad Enable (non-volatile) Status Register Protect 1 ((non-volatile) 3. Software Considerations 3.1 AT25DF vs. S25FL-K Command Set Comparison AT25DF and S25FL-K share similar instructions (op-codes) in their command-set, which determine a compatible set of internal algorithms. Nevertheless, not all commands are supported when comparing one product family with the other. The Atmel devices support single input/single output read/write mode and dual Output Read/ Dual Input Write. The Spansion devices also support a comprehensive set of Dual and Quad I/O read and write modes. Table 3.1 shows a comparison summary of the command set of a Spansion S25FL-K device with the corresponding Atmel AT25DF, including some comments and remarks. Note that AT25DF04 is single I/O. November 19, 2010 Migrate_AT25D_to_S25FL-K_01 5 A pplication Note Table 3.1 Command Set of S25FL-K and AT25DF Name Description S25FL008K AT25DF081A READ Read Data (Single output) 03H 03H FAST_READ Fast Read (Single output) 0BH 0BH / 1BH DOR Dual Output Fast Read 3BH 3BH QOR Quad Output Fast Read 6BH DIOR Dual I/O Fast read BBH Supported only by S25FL-K QIOR Quad I/O Fast read EBH Supported only by S25FL-K RDID Comments Supported only by S25FL-K Word Read Quad I/O E7H Supported only by S25FL-K Octal Word Read Quad I/O E3H Supported only by S25FL-K Read Identification (JEDEC) 9FH Read Mfg. ID and device ID 90H 9FH Supported only by S25FL-K Read Mfg/Device ID Dual I/O 92H Supported only by S25FL-K Read Mfg/Device ID Dual I/O 94H Supported only by S25FL-K Set Burst with Wrap 77H Supported only by S25FL-K Continuous Read Mode Reset FFH Supported only by S25FL-K WREN Write Enable 06H 06H WRDI Write Disable 04H 04H Write Enable for volatile status Reg. 50H Supported only by S25FL-K Protect Sector 36H Supported only by AT25DF Unprotect Sector 39H Supported only by AT25DF Global Protect/Unprotect 01H Supported only by AT25DF 4KB/32KB Block Erase 20H/52H 20H/52H SE 64KB Block Erase D8H D8H BE Bulk Erase C7H, 60H C7H, 60H Erase/Program Suspend 75H B0H (2) AT25DF supports only for certain densities Erase/Program Resume 7AH D0H (2) AT25DF supports only for certain densities Page Program 02H 02H PP DIFP Dual Input fast program QPP Quad Page Programming 32H A2H DP Deep Power Down B9H B9H Release from Deep Power Down ABH ABH Release from Deep Power Down / Read Electronic Signature ABH Supported only by AT25DF Supported only by S25FL-K Reset (1) F0H Supported only by AT25DF Read Status Register 05H Similar command with a different output RDSR Read Status Register 1 05H Similar command with a different output RCR Read Status Register 2 35H Supported only by S25FL-K Write Status Register 01H WRR Write Status Register Byte 1 Write Status Register Byte 2 Read SFDP Register Similar command with a different input 01H Similar command with a different input 31H Supported only by AT25DF 5AH Supported only by S25FL-K Notes: 1. The Spansion S25FL-K does not offer a software reset command. The reset operation of the device happens during the power-up phase only. 2. Erase/Program Suspend and Resume commands are supported only on AT25DQ161, AT25DF321A, AT25DF641A. 6 Migrate_AT25D_to_S25FL-K_01 November 19, 2010 App l ic atio n No t e The command set comparison is applicable to the following memory densities across the two product families: AT25DF041A : S25FL004K (4 Mb flash memory) (AT25DF04 is single only) AT25DF081A : S25FL008K (8 Mb flash memory) AT25DF161 : S25FL016K (16 Mb flash memory) AT25DF321A : S25FL032K (32 Mb flash memory) AT25DF641A : S25FL064K (32 Mb flash memory) Spansion also offers the product S25FL128K (128 Mb flash memory) for users interested in expanding the flash memory size above 64 Mb. 3.2 Quad I/O Instructions All S25FL-K products support Quad I/O SPI operation when using the Fast Read Quad Output (6Bh), Fast Read Quad I/O (EBh), Word Read Quad I/O (E7h), and Octal Word Read Quad I/O (E3h) instructions. The WP# pin becomes an input pin or output pin by using the Quad I/O mode commands. Atmel's AT25DQ161 also supports the Quad I/O mode, the other devices support Single and Dual I/O mode. Atmel’s AT25DF04 is single only. For Atmel AT25DQ161 the Quad I/O mode requires a modification in an additional configuration register. Quad mode needs to be enabled by setting the corresponding bit (See AT25DQ and S25FL-K Command Set Comparison on page 8). Spansion FL-K devices include the Quad I/O enable bit in the status register. Figure 2.1 on page 1 shows the corresponding pin descriptions for quad I/O mode. 3.3 OTP and Security Commands The OTP (One Time Programmable Area) is a specific register that can be used to store a serial number or a security-oriented key. AT25DF has a 128-byte OTP area that can be programmed by the user (64 byte) and by Atmel (the remaining 64 byte). Spansion supports a 64-byte unique ID set by the factory. For detailed information on the S25FL-K OTP area, please contact Spansion. The Atmel AT25DF is equipped with a set of additional commands in order to manage specific security features. Such functionalities avoid malicious/unwanted erase and programming operations which might alter the content of the memory. AT25DF and S25FL-K supports slightly different protection register settings to protect individual blocks of 64 kB. Table 3.2 OTP and Security Commands Name OTPR November 19, 2010 Description S25FL008K AT25DF081A Comments Erase security registers 44H Program security registers 42H 9BH different commands Read security registers 48H 77H different commands Read Data in the OTP area 4BH Read Sector Protection registers 3CH Supported only by AT25DF Sector lockdown 33H Supported only by AT25DF Freeze Sector Lockdown State 34H Supported only by AT25DF Read Sector Lockdown registers 35H Supported only by AT25DF Migrate_AT25D_to_S25FL-K_01 Supported only by S25FL-K Supported only by S25FL-K 7 A pplication 3.4 Note AT25DQ and S25FL-K Command Set Comparison The Atmel serial flash memory family includes a quad I/O capable 16-Mb device: AT25DQ161. AT25DF and AT25DQ command set and status register are very similar. The AT25DQ161 command set provides a command for enabling quad output/input read/programming modes, similarly to the Spansion device S25FL016K. Furthermore, the AT25DQ provides an additional non-volatile register, called configuration register that contains only a specific activation bit. This is used to enable quad-output/input modes. The S25FL-K supports a similar function accessing the status register bit S9. The additional commands supported by AT25DQ are summarized in Table 3.3. Table 3.3 AT25DQ Specific Additional Commands Name Description S25FL016K AT25DQ161 Comments QOR Quad Output Fast Read 6BH 6BH Supported by both devices QPP Quad Page Programming 32H 32H Supported by both devices Read configuration register 3FH Supported only by AT25DQ Write configuration register 3EH Supported only by AT25DQ 4. Timing Considerations 4.1 Power-Up Timing One of the most sensitive electrical specifications is the power-up timing needed to correctly initialize the device. Table 4.1 and Figure 4.1 show the power-up characteristics of the S25FL-K family. Table 4.1 S25FL-K Power-Up Timing Requirement Parameter 8 Symbol Min VCC(min) to CS# Low tVSL 10 Time Delay Before Write Instruction tPUW Write Inhibit Threshold Voltage VWI Migrate_AT25D_to_S25FL-K_01 Max Unit 1 10 ms 1.0 2.0 V µs November 19, 2010 App l ic atio n No t e Figure 4.1 S25FL-K Power-Up Timing Diagram VCC VCC (max) Program, Erase, and Write instructions are ignored CS# must track VCC VCC (min) t VSL Reset State Read instructions allowed Device is fully accessible VWI t PUW Time On the Atmel side, the parameters of the AT25 family members are more restrictive. In particular, the delay before the system issues the first access (tVCSL) needs to be longer. Table 4.2 AT25 Power-Up Timing Requirements Parameter VCC(min) to CS# Low tVCSL Delay before Program or Erase tPUW Power-On Reset Voltage VPOR Parameter VCC(min) to CS# Low November 19, 2010 AT25DF041A AT25DF081A AT25DF161 AT25DF321A Min Min Min Min Symbol Units Max 70 100 10 1.5 Max 2.2 70 10 1.5 Max 2.5 70 10 1.5 2.5 AT25DF641 AT25DF641A AT25DQ161 Min Min Min Symbol tVCSL Delay before Program or Erase tPUW Power-On Reset Voltage VPOR Max 1.5 µs 10 ms 2.5 V Units Max 50 70 10 1.5 Max 2.5 70 10 1.5 Migrate_AT25D_to_S25FL-K_01 Max 2.5 1.5 µs 10 ms 2.5 V 9 A pplication 5. Note Data In Hold Time Two AC timing parameters that need further attention are Data In Setup Time and Data In Hold Time. They specify how long data needs to be valid before and after the raising edge of the clock signal, respectively. Whereas the characteristics for Data In Setup Time are compatible between the two device families, Spansion parts are less tolerant than Atmel parts regarding Data In Hold Time, so this parameter needs to be checked when migrating from Atmel devices. Table 5.1 S25FL-K Data In Hold Time Requirements Parameter Symbol S25FL04K S25FL08K S25FL16K S25FL32K S25FL64K Units Data In Setup Time (Min) tDVCH/tDSU 2 2 2 1.5 2 ns Data In Hold Time (Min) tCHDX/tDH 5 5 5 4 5 ns Table 5.2 AT25 Data In Hold Time Requirements Symbol AT25DF041A AT25DF081A AT25DF161 AT25DF321A Units Data In Setup Time (Min) Parameter tDS 2 2 2 2 ns Data In Hold Time (Min) tDH 3 1 1 1 ns Parameter 10 Symbol AT25DF641 AT25DF641A AT25DQ161 Units Data In Setup Time (Min) tDS 2 2 2 ns Data In Hold Time (Min) tDH 1 1 1 ns Migrate_AT25D_to_S25FL-K_01 November 19, 2010 App l ic atio n No t e 6. Revision History Section Description Revision 01 (November 19, 2010) Initial release November 19, 2010 Migrate_AT25D_to_S25FL-K_01 11 A pplication Note Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective government entity will be required for export of those products. Trademarks and Notice The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by Spansion. Spansion reserves the right to change or discontinue work on any product without notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright © 2010 Spansion Inc. All rights reserved. Spansion®, the Spansion logo, MirrorBit®, MirrorBit® Eclipse™, ORNAND™, EcoRAM™ and combinations thereof, are trademarks and registered trademarks of Spansion LLC in the United States and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners. 12 Migrate_AT25D_to_S25FL-K_01 November 19, 2010