Datasheet

UNISONIC TECHNOLOGIES CO., LTD
UCD4021B
Preliminary
CMOS IC
CMOS 8-STAGE STATIC
SHIFT REGISTERS
„
DESCRIPTION
The UCD4021B is a 8-stage synchronous parallel or serial
input/serial output registers having common CLOCK and
PARALLEL/SERIAL CONTROL inputs, a SERIAL data input, and
individual parallel inputs to each register stage. Each register is a
D-type, master-slave flip-flop. Q6, Q7, and Q8 are outputs. In
UCD4021B serial entry is synchronous with the clock but parallel
entry is asynchronous.
In UCD4021B serial entry is controlled by the PARALLEL/SERIAL
CONTROL input. When the PARALLEL/SERIAL CONTROL input is
low, data is serially shifted into the 8-stage register synchronously with
the positive transition of the clock line. When the PARALLEL/SERIAL
CONTROL input is high, asynchronous parallel entry is made and the
CLOCK input of the internal stage is isolated.
„
FEATURES
* Up to 20V operation voltage
* 12MHz (Typ.) clock rate at 10V
* Maximum input current of 1μA at 18V
* Fully static operation
* 8 master-slave flip-flops plus output buffering and control gating
„
APPLICATIONS
* General-purpose register
* Parallel input/serial output data queueing
* Parallel to serial data conversion
„
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
UCD4021BL-S16-R
UCD4021BG-S16-R
UCD4021BL-S16-T
UCD4021BG-S16-T
UCD4021BL-P16-R
UCD4021BG-P16-R
UCD4021BL-P16-T
UCD4021BG-P16-T
www.unisonic.com.tw
Copyright © 2013 Unisonic Technologies Co., Ltd
Package
Packing
SOP-16
SOP-16
TSSOP-16
TSSOP-16
Tape Reel
Tube
Tape Reel
Tube
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UCD4021B
„
Preliminary
CMOS IC
PIN CONFIGURATION
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UCD4021B
„
Preliminary
CMOS IC
LOGIC DIAGRAM
CL
CL
p
P
CL
n
P
Q
D
p
CL
=
CL
D
PS
p
p
n
n
CL
PS
„
n
CL
CL
p
Q
CL
p
n
n
CL
CL
TRUE TABLE
CL
SER IN
X
X
X
X
X
X
X
X
PAR SER
CONTROL
1
1
1
1
P1
Pn
0
0
1
1
0
1
0
1
Q1
(INTERNAL)
0
0
1
1
0
0
X
X
0
Qn-1
1
0
X
X
1
Qn-1
X
0
X
X
Q1 (NC)
Qn (NC)
Qn
0
1
0
1
NOTE: X = DON’T CARE CASE, NC = NO CHANGE
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UCD4021B
„
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING (unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VCC
-0.5 ~ 20
V
Input Voltage
VIN
-0.5 ~ VCC + 0.5
V
Output Voltage
VOUT
-0.5 ~ VCC + 0.5
V
Input Clamp Current (VIN<0, or VIN>VCC)
IIK
±10
mA
mW
500
TA=-40°C ~ +100°C
PD
Power Dissipation
mW
TA=+100°C ~ +125°C
200
Storage Temperature
TSTG
-65 ~ +150
°C
Note: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
„
THERMAL DATA
PARAMETER
SOP-16
Junction to Ambient
TSSOP-16
„
SYMBOL
θJA
RATINGS
73
108
UNIT
°C/W
°C/W
RECOMMENDED OPERATING COMDITIONS
PARAMETER
Supply Voltage
SYMBOL
VCC
Clock Pulse Width
tW
Clock Frequency
fCL
Clock Rise and Fall Time
tr, tf
Set-up Time, Serial Input
tS
Set-up Time, Parallel Inputs
Parallel/Serial Pulse Width
Parallel/Serial Removal Time
tW
tREM
CONDITIONS
VCC = 5V
VCC = 10V
VCC = 15V
VCC = 5V
VCC = 10V
VCC = 15V
VCC = 5V
VCC = 10V
VCC = 15V
VCC = 5V
VCC = 10V
VCC = 15V
VCC = 5V
VCC = 10V
VCC = 15V
VCC = 5V
VCC = 10V
VCC = 15V
VCC = 5V
VCC = 10V
VCC = 15V
UNISONIC TECHNOLOGIES CO., LTD
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MIN
3
180
80
50
TYP
MAX
18
ns
3
6
8.5
15
15
15
120
80
60
50
30
20
160
80
50
280
140
100
UNIT
V
MHz
μs
ns
ns
ns
ns
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„
Preliminary
CMOS IC
ELECTRICAL CHARACTERISTICS (TA =25°C , unless otherwise specified)
PARAMETER
SYMBOL
Quiescent Supply Current
IDD
Output Low (Sink) Current
IOL
Output High (Source) Current
IOH
Output Voltage: Low-Level
VOL
Output Voltage: High-Level
VOH
Input Low Voltage
VIL
Input High Voltage
VIH
Input Leakage Current
II(LEAK)
TEST CONDITIONS
VIN=0, 5V, VDD=5V
VIN=0, 10V, VDD= 0V
VIN=0, 15V, VDD=15V
VIN=0, 20V, VDD=20V
VOUT=0.4V, VIN=0, 5V, VDD=5V
VOUT=0.5V, VIN=0, 10V, VDD=10V
VOUT=1.5V, VIN=0, 15V, VDD=15V
VOUT=4.6V, VIN=0, 5V, VDD=5V
VOUT=2.5V, VIN=0, 5V, VDD=5V
VOUT=9.5V, VIN=0, 10V, VDD=10V
VOUT=3.5V, VIN=0, 15V, VDD=15V
VIN=0, 5V, VDD=5V
VIN=0, 10V, VDD=10V
VIN=0, 15V, VDD=15V
VIN=0, 5V, VDD=5V
VIN=0, 10V, VDD=10V
VIN=0, 15V, VDD=15V
VOUT=0.5, 4.5V, VDD=5V
VOUT=1, 9V, VDD=10V
VOUT=1.5, 13.5V, VDD=15V
VOUT=0.5, 4.5V, VDD=5V
VOUT=1, 9V, VDD=10V
VOUT=1.5, 13.5V, VDD=15V
VIN=0, 18 V, VDD=18V
UNISONIC TECHNOLOGIES CO., LTD
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MIN
TYP
0.04
0.04
0.04
0.08
0.51
1
1.3
2.6
3.4
6.8
-0.51 -1
-1.6 -3.2
-1.3 -2.6
-3.4 -6.8
0
0
0
4.95
5
9.95 10
14.95 15
MAX UNIT
5
10
μA
20
100
mA
mA
0.05
0.05
0.05
V
V
1.5
3
4
V
3.5
7
11
V
±10-5 ±0. 1
μA
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Preliminary
CMOS IC
SWITCHING CHARACTERISTICS (TA =25°C, Input tr, tf =20ns, CL =50Pf, RL = 200KΩ)
PARAMETER
SYMBOL
Propagation Delay Time
tPLH / tPHL
Transition Time
tTHL/ tTLH
Maximum Clock Input Frequency
fCL
Minimum Clock Pulse Width
tW
Clock Rise and Fall Time
tr / tf
Minimum Setup Time, Serial Inputs
tS
Minimum Setup Time, Parallel
Inputs
tS
Minimum Setup Time,
Parallel/Serial Control
tS
Minimum Hold Time, Serial In,
Parallel In, Parallel/Serial Control
tH
Minimum P/S Pulse Width
tWH
Minimum P/S Removal Time
tREM
Average Input Capacitance
CI
TEST CONDITIONS
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
VDD=5V
VDD=10V
VDD=15V
Any Input
UNISONIC TECHNOLOGIES CO., LTD
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MIN
3
6
8.5
TYP MAX UNIT
160 320
80
160
ns
60
120
100 200
50
100
ns
40
80
6
12
MHz
17
90
180
40
80
ns
25
50
15
15
μs
15
60
120
40
80
ns
30
60
25
50
15
30
ns
10
20
90
180
40
80
ns
30
60
0
0
ns
0
80
160
40
80
ns
25
50
140 280
70
140
ns
50
100
5
7.5
pF
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„
Preliminary
CMOS IC
TEST CIRCUIT AND WAVEFORMS
TEST
tPLH/tPHL
INPUTS
VIN
VCC
tr, tf
20 ns
S1
GND
VM
VLOAD
CL
RL
VCC/2
VCC
50 pF
200 KΩ
90%
VCC
90%
Input
10%
10%
tr
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tf
0V
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Preliminary
CMOS IC
TEST CIRCUIT AND WAVEFORMS(Cont.)
VIN
Input
VM
VM
0V
t PHL
t PLH
90%
Output
V OH
90%
VM
VM
10%
t PHL
10%
tr
t PLH
tf
90%
90%
Output
VM
VOL
V OH
VM
10%
10%
VOL
tr
tf
Notes: 1. CL includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics: PRR ≤1MHz, ZO = 50Ω.
500uF
CL
CL
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
ID
0.1uF
CL
CK
SER.DATA
(¼ f CK )
DYNAMIC POWER DISSIPATION TEST CIRCUIT
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„
Preliminary
CMOS IC
TEST CIRCUIT AND WAVEFORMS(Cont.)
QUIESCENT DEVICE CURRENT TEST CIRCUIT
INPUT VOLTAGE TEST CIRCUIT
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„
Preliminary
CMOS IC
TEST CIRCUIT AND WAVEFORMS(Cont.)
INPUT CURRENT TEST CIRCUIT
Note:measure inputs sequentially, to both VCC and GND; connect all unused inputs to either VCC or GND.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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