Datasheet

UNISONIC TECHNOLOGIES CO., LTD
U74LCX74
CMOS IC
LOW VOLTAGE DUAL D-TYPE
POSITIVE EDGE-TRIGGERED
FLIP-FLOP WITH 5V TOLERANT
INPUTS

DESCRIPTION
The U74LCX74 is a dual D-type flip-flop with Asynchronous Clear
and Set inputs and complementary (Q, Q ) outputs. Information at the
input is transferred to the outputs on the positive edge of the clock
pulse. After the Clock Pulse input threshold voltage has been passed,
the Data input is locked out and information present will not be
transferred to the outputs until the next rising edge of the Clock Pulse
input.
Asynchronous inputs:
LOW input to S D (Set) sets Q to HIGH level
LOW input to CD (Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on CD and S D makes both Q and Q high

FEATURES
* 2.3V-3.6V VCC specifications provided
* 5V tolerant inputs
* 7.0 ns tPD max (VCC=3.3V), ICC=10μA (max.)
* Power down high impedance inputs and outputs
* ±24mA output drive (VCC=3.0V)

ORDERING INFORMATION
Ordering Number
U74LCX74G-P14-R

Package
TSSOP-14
Packing
Tape Reel
MARKING
www.unisonic.com.tw
Copyright © 2014 Unisonic Technologies Co., Ltd
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U74LCX74
CMOS IC

PIN CONFIGURATION

PIN DESCRIPTIONS
Pin Names
D1, D2
CP1, CP2
C D1 , C D 2
Description
Data inputs
Clock Pulse Inputs
Direct Clear Inputs
S D1 , S D 2
Direct Set Inputs
Q1, Q1 , Q2, Q2
Outputs
FUNCTION TABLE (each gate)

INPUT
OUTPUT
SD
CD
CP
D
Q
Q
L
H
L
H
H
H
L
L
H
H
X
X
X
↑
↑
X
X
X
H
L
H
L
H
H
L
L
H
H
L
H
H
H
L
X
Q0
Q0
Function
Asynchronous Set
Asynchronous Clear
Undetermined
Load and Read Register
Hold
H=High Voltage Level; L=Low Voltage Level;
X=Immaterial; ↑=Low-to-High Clock Transition;
Q0 ( Q0 )=Previous Q( Q ) before Low-to-High Transition of Clock
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U74LCX74

CMOS IC
LOGIC DIAGRAM (positive logic)
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U74LCX74

CMOS IC
ABSOLUTE MAXIMUM RATING (unless otherwise specified)(Note 1)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
VCC
-0.5~7.0
V
Input Voltage
VIN
-0.5~ 7.0
V
Output Voltage
VOUT
-0.5~VCC+0.5
V
Input Diode Current(VI<GND)
IIK
-50
mA
Output Diode Current(VO<GND or VO>VCC)
IOK
±50
mA
Output Current
IOUT
±50
mA
VCC or GND Current
ICC
±100
mA
Ground Current
IGND
±100
mA
Storage Temperature
TSTG
-65 ~ +150
°C
Notes: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

RECOMMENDED OPERATING COMDITIONS
PARAMETER
SYMBOL
VCC
VIN
VOUT
Supply Voltage
Input Voltage
Output Voltage
Input Transition Rise or Fall Rate
∆t/∆v
TA
Operating Temperature

CONDITIONS
Input Edge Rate,
VIN=0.8V-2V, VCC=3v
MIN
2.0
0
0
TYP
MAX
3.6
5.5
VCC
UNIT
V
V
V
0
10
ns/V
-40
+85
°C
MAX
UNIT
STATIC CHARACTERISTICS (TA=-40°C to +85°C, unless otherwise specified)
PARAMETER
SYMBOL
High-level input voltage
VIH
Low-level input voltage
VIL
High-Level Output Voltage
VOH
Low-Level Output Voltage
Input Leakage Current
Quiescent Supply Current
Increase ICC per input
Power-Off Leakage Current
Input Capacitance
Output Capacitance
VOL
II(LEAK)
IQ
∆IQ
IOFF
CIN
COUT
TEST CONDITIONS
MIN
VCC=2.3V to 2.7V
1.7
VCC =2.7V to 3.6V
2.0
VCC=2.3V to 2.7V
VCC =2.7V to 3.6V
VCC=2.3V to 3.6V, IOH=-100μA
VCC-0.2
VCC=2.3V, IOH=-8mA
1.8
VCC=2.7V, IOH=-12mA
2.2
VCC=3V, IOH=-18mA
2.4
VCC=3V, IOH=-24mA
2.2
VCC=2.3V to 3.6V, IOL=100uA
VCC=2.3V, IOL=8mA
VCC=2.7V, IOL=12mA
VCC=3V, IOL=16mA
VCC=3V, IOL=24mA
VCC =2.3V ~ 3.6V, VIN=0 ~ 5.5V
VCC = 2.3V to 3.6V,
VIN= VCC or GND
VCC = 2.3V to 3.6V, 3.6V≤VIN≤5.5V
VCC=2.3V to 3.6V, VIH=VCC-0.6V
VCC=0, VIN or VOUT = 5.5V
VCC=Open, VI=0 or VCC
VCC=3.3V, VI=0 or VCC
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TYP
V
0.7
0.8
V
V
0.2
0.6
0.4
0.4
0.55
±5
10
±10
500
10
7.0
8.0
V
μA
μA
μA
μA
pF
pF
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CMOS IC
DYNAMIC CHARACTERISTICS (Input: tr, tf =3ns, f=1MHz, TA= -40°C to 85°C, RL=500Ω)
PARAMETER
Conditions
VCC=2.5V±0.2V, CL=30pF
Maximum Clock Frequency
fMAX
VCC=2.7V, CL=50pF
VCC=3.3V±0.3V, CL=50pF
VCC=2.5V±0.2V, CL=30pF
Propagation Delay
tPHL/tPLH VCC=2.7V, CL=50pF
CPn to Qn or Qn
VCC=3.3V±0.3V, CL=50pF
VCC=2.5V±0.2V, CL=30pF
Propagation Delay
tPHL/tPLH VCC=2.7V, CL=50pF
CDn or S Dn to Qn or Qn
VCC=3.3V±0.3V, CL=50pF
VCC=2.5V±0.2V, CL=30pF
Setup Time
tS
VCC=2.7V, CL=50pF
VCC=3.3V±0.3V, CL=50pF
VCC=2.5V±0.2V, CL=30pF
Hold Time
tH
VCC=2.7V, CL=50pF
VCC=3.3V±0.3V, CL=50pF
VCC=2.5V±0.2V, CL=30pF
Pulse Width CP
tW
VCC=2.7V, CL=50pF
VCC=3.3V±0.3V, CL=50pF
VCC=2.5V±0.2V, CL=30pF
tW
VCC=2.7V, CL=50pF
Pulse Width and CDn , S Dn
VCC=3.3V±0.3V, CL=50pF
See Fig. 1 and Fig. 2 for test circuit and waveforms.

SYMBOL
MIN
150
150
150
1.5
1.5
1.5
1.5
1.5
1.5
4.0
2.5
2.5
2.0
1.5
1.5
4.0
3.3
3.3
4.0
3.6
3.3
TYP
MIN
TYP
25
MAX
UNIT
MHZ
8.4
8.0
7.0
8.4
8.0
7.0
ns
ns
ns
ns
ns
ns
OPERATING CHARACTERISTICS
PARAMETER
Power Dissipation Capacitance
SYMBOL
TEST CONDITIONS
CPD
VCC=3.3V, VI=0V or VCC, f=10MHz
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MAX
UNIT
pF
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CMOS IC
TEST CIRCUIT AND WAVEFORMS
From Output
CL
RL
TEST CIRCUIT
Note: CL includes probe and jig capacitance.
Fig. 1 Load circuitry for switching times.
VCC
2.5V±0.2V
2.7V
3.3V±0.3V
VM
VCC/2
1.5V
1.5V
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CL
30pF
50pF
50pF
RL
500Ω
500Ω
500Ω
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U74LCX74

CMOS IC
TEST CIRCUIT AND WAVEFORMS(Cont.)
Fig. 2 Propagation delay from input to output and input voltage waveforms.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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