Application guide for USB 3.1

Application guide for USB 3.1
Protected connection for mobile devices
TrEOS Protection – ESD protection without compromise
A new technology delivering the ideal combination of low capacitance, high ESD
robustness and low clamping voltage. Supporting high-speed data lines including
USB3.1 at 10 Gbps. Protecting very sensitive system chips.
Safeguard your system now and in the future with TrEOS Protection devices – from
NXP, the global leader in ESD protection.
More information on the following pages and www.nxp.com/circuit-protection
Introducing USB
The Universal Serial Bus (USB), one of the industry’s
most widely used standard for data transfer
This application guide covers:
Solutions for USB ESD protection (USB 3.1, 2.0,
Supply voltage configuration)
..................................................……................ p 4
ESD protection for the new Type-C connector
..................................................……................ p 8
Optimizing ESD protection for USB 3.1
................................................……................ p 12
Common Mode filters for USB 2.0 and 3.0
................................................……................ p 17
Standard
Name
Introduction year
Max. data rate (Gbps)
Max. data rate (Gbps)
USB 3.1
SuperSpeed USB
10 Gbps
2013
10
Offers up to 10 Gbps on
the same hardware as
USB 3.0
5
Adds two differential line
pairs to USB 2.0 for a
10x speed increase while
keeping connections
backward compatible
0.48
Uses one differential line
pair and is upward
compatible with USB 3.x.
Still, the most widely used
version of USB.
USB 3.0
USB 2.0
SuperSpeed USB
Hi-Speed USB
2008
2000
3
Solutions for USB ESD protection
Package
Size (LxBxH)
6 bidirectional
0.15 15
7
1x
Tx+/-,
Rx+/-,
D +/-
DFN2111-7
2.1 x 1.1 x 0.48
TrEOS Protection: Extremely low
clamping (Rdyn=0.4 Ohm, very
deep snap-back)
PUSB3FR6
6 unidirectional 0.35 15
7
1x
Tx+/-,
Rx+/-,
D +/-
DFN2111-7
2.1 x 1.1 x 0.48
TrEOS Protection: Extremely low
clamping (Rdyn=0.29 Ohm, extremely deep snap-back)
PUSB3FR4
4 unidirectional 0.29 15
7
1x
Tx+/-,
Rx+/-,
D +/-
DFN2510A-10
2.5 x 1.0 x 0.48
TrEOS Protection: Extremely low
clamping (Rdyn=0.27 Ohm, extremely deep snap-back)
PESD5V0C1BSF
1 bidirectional
0.19 20
9
6x
Tx+/-,
Rx+/-,
D +/-
DSN0603-2
0.6 x 0.3 x 0.3
TrEOS Protection: Extremely low
clamping (Rdyn=0.2 Ohm, very
deep snap-back)
PESD5V0C1USF
1 unidirectional 0.35 20
9
6x
Tx+/-,
Rx+/-,
D +/-
DSN0603-2
0.6 x 0.3 x 0.3
TrEOS Protection: Extremely low
clamping (Rdyn=0.09 Ohm, extremely deep snap-back)
PESD5V0H1BSF
1 bidirectional
0.14 15
7
6x
Tx+/-,
Rx+/-,
D +/-
DSN0603-2
0.6 x 0.3 x 0.3
TrEOS Protection: Extremely low
clamping (Rdyn=0.2 Ohm, very
deep snap-back)
PESD5V0R1BSF
1 bidirectional
0.10 10 4.5 6 x
Tx+/-,
Rx+/-,
D +/-
DSN0603-2
0.6 x 0.3 x 0.3
TrEOS Protection: Extremely low
clamping (Rdyn=0.45 Ohm, very
deep snap-back)
Remarks
Needed for one Type-A port
PUSB3AB6
Can be used for
8/20 IPP (A)
USB 2.0 D+/-
ESD ruggedness contact (kV)
USB 3.1 R x
# of protected lines
USB 3.1 T x
Device
USB 3.1 uses the two additional line pairs
associated with USB 3.0, but at double the data
rate of 10 Gbps. To meet the requirements
for signal integrity, the capacitance of ESD
protection devices needs to be even lower.
Capacitance (pF) typ @ 1.5 V
Protecting SuperSpeed USB 3.1
4
Solutions for USB ESD protection
Protecting Hi-Speed USB 2.0
Capacitance (pF)
Needed for one port
Package
Size (LxBxH)
(mm)
VCC
Can be used for
D+
D-
Number of protected
lines
GND
Device
USB 2.0 uses one differential line pair, the
supply voltage, and a GND connection. Both
lines of the differential pair can be protected
by discrete ESD protection diodes or by an
integrated array of protection diodes.
PESD5V0C1USF
1 unidirectional
D+,
D-
0.3
2x
DSN0603-2
0.6 x 0.3 x 0.3
PESD5V0UX1BCAL
1 bidirectional
D+,
D-
1
2x
DFN1006-2
1.0 x 0.6 x 0.37
PESD5V0X1U(A)B
1 unidirectional
D+,
D-
0.95 (1.55)
2x
SOT523
1.0 x 0.6 x 0.48
PESD5V0X2U(A)MB
2 unidirectional
D+,
D-
1
1x
DFN1006-3
1.0 x 0.6 x 0.48
IP4369CX4
2 unidirectional
D+,
D-
0.8
1x
WLCSP4
0.76 x 0.76 x 0.47
PUSB2X4Y
4 unidirectional
D+,
D-
0.8
Covers 2
ports
SOT363
2.0 x 1.25 x 0.95
PUSB2X4D
4 unidirectional
D+,
D-
0.8
Covers 2
ports
SOT457
2.9 x 1.5 x 1.0
5
Solutions for USB ESD protection
VRWM (V)
Package
Size (LxBxH)
(mm)
Please visit www.nxp.com for NXP‘s entire
portfolio of TVS protection devices
PPPM (W) 10/1000
Vbus
Number of lines
The new USB 3.1 standard introduces higher
power options. Power supply capacitors can
be large, to support larger, more robust
diodes. NXP offers a wide portfolio of
power ratings to cover different regional
requirements. NXP recommends protecting
Vbus with dedicated devices.
Series
Protecting the supply voltage
PTVSxZ1USK
1
200
5 to 26
DSN1608-2
1.6 x 0.8 x 0.25
PTVSxU1UPA
1
300
5 to 26
DFN2020-3
2.0 x 2.0 x 0.65
PTVSxS1UR
1
400
3.3 to 64
SOD123W
3.5 x 1.7 x 1.0
PTVSxP1UP
1
600
3.3 to 64
SOD128
4.7 x 2.5 x 1.0
6
Solutions for USB ESD protection
Options for configuring USB 3.1 ESD protection
PUSB3FR6, PUSB3AB6
PUSB3FR4
PUSB2X4x
PUSBMxX4-TL
PESD5V0X2U(A)MB
USB 3.1 ports come always with USB
2.0 lines for downward compatibility
IP3319CX6
To USB controller
+5V
C2
A1
A2
B1
PTVS…
B2
C2
1
C1
IP3319CX6
C1
Micro USB connector
Type B
ESD protection and
Common Mode Filtering
7
ESD protection for the new Type-C connector
The new Type-C connector
…was introduced as a part of the new USB 3.1
specification.
USB Type-C
plug
…will make USB 3.x very attractive for
portable devices:
} V
ery small outline
} C
onnector can be plugged in using either
orientation
} H
igher charging currents possible
} E
liminates the need for a second data
connector
USB Type-C
receptacle
8
Connector
Connector can be
plugged in using either
orientation
Connector
Receptacle
Receptacle
ESD protection for the new Type-C connector
Receptacle front view
9
ESD protection for the new Type-C connector
Recommended devices for different pinout groups (receptacle front view)
Device
Function
# of lines
PUSB3FR4
ESD protection
4
PUSB3FR6
ESD protection
6
PESD5V0H1BSF
ESD protection
1
PESD5V0H1USF
ESD protection
1
PCMF1USB3S
Common Mode Filter + ESD
2
PCMF2USB3S
Common Mode Filter + ESD
4
PCMF3USB3S
Common Mode Filter + ESD
6
PESD2USB3S
ESD protection
2
PESD3USB3S
ESD protection
6
VBUS: PTVS series, see page 6
SuperSpeed
Differential Tx pair
HighSpeed 2 x
Differential pairs
Side-Band Usage (SBU):
Alternate Modes (other standards over USB)
and Audio Adapter Accessory Mode.
SuperSpeed
Differential Rx pair
Communication Channel (CC):
Determination of plug orientation, host-to-device
relationship, set up and manage power options
Device
Function
# of lines
IP4283CZ10-TBR
ESD protection
4
PESD5V0V2BM
ESD protection
2
PESD5V0X2UAM
ESD protection
2
PESD5V0X1BCAL
ESD protection
1
PESD5V0S1USF
ESD protection
1
10
ESD protection for the new Type-C connector
PUSB3FR6 for Type-C connector
PTVS - diode. NXP offers a wide portfolio of Power Ratings
to cover different regional requirements.
To support customers, NXP offers exemplary board layouts
with Gerber files.
The total USB Type-C ecosystem from NXP includes microcontrollers, high speed switches, USB3 redrivers, ESD protection and filtering devices,
USB PD PHY, CC logic controllers, authentication, load switches, AC/DC power solutions, MOSFETs and more. To learn more, please visit
www.nxp.com/usb-type-c.
11
Optimizing ESD protection for USB 3.1:
signal integrity
Eye diagrams
Rectangular differential signals are applied to the Device-Under-Test (DUT)
An overlay of sweeps of different 0-1 and 1-0 transitions is shown in the eye
diagram:
} T
he outgoing signal of a perfect system is rectangular
} D
ue to imperfections and suppression of higher harmonics, the flattened
signal looks like an eye – hence the name of the measurement
} A
mask, that surrounds the eye but is not touched by it, defines the maximum
allowed signal degradation that is acceptable to all receivers
} D
ifferential signals are measured after a comparator
USB 3.1
10 Gbps
USB 3.1
5 Gbps
USB 2.0
12
Optimizing system-level ESD protection for USB 3.1
Protection of the SoC
With system-level ESD protection, the greater part of an
ESD pulse is kept away from the protected System-on-Chip
(SoC) and signal integrity is maintained for all frequencies
used in the application. System-level protection can be
improved by providing fast diode reaction time, low
dynamic resistance, and deep snap-back. An eye diagram
for the highest frequency used by the application will show
the signal integrity also with onboard.
System-level test
} S
tresses the pins with an ESD gun until an increase in leakage
current shows signs of failure which is the most straight forward
way to measure system-level robustness
} I
n NXP tests on commonly available USB applications, the USB
system chip failed but the ESD protection remained undamaged
} S
ystem level protection is achieved by reducing the ESD stress
on the system:
- Deep snap-back
- Low dynamic resistance
- Fast diode switching time
USB connector
Best-in-class protection
diodes absorb as much
of the pulse energy as
possible to protect the SoC
from damage
ESD-protection
USB system chip
13
Optimizing system-level ESD protection for USB 3.1
TLP measurements
Transmission Line Pulse (TLP) measurements
are a way to characterize the I(V) behaviour of
ESD protection devices without overstressing
them. First, a defined transmission-line is
charged. Next, this line is discharged over
the Device Under Test (DUT), which can be
a single component or a complete system.
Current and clamping voltage are recorded,
with a pair of single current (voltage)
measurements forming one point in the TLP
diagram. The leakage current is measured
after each discharge to establish any signs of
damage to the DUT.
The dynamic resistance Rdyn is derived
from the steepness of the TLP graph:
V/ I
For each TLP measurement voltage and
current, samples are averaged over 20 ns
and denoted as a single point in the TLP
graph.
14
Optimizing system-level ESD protection for USB 3.1
Continuous improvements in system protection
Shortest switching time
PUSB3FR4
Other supplier 1
Reduction of the dynamic resistance
6
ITLP (V)
5
PUSB3FR4
4
Other supplier
3
dl
2
dV
1
0
0
Other supplier 2
Other supplier 3
All measurements at 3 A TLP
1
2
3
4
5 VTLP (V) 6
Rdyn=
dV
dI
The lower the dynamic resistance, the better the system protection
15
How to achieve System-Level ESD protection
Protecting the USB 3 interface of an Z77 Motherboard
ICH BD82Z77 protected by
PUSB3FR4.
System survives > 20 A TLP
TLP behaviour of the I/O controller
hub (ICH BD82Z77) without ESD
protection
Destruction level of the
unprotected ICH BD82Z77
Both TLP measurements show that the PUSB3FR4 ESD protection clearly carries the main ESD load above 1A TLP.
16
Common Mode filters for USB 2.0 and USB 3.1
Common Mode filters for USB
Differential mode signals will pass the filter
Common-mode (noise)
S-Parameter S21cc
Differential Mode (signal)
S-Parameter S21dd
0
Common Mode Filter
http://www.nxp.com/documents/
leaflet/939775017547.pdf
Attenuation |S21| (dB)
} Increased
integration, in portable devices,
of different signals in the Gigahertz
range has led to higher demands for EMI
suppression
} NXP
offers a selection of Common Mode
filters with integrated ESD protection
to protect and filter USB 2.0 and 3.0 (in
development) interfaces
} Details
are in our dedicated Application
Guide for Common Mode filters
0.1
Unwanted Common Mode signals will be attenuated
-3 dB
loss
Common-mode
Pass-Band
Differential Mode
Pass-Band
1
10
100
1000
10000
frequency (MHz)
17
Common Mode filters for USB 2.0 and USB 3.1
IP3319CX6 for USB 2.0 OTG (On-The-Go)
Key features:
} C
ommon Mode filter for one differential line
pair
} 3
-line ESD protection for one line pair plus
one pin (ID for OTG)
} B
est Common Mode protection in this
footprint
} B
est-in-class ESD protection due to deep
snap-back and very low Rdyn
} V
ery compact WLCSP6 package :
0.95 x 1.34 x 0.57 mm
IP3319CX6 insertion losses for differential and common modes
αil
(dB)
aaa-006138
0
(1)
-6
-12
(1) Differential mode
(2) Common mode
(2)
(2)
-18
-24
-30
105
106
107
108
109
f (Hz)
1010
Typical IP3319CX6 application using Micro USB connector Type B
To USB controller
+5V
C2
A1
A2
B1
PTVS…
B2
C2
1
C1
IP3319CX6
C1
Micro USB connector
Type B
USB 2.0 eye diagram with IP3319CX6 on test
board
18
Common Mode filters for USB 2.0 and USB 3.1
PCMFxUSB3y for USB 3
Key features:
} C
ommon Mode filter with ESD protection
for one, two, and three differential line-pairs
} E
xtremely wide differential pass band of
7 GHz
} V
ery wideband Common Mode suppression
between 0.7 to 10 GHz
} E
xcellent system-level ESD protection due to
- Very fast ESD diode switching speeds
- Very deep snap-back
- Very low dynamic resistance
0
Differential Passband
-5
-10
Mag S21dd
Mag S21cc
Common-Mode
rejection
-15
-20
-25
-30
-35
-40
-45
1,0E+07
USB 3.1 eye @ 5 Gbps
PCMFxUSB3y
1,0E+08
USB 3.1 eye @ 5 Gbps
test board only
5-Ball CSP, 1 channel
USB 3.1 eye @ 10 Gbps
PCMFxUSB3y
0.8 x 1.2 mm
1,0E+09
frequency (Hz)
10-Ball CSP, 2 channels
15-Ball CSP, 3 channels
1.6 x 1.2 mm
2.4 x 1.2 mm
19
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© 2015 NXP Semiconductors N.V.
All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The
Date of release: July 2015
information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and
Document order number: 9397 750 17625
may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof
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does not convey nor imply any license under patent- or other industrial or intellectual property rights.
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