Using RC Thermal Models

AN11261
Using RC Thermal Models
Rev. 2 — 19 May 2014
Application note
Document information
Info
Content
Keywords
RC thermal, SPICE, Models, Zth, Rth, MOSFET, Power
Abstract
Analysis of the thermal performance of power semiconductors is
necessary to efficiently and safely design any system utilizing such
devices. This article presents a quick and inexpensive way to infer the
thermal performance of power MOSFETs using a thermal electrical
analogy.
AN11261
NXP Semiconductors
Using RC Thermal Models
Revision history
Rev
Date
Description
v.2
20140519
Second issue.
Modifications:
•
v.1
20140129
Figure 7 is updated.
first issue
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
AN11261
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
2 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
1. Introduction
Networks of resistors and capacitors can be used to create a Foster RC thermal model. The model
represents the thermal performance of a MOSFET within a SPICE environment. The article provides
some basic theory behind the principle, and how to implement Foster RC thermal models. For
convenience, Foster RC thermal models are referred to as RC models in the rest of this paper. This
application note describes several methods of using RC thermal models, including worked
examples.
2. Thermal impedance
RC models are derived from the thermal impedance (Zth) of a device (see Figure 1). This
figure represents the thermal behavior of a device under transient power pulses. The Zth
can be generated by measuring the power losses as a result of applying a step function of
varying time periods.
A device subjected to a power pulse of duration > ~ 1 s i.e. steady-state, has reached
thermal equilibrium and the Zth plateaus becomes the Rth. The Zth illustrates the fact that
materials have thermal inertia. Thermal inertia means that temperature does not change
instantaneously. As a result, the device can handle greater power for shorter duration
pulses.
The Zth curves for repetitive pulses with different duty cycles, are also shown in Figure 1.
These curves represent the additional RMS temperature rise due to the dissipation of
RMS power.
To assist this discussion, the thermal resistance junction to mounting base (Rth(j-mb)) from
the BUK7Y7R6-40E data sheet, has been included in Table 1. The Zth in Figure 1 also
belongs to the BUK7Y7R6-40E data sheet.
Table 1.
AN11261
Application note
Steady state thermal impedance of BUK7YR6-40E
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance from junction
to mounting base
see Figure 1
-
-
1.58
K/W
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
3 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
003aai733
10
Zth(j-mb)
(K/W)
1
δ = 0.5
0.2
0.1
10-1
0.02
tp
P
0.05
δ=
single shot
t
tp
10-2
10-6
Fig 1.
T
T
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Transient thermal impedance from junction to mounting base as a function of pulse duration for the
BUK7Y7R6-40E
3. Calculating junction temperature rise
To calculate the temperature rise within the junction of a power MOSFET, the power and
duration of the pulse delivered to the device must be known. If the power pulse is a
square, then the thermal impedance can be read from the Zth chart. The product of this
value with the power gives the temperature rise within the junction.
If constant power is applied to the device, the steady state thermal impedance can be
used i.e. Rth. Again the temperature rise is the product of the power and the Rth.
For a transient pulse e.g. sinusoidal or pulsed, the temperature rise within the MOSFET
junction becomes more difficult to calculate.
The mathematically correct way to calculate Tj is to apply the convolution integral. The
calculation expresses both the power pulse and the Zth curve as functions of time, and
use the convolution integral to produce a temperature profile (see Ref. 2).

d
T j  rise  =  P  t  . Z th   – t  dt
dt
(1)
0
However, this is difficult as the Zth(-t) is not defined mathematically.
An alternative way is to approximate the waveforms into a series of rectangular pulse and
apply superposition (see Ref. 1).
While relatively simple, applying superposition has its disadvantages. The more complex
the waveform, the more superpositions that must be imposed to model the waveform
accurately.
To represent Zth as a function of time, draw upon the thermal electrical analogy and
represent it as a series of RC charging equations or as an RC ladder. Zth can then be
represented in a SPICE environment for ease of calculation of the junction temperature.
AN11261
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
4 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
4. Association between Thermal and Electrical parameters
The thermal electrical analogy is summarized in Table 2. If the thermal resistance and
capacitance of a semiconductor device is known, electrical resistances and capacitances
can represent them respectively. Using current as power, and voltage as the temperature
difference, any thermal network can be handled as an electrical network.
Table 2.
Fundamental parameters
Type
Resistance
Potential
Energy
Capacitance
Electrical
(R = V/I)
R = resistance
(Ohms)
V = PD (Volts)
I = current
(Amps)
C = capacitance (Farads)
Thermal
(Rth= K/W)
Rth = thermal
resistance (K/W)
K = temperature
difference (Kelvin)
W = dissipated Cth = thermal capacitance
power (Watts) (thermal mass)
5. Foster RC thermal models
The RC thermal models discussed are Foster Models. These models are derived by
semi-empirically fitting a curve to the Zth, the result of which is a one-dimensional RC
network (Figure 2). The R and C values in a Foster model do not correspond to
geometrical locations on the physical device. Therefore, these values cannot be
calculated from device material constants as can be in other modeling techniques. Finally,
a Foster RC model cannot be divided or interconnected through, i.e. have the RC network
of a heat sink connected.
R1
R2
Rn
C1
C2
Cn
aaa-010334
Fig 2.
Foster RC thermal models
Foster RC models have the benefit of ease of expression of the thermal impedance Zth as
described at the end of Section 2. For example, by measuring the heating or cooling curve
and generating a Zth curve, Equation 2 can be applied to generate a fitted curve Figure 3:
n
Z th  t  =
 R i
i=1
1 – exp  – ---t-
 
i
Where:  i = R i  C i
(2)
(3)
The model parameters Ri and Ci are the thermal resistances and capacitances that build
up the thermal model depicted in Figure 2. The parameters in the analytical expression
can be optimized until the time response matches the transient system response by
applying a least square fit algorithm. It allows application engineers to perform fast
calculations of the transient response of a package to complex power profiles.
The individual expression, “i”, also draws parallels with the electrical capacitor charging
equation. Figure 3 shows how the individual Ri and Ci combinations, sum to make the Zth
curve.
AN11261
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
5 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
aaa-010335
Zth Curve
overlaid with
summed RC
Zth
RC Model
Zth
RC curves,
representing
RC elements
Time
Fig 3.
Foster RC thermal models
NXP provides Foster RC models for most of their Automotive Power MOSFET products.
The models can be found under the tab “Documentation” >
“BUK7Y7R6-40E_RC_Thermal_Model” as demonstrated in Figure 4.
AN11261
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
6 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
aaa-010336
Fig 4.
AN11261
Application note
NXP RC thermal model documentation
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
7 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
6. Thermal simulation examples
6.1 Example 1
RC thermal models are generated from the Zth curve. This example shows how to work
back from an RC model and plot a Zth curve within a SPICE simulator. It allows for greater
ease when trying to read values of the Zth curve from the data sheet.
This and subsequent examples use the RC thermal model of BUK7Y7R6-40E. Tmb
represents the mounting base temperature. It is treated as an isothermal and for this
example it is set as 0 C. A single shot pulse of 1 W power is dissipated in the MOSFET.
Referring to Figure 5; for a single shot pulse, the time period between pulses is infinite
and therefore the duty cycle  = 0. Then the junction temperature Tj represents the
transient thermal impedance Zth.
P
t
tp
T
aaa-010337
Fig 5.
Single-shot pulse
Equation 4 and Equation 5 demonstrate why Tj is used to represent the transient thermal
impedance Zth in this simulation.
Tmb = 0 C
P=1W
T j = T mb + T = 0 C + T = T
(4)
T = P Z th = 1 W Z th
(5)
Equation 5 demonstrates that with P = 1 W, the magnitude of Zth equates to T.
The following steps are used to set up and run simulations:
1. set up the RC thermal model of BUK7Y7R6-40E in SPICE as shown in Figure 6
2. set the value of voltage source Vmb to 0, which is the value of Tmb
3. set the value of the current source I1 to 1
4. create a simulation profile and set the run time to 1 s
5. run the simulation
6. Plot the voltage at node Tj
AN11261
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
8 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
BUK7Y7R6-40E
1
Tj
C1
2.916343E - 05
R1
2.748817E - 03
C2
1.725521E - 04
R2
5.715661E - 03
C3
2.092143E - 04
R3
4.153561E - 02
C4
1.786133E - 03
R4
5.616478E - 02
C5
2.129755E - 03
R5
0.3286516
C6
8.451135E - 03
R6
1.016057
C7
0.0863404
R7
0.130071
I1
vmb
.tran 1 uic
0
aaa-010338
Fig 6.
BUK7Y7R6-40E Thermal Model setup in SPICE
The simulation result in Figure 7 shows the junction temperature (voltage at Tj) which is
also the thermal impedance of BUK7Y7R6-40E. The values of Zth at different times can be
read using the cursors on this plot within SPICE.
aaa-010339
10
Temperature
(°C)
1
10-1
10-2
10-3
100 ns
Fig 7.
AN11261
Application note
1 μs
10 μs
100 μs
1 ms
10 ms
100 ms
1s
Time (seconds)
A plot of Tj from after simulation
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
9 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
The value of the current source in this example is set to 1 A to represent 1 W dissipating
through the device. It can be easily changed to represent any value of power. The
simulation command can be changed for any duration to represent a range of square
power pulses.
6.2 Example 2
Another method of generating the power profile, is to use measurements from the actual
circuit. This information is presented to the SPICE simulation in the form of a
comma-separated value (CSV) file giving pairs of time/power values. It can be generated
either as a summary of observations showing the points of change or from an oscilloscope
waveform capture.
Two further methods of generating a power profile are discussed. One method is using a
PWL file. The other is to generate the power from an MOSFET electrical circuit modeled
in SPICE. The former is outlined first.
A source within a SPICE simulator can use a PWL file as an input. The contents of a
typical PWL file is shown in Table 3 It can list the current, voltage or in this example,
power over time. These files can be generated by typing values into a spreadsheet editor
and saving as a .csv file, or alternatively exporting waveforms from an oscilloscope. The
actual file itself should not contain any column headings.
To implement this procedure within a SPICE environment, follow the same steps as
described in Section 6.1 “Example 1”, but with the exceptions:
1) Set the property value of the current source to read from a PWL FILE and point it to a
.csv file for example: C:\Pulse file\filepulse.csv, which contains the power profile listed in
Table 3.
2) Set the mounting base Tmb (Vmb) to 125.
3) Set the simulation run time to 3.5 s
Table 3.
Data example for use in a PWL file
Time (seconds)
AN11261
Application note
Power (Watts)
0
0
0.000001
30
0.015
30
0.015000001
6
1.1
6
1.100001
6
1.100002
20
1.5
20
1.500002
20
1.500003
0
1.6
0
1.600001
20
1.615
20
1.615001
6
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
10 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
Table 3.
Data example for use in a PWL file …continued
Time (seconds)
Power (Watts)
2.9
6
2.900001
0
3
0
3.000001
30
3.015
30
3.015001
6
The simulation result is shown in Figure 9. The junction temperature and thermal
impedance values labeled in Figure 9, demonstrate that the Zth value at 3 ms, and Rth
value, are in line with Figure 10. It represents the thermal impedance waveform shown in
the BUK7Y7R6-40E data sheet.
BUK7Y7R6-40E
PWL file = power.csv
Tj
C1
2.916343E - 05
R1
2.748817E - 03
C2
1.725521E - 04
R2
5.715661E - 03
C3
2.092143E - 04
R3
4.153561E - 02
C4
1.786133E - 03
R4
5.616478E - 02
C5
2.129755E - 03
R5
0.3286516
C6
8.451135E - 03
R6
1.016057
C7
0.0863404
R7
0.130071
I1
vmb
.tran 3.5 uic
125
aaa-010340
Fig 8.
AN11261
Application note
SPICE circuit implementing a PWL file with the thermal model of the
BUK7Y7R6-40E
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
11 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
40
170
Power
(W)
Tj
(°C)
150
30
Rth = 1.58 K/W
20
130
Tj (°C)
Power (W)
110
90
0.0
0.5
1.0
1.5
2.0
2.5
10
3.0
Time (s)
0
3.5
150
40
Tj
(°C)
Power
(W)
Zth = 0.76 K/W
145
30
Tj (°C)
Power (W)
140
20
135
10
0
130
0
2.5
5.0
7.5
10
Time (ms)
Fig 9.
AN11261
Application note
aaa-010341
a. simulation results: b. reduced time axis of (a) showing the first power pulse
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
12 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
aaa-010342
10
Zth(j-mb)
(K/W)
Rth = 1.58 K/W
1
δ = 0.5
Zth = 0.76 K/W
0.2
0.1
10-1
tp
P
0.05
δ=
T
0.02
single shot
t
tp
10-2
10-6
T
10-5
10-4
10-3
t = 3 ms
10-2
10-1
tp (s)
1
The red lines highlight the thermal resistance and impedance for the example shown in Figure 9
Fig 10. Transient thermal impedance for BUK7Y7R6-40E
6.3 Example 3
The aim of this example is to show how to perform thermal simulation using the power
profile generated from a MOSFET circuit.
Following the steps in Section 6.1, set up the thermal model of BUK7Y7R6-40E, and set
the mounting base temperature to 85C.
To set the power value in the current source, construct a MOSFET electrical circuit as
provided in Figure 11. The power supply is 14 V and the load is a 0.1  resistance. The
gate drive supply is assigned a value of 10 V. It is set to run for 50 cycles with a 1 ms
period and a 50 % duty cycle.
The power dissipated in the MOSFET can be calculated from Equation 6 or for greater
accuracy; the gate current can be included into the calculation to give Equation 7:
P = V ds  I d
(6)
To improve accuracy:
P = V ds  I d + V gs  I g
(7)
The current source into the thermal model can now be defined as:
I = V d   I  Vd  + V  g   I  Vg 
(8)
Figure 11 demonstrates the link between the electrical circuit and the thermal model
circuit.
AN11261
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
13 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
BUK7Y7R6-40E
Tj
B1
C1
2.916343E - 05
R1
2.748817E - 03
C2
1.725521E - 04
R2
5.715661E - 03
C3
2.092143E - 04
R3
4.153561E - 02
C4
1.786133E - 03
R4
5.616478E - 02
C5
2.129755E - 03
R5
0.3286516
C6
8.451135E - 03
R6
1.016057
C7
0.0863404
R7
0.130071
I = V(d)*I(Vd)+V(g)*I(Vg)
.INC BUK7Y7R6-40E.LIB
.tran 50m uic
R8
0.1
V2
Vd
14 V
0
Vg
0
d
Rg
M1
g
10
s
BUK7Y7R6-40E
pulse
vmb
PULSE (0 10 0 1u 1u .25m 1.0 m 50)
85
aaa-010343
Fig 11. SPICE circuit illustrating how to integrate an electrical circuit with a thermal
model
The resultant plot of Tj is shown in Figure 12. The maximum temperature of the junction
can once again be calculated from data sheet values by following the steps outlined in
Ref. 1.
AN11261
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
14 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
aaa-010344
180
T
(°C)
160
Tj (°C)
140
120
100
80
60
40
20
0
0
10
20
30
40
50
Time (ms)
Fig 12. Inferred junction temperature (Tj) rise, provided by the circuit in Figure 11
AN11261
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
15 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
7. Discussions
RC thermal models are not perfect. The physical materials used to build Semiconductors
have temperature-dependent characteristics. These characteristics mean that thermal
resistance is also a temperature-dependent parameter. Whereas in ohm’s law, the ohmic
resistance is constant and independent of the voltage. So the correspondence between
electrical and thermal parameters is not perfectly symmetrical but gives a good basis for
fundamental thermal simulations.
In power electronic systems, the thermal resistance of silicon amounts to 2 % to 5 % of the
total resistance. The error resulting from the temperature dependence is relatively small
and can be ignored for most cases. To obtain a more accurate analysis, replace the
passive resistors in the RC model with voltage-dependent resistors. In these resistors, the
change in temperature can correspond to change in voltage.
A further limitation of the models presented is that the mounting base temperature of the
MOSFET Tmb, is set as an isothermal. This is rarely the case in real applications where a
rise in the mounting base temperature must be considered. This rise is determined by
calculating the temperature rise due to the average power dissipation (i.e. the heat flow)
from the mounting base through to ambient. It means that the models are of limited use for
pulses greater than 1 s, where heat begins to flow into the environment of the MOSFET. In
this situation, the thermal model for the MOSFETs, PCB, heat sink and other materials in
proximity must be included. However these components cannot be connected to the
Foster RC models.
8. Summary
RC thermal models are available for NXP power MOSFETs on the NXP website. The
models can be used in SPICE or other simulation tools to simulate the junction
temperature rise in transient conditions. They provide a quick, simple and accurate
method for application engineers to perform the thermal design.
AN11261
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
16 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
9. Abbreviations
Table 4.
Key to symbols used in equations
Symbol
Description
P(t)
power as a function of time
Zth(t)
transient thermal impedance
Rth
thermal resistance

total time of heating pulse
i
thermal time constant
Ri
constituent thermal resistance element
Ci
constituent thermal capacitance element
Tmb
mounting base temperature of the MOSFET
Tj
junction temperature of the MOSFET
Tj(rise)
junction temperature rise in the MOSFET
T
change in temperature
Vds
drain to source voltage of the MOSFET
Vgs
gate to source voltage of the MOSFET
Id
drain current
10. References
AN11261
Application note
[1]
Application note AN11156 - “Using Power MOSFET Zth Curves”. NXP
Semiconductors
[2]
Application note AN10273 - “Power MOSFET single-shot and repetitive avalanche
ruggedness rating”. NXP Semiconductors
[3]
Combination of Thermal Subsystems Modeled by Rapid Circuit Transformation. Y.C.
Gerstenmaier, W. Kiffe, and G. Wachutka
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
17 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
11. Legal information
11.1
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
11.2
Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
AN11261
Application note
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Evaluation products — This product is provided on an “as is” and “with all
faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates
and their suppliers expressly disclaim all warranties, whether express, implied
or statutory, including but not limited to the implied warranties of
non-infringement, merchantability and fitness for a particular purpose. The
entire risk as to the quality, or arising out of the use or performance, of this
product remains with customer.
In no event shall NXP Semiconductors, its affiliates or their suppliers be liable
to customer for any special, indirect, consequential, punitive or incidental
damages (including without limitation damages for loss of business, business
interruption, loss of use, loss of data or information, and the like) arising out
the use of or inability to use the product, whether or not based on tort
(including negligence), strict liability, breach of contract, breach of warranty or
any other theory, even if advised of the possibility of such damages.
Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
all direct or general damages), the entire liability of NXP Semiconductors, its
affiliates and their suppliers and customer’s exclusive remedy for all of the
foregoing shall be limited to actual damages incurred by customer based on
reasonable reliance up to the greater of the amount actually paid by customer
for the product or five dollars (US$5.00). The foregoing limitations, exclusions
and disclaimers shall apply to the maximum extent permitted by applicable
law, even if any remedy fails of its essential purpose.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
11.3
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 May 2014
© NXP B.V. 2014. All rights reserved.
18 of 19
AN11261
NXP Semiconductors
Using RC Thermal Models
12. Contents
1
2
3
4
5
6
6.1
6.2
6.3
7
8
9
10
11
11.1
11.2
11.3
12
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal impedance . . . . . . . . . . . . . . . . . . . . . . 3
Calculating junction temperature rise . . . . . . . 4
Association between Thermal and Electrical
parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Foster RC thermal models . . . . . . . . . . . . . . . . 5
Thermal simulation examples. . . . . . . . . . . . . . 8
Example 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Example 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Example 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Discussions . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2014.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 19 May 2014
Document identifier: AN11261