Aug 2002 Boost DC/DC Converter Synchronizes to any Frequency

DESIGN IDEAS
Boost DC/DC Converter Synchronizes
to any Frequency
by Gary Shockey
Power supplies that employ switching regulators often require tight
control over the oscillator switching
frequency, mainly in an effort to control high frequency noise that can
interfere with sensitive circuitry. The
LT1310 switching regulator can be
synchronized to an external frequency, thus containing noise to
well-defined frequency bands, which
can be easily filtered.
The LT1310 combines a 1.5A Boost
PWM DC/DC converter with an integrated phase-locked loop, which can
be synchronized to any frequency
between 10kHz and 4.5MHz. Figure 1
shows an application that converts
5V to 12V with an externally controlled switching frequency of 1.6MHz.
To synchronize to an external input
signal, the timing capacitor and PLL
filter components must be chosen
properly. This is a simple process and
can be done using the graph in
Figure␣ 2.
In Figure 2, operating frequency is
plotted versus timing capacitor (CT)
with the upper and lower lines corresponding to the minimum and
maximum lock frequency given a specific CT value. To choose the right
timing capacitor, find the intersection of the desired operating frequency
and the dashed line. Then move to the
corresponding CT value.
VIN
5V
L1
5.6µH
C1
4.7µF
CERAMIC
LT1310
VIN
SHUTDOWN
SHDN
SYNC
SYNC
FB
R2
20.5k
CT
VC
GND
C2
4.7µF
CERAMIC
CT
100pF
NP0
R3
15k
C3
820pF
R4
3.01k
C4
1500pF
VOUT
12V
400mA
R1
178k
SW
PLL-LPF
1.6MHz
D1
1310 F01a
C1, C2: TAIYO YUDEN EMK316BJ475ML
C3: AVX 06033A821
C4: AVX 06031C152
C5: AVX 06035A820
D1: MOTOROLA MBRM120
L1: PANASONIC ELL6RH6R2M
(408) 573-4150
(843) 946-0362
(800) 441-2447
(714) 373-7334
Figure 1. 5V to 12V converter synchronized at 1.6MHz
Alternately, use the following equations as a starting point:
for fLOCK ≥ 2MHz:
 250 × 10–6

C T = 0.75 
– 40 × 10–12 
f
 LOCK

for fLOCK ≤ 2MHz:
 310 × 10–6

C T = 0.75 
– 60 × 10–12 
f
 LOCK

Because the lock range for the PLL
is nearly 2:1, the nearest standard
value NP0 capacitor can be used. For
the application shown in Figure 1, a
1.6MHz switching frequency corresponds to an 100pF timing capacitor.
Figure 3 shows the input frequency
being stepped from 1.2MHz to 1.9MHz
with the PLL regaining lock in approximately 50µs. Since the switching
frequency affects inductor ripple current, the inductor must also be scaled.
Table 1 shows recommended component values for various switching
frequencies.
VOUT
30mV/
DIV
IL
200mA/
DIV
1.9MHz
1.2MHz
50µs/DIV
Figure 3. Phase-locked loop response
100k
Table 1: Recommended component values for various switching frequencies (R4 = 3.01k)
CT VALUE (pF)
10k
MAXIMUM
LOCK
FREQUECY
Switching Frequency
1k
MINIMUM
LOCK
FREQUECY
100
10
10k
1M
100k
FREQUENCY (Hz)
10M
CT
C3
C4
R3
L1
600kHz
330pF
1500pF
2700pF
10k
10µH
1MHz
180pF
1000pF
2200pF
10k
6.2µH
1.6MHz
100pF
820pF
1500pF
15k
5.6µH
2MHz
68pF
820pF
1500pF
15k
4.7µH
2.5MHz
47pF
330pF
1500pF
20k
3.3µH
3MHz
33pF
330pF
1000pF
20k
2.7µH
Figure 2. CT vs operating frequency
30
Linear Technology Magazine • August 2002
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