DESIGN FEATURES High Speed Low Noise Op Amp Family Challenges Power and Distortion Assumptions with Rail-to-Rail Inputs and Output by John Wright and Glen Brisbois Do the Math The tradeoff is all too familiar; low noise op amps dissipate high power. The 1.9nV/√Hz LT6202, however, doesn’t follow this rule. It provides rail-to-rail input and output operation (meaning that maximum dynamic range can now be extracted on low supply voltages) with a supply current of only 2.5mA. The LT6200 offers even lower noise (0.95nV/√Hz) and distortion, and it includes a shutdown feature for standby conditions. These unity gain stable amplifiers are well suited to fast low noise applications because of their respective 100MHz and 165MHz gain bandwidth, low distortion, guaranteed noise specifications, and low offset voltage. The amplifiers operate on a total supply voltage of 2.5V to 12.6V, and are fabricated on Linear Technology’s high speed complimentary bipolar process. All are specified with 3V, 5V, and ±5V supplies. The single LT6202, dual LT6203 and quad LT6204 are identical except in the number of op amps; likewise for the single LT6200 and dual LT6201. The product of noise voltage and square root of supply current, en • √Isupply, is a useful way to gauge the performance of fast low noise amplifiers. Amplifiers with low en have high √ISUPPLY, and in applications that require low noise with the lowest possible supply current, this calculation proves to be enlightening. For example, the LT6202 has an en • √ISUPPLY product of 3nV√mA/Hz, while the LT6200 en • √ISUPPLY product is only 3.9nV√mA/Hz. It is common to see similar amplifiers with much worse e n • √ I SUPPLY products of 4.1 to 13.2nV√mA/Hz. An important consideration in applying the LT6200 is that noise of 0.95nV/√Hz is equivalent to the thermal noise of a 56Ω resistor. If the total source resistance exceeds this value, the source resistance dominates the noise of the circuit; not the noise of the LT6200. Figure 1 illustrates this effect by showing the total amplifier noise vs unbalanced source resistance. At low source resistance the total noise is dominated by the amplifier’s noise voltage. When source resistance is between 56Ω and approximately 1.5kΩ, the noise is dominated by the resistor thermal noise. At high source resistance the total noise is set by the product of the amplifier noise current and the source resistance. In the case of the LT6202, also shown in Figure 1, the source resistance conditions are less severe. The noise of 1.9nV/√Hz corresponds to the thermal noise of a 230Ω resistor. In the region between 230Ω and approximately 20kΩ the noise is dominated by the resistor thermal TOTAL NOISE VOLTAGE (nV/√Hz) 100 VS = ±5V VCM = 0V f = 100kHz Unbalanced RS 10 LT6202 TOTAL NOISE LT6200 TOTAL NOISE RESISTOR NOISE 1 LT6200 AMPLIFIER LT6202 AMPLIFIER NOISE VOLTAGE NOISE VOLTAGE 0.1 10 100 1k 10k SOURCE RESISTANCE (Ω) 100k Figure 1. LT6200 and LT6202 total noise vs source resistance 12 noise. Beyond this resistance the noise is set by the amplifier noise current. Below 500Ω of unbalanced source resistance, the LT6200 has lower total noise; above 500Ω, the LT6202 has lower total noise. Low Noise and Low Distortion Design An important rule of low noise bipolar amplifier design is that transistor noise voltage is proportional to the square root of the intrinsic base resistance rb, and inversely proportional to the square root of the transistor operating current. This means that for low noise voltage the input transistors need to be physically large to reduce the rb, and need to operate at high collector currents. In other words, halving the noise of the LT6202 requires input transistors four times larger operating at a minimum of four times the quiescent current, and this is exactly how the ultra low noise LT6200 was created. Additional current in the output stage is required to reduce the LT6200 distortion, shown in Figure 2, to an impressive –85dBc –50 VS = ±5V VO = 2VP–P AV = 1 –60 DISTORTION (dBc) Introduction HD3 RL = 100Ω –70 HD2 RL = 100Ω –80 HD2 RL = 1k –90 HD3 RL = 1k –100 0.1 1 FREQUENCY (MHz) 10 Figure 2. LT6200 distortion vs frequency Linear Technology Magazine • August 2002 DESIGN FEATURES + R1 R2 I1 – the LT6202 offset voltage shifts by about 500µV, the gain bandwidth drops to 50MHz, and the noise voltage has the spectrum shown in Figure 4. The inputs can common mode to either rail, but as a practical matter for measuring noise the inputs must be taken a few hundred millivolts from the rails. The PNP stage alone has lower noise than the NPN stage alone, and this is attributed to lower rb of the PNP transistors. V+ VBIAS Q11 +V –V Q5 DESD1 Q6 DESD2 + Q2 D1 D2 +V Q3 Q1 C1 CM +V Q4 – DESD3 DESD4 –V DESD5 DIFFERENTIAL DRIVE GENERATOR Q9 DESD6 Q7 Q8 +V Q10 –V R3 R4 I2 What about the ACs? R5 Capacitor C1 is used to reduce the input gm versus frequency to avoid excess phase shift through the current mirror Q7 and Q8. This capacitor provides a single high frequency path to the collectors of Q6 and Q7. The compensation capacitor CM produces a single pole open loop response, and lowers the AC output impedance. There is a tradeoff between noise and slew rate in high speed amplifiers. The commonly used technique to obtain high slew rates is to reduce the input stage gm by using input degeneration resistors, allowing for a proportional reduction in the compensation capacitor. Although this technique maintains the same gain bandwidth and yields a direct improvement in slew rate, it also causes a large degradation in the noise performance. For this reason, this family uses no input gm reduction, favoring low noise over high slew rate. The slew rate and gain bandwidth could D3 V– Figure 3. LT6200-4 simplified schematic HD2, and –95dBc HD3 at 1MHz with RL = 100Ω. To see how these principles are applied, Figure 3 shows two parallel input stages of the op amps. This topology accomplishes several difficult tasks. First, PNP and NPN transistors in parallel reduce the effective rb by a factor of 2 and the noise voltage by the √2. Second, the input stage can common mode from the positive supply to the negative supply. The trade off between low noise design and rail-to-rail input operation is evident in that higher collector current in Q1, Q2, Q3 and Q4 means lower noise voltage, but it also means a larger voltage drop across the collector loads R1, R2, R3 and R4, and less common mode range due to satu- ration of the input transistors. The input referred noise benefits further from high current in the second stage Q5, Q6, Q7 and Q8, but unfortunately this current further reduces the common mode range of the input stage. The saturation of the input transistors places an upper limit on operating currents and therefore amplifier noise. When the common mode voltage is in the middle of its range, the input stage transconductance is set by both input pairs. As the common mode voltage approaches either supply, the positive rail for instance, I1 saturates and Q1 and Q4 cutoff. At this point the input gm is reduced by half and is now set by Q2 and Q3 operating currents. With half the input stage gm, – 2k 1/2 LT1739 45 + NOISE VOLTAGE (nV/√Hz) 40 VCM = 0.5V PNPs ON 35 1k 49.9Ω VS = 5V, 0V TA = 25V RS = 0W – 1/2 LT6203 1:1 30 VCM = 4.5V NPNs ON 25 VD LINE DRIVER 20 VL 100Ω LINE • + • VR LINE RECEIVER + 15 1/2 LT6203 10 5 0 1k VCM = 0V NPNs & PNPs ON 10 100 1k 10k FREQUENCY (Hz) + 100k Figure 4. LT6202 noise voltage vs frequency Linear Technology Magazine • August 2002 1/2 LT1739 – – 49.9Ω 1k 1k 2k Figure 5. Low noise 4- to 2-wire local echo cancellation differential recieiver 13 DESIGN FEATURES Applications 5.0 4.5 Low Noise 4-Wire to 2-Wire Local Echo Cancellation Differential Receiver INTEGRATED NOISE (µVRMS) also have been increased by reducing the compensation capacitor, resulting in the amplifier being stable only at closed loop gains >1. One reason, however, for making the amplifiers unity gain stable is to allow the closed loop gain to be rolled off with a feedback capacitor to further reduce the noise by limiting the bandwidth. The LT6202 can drive capacitive loads as high as 100pF, while the faster LT6200 can drive 30pF. Table 1 shows a performance summary for both families. Figure 5 shows a low noise 4-wire to 2-wire local echo cancellation differential receiver. With the LT1739 drivers in shutdown, the resulting noise is that of the LT6203 alone. The total integrated noise of the differential receiver is shown in Figure 6 from 25kHz to 150kHz. 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 20 40 60 80 100 120 140 160 BANDWIDTH (kHz) Figure 6. Line receiver integrated noise 25kHz to 150kHz Table 1. LT6203/LT6204 Performance: TA = 25°C, VS = 5V, 0V unless otherwise specified. LT6200/LT6201 Parameter Offset Voltage Conditions Min Typ Max VCM = VS/2 100 VCM = V+ to V– Typ Max Units 1000 100 500 µV 0.6 2.0 0.8 2.0 mV 10 40 1.3 7.0 µA f = 10kHz, VS = ±5V 1.4 2.3 2.8 4.5 nV/√Hz f = 100kHz, VS = ±5V 0.95 1.9 nV/√Hz Balanced RS 2.2 0.75 pA/√Hz Unbalanced RS 3.5 1.1 pA/√Hz Input Bias Current Noise Voltage Noise Current Large Signal Gain Common Mode Rejection Ratio LT6202/LT6203/LT6204 f = 10kHz Min VO = 0.5V to 4.5V, RL=1k to VS/2 40 70 70 120 V/mV VO = 1V to 4V, RL=100Ω to VS/2 11 18 8 14 V/mV VCM = V+ to V– 65 90 60 83 dB VOUT Low ISINK = 20mA 150 290 240 460 mV VOUT High ISOURCE = 20mA 220 400 325 600 mV Supply Current Per amplifier 16.5 19 2.5 3 mA Disabled Supply Current VSHDN = 0.3V 1.3 1.8 NA mA Gain Bandwidth Product VS = –5V, f = 1MHz 165 100 MHz 35 V/µs Slew Rate Distortion 14 AV = –1, RL=1kΩ, VO = 4V AV = 1, 1MHz, VO = 2VP–P 35 50 17 HD2, RL= 100Ω –85 dBc HD3, RL= 100Ω –95 dBc HD2, RL= 1k –81 dBc HD3, RL= 1k –81 dBc Linear Technology Magazine • August 2002 DESIGN FEATURES CF 5V Single Supply, 1.5nV/√Hz, Photodiode Amplifier Figure 7 shows a simple, fast, low noise photodiode amplifier. Feedback forces the BF862 JFET source to 2.5V, which causes the drain current to be 2.5mA. At this current, the VGS of the JFET is about –0.5V, so the gate and output voltage both sit at about 2V DC and the photodiode sees 2V of reverse bias. Under illumination, the gate stays at constant DC voltage while the op amp output rises by IPD • RF, giving the transfer function VOUT = 2V + IPD • RF. Amplifier input noise density and gain-bandwidth product were measured to be 1.5nV/√Hz and 157MHz, respectively, while consuming only 100mW. The reason the 165MHz gain bandwidth product of the LT6200 is not severely compromised by this composite circuit is that the JFET has a high gm, approximately 1/50Ω, and looks into 1kΩ so loop attenuation is only 5%. Total circuit input capacitance including board parasitics was measured to be 3.2pF. This is less than the specified CGS of the JFET, because the JFET source is not grounded but rather looks into R3 and the high impedance op amp input. This fact combined with the low input voltage noise makes the circuit well suited to both large and small photodetectors. The unity-gain sta- IPD PHILIPS BF862 PHOTO DIODE R1 10k R3 1k RF – + VOUT ≈ 2V +IPD • RF LT6200 (MAY GROUND OR TAKE TO NEGATIVE VDC) R2 10k 0.1µF Figure 7. Single supply, 1.5nV/√Hz, photodiode amplifier bility and ultralow bias current of the circuit means that the transimpedance gain, set by RF, can be any value from 10Ω to 10GΩ. The circuit was tested using a small 2.5pF Advanced Photonix avalanche photodiode #012-70-62-541 reverse biased to –180V, and a 210kΩ feedback resistor RF. This photodiode was selected for its speed, so that its inherent response would not impact Available Packages LT6200: SOT-23-6 LT6201: SO-8 LT6202: SOT-23-5 LT6203: SO-8 LT6204: SO-14 SO-8 MSOP-8 SO-8 MSOP-8 SSOP-16 the circuit bandwidth measurement. With feedback capacitance adjusted for 4% overshoot, closed loop bandwidth was measured to be 4.5MHz. This is in good agreement with theory given the ~5.7pF total input C and the 210kΩ transimpedance gain: 5.7pF is 6.2kΩ at 4.5MHz, for a noise gain of 210k/6.2k = 35, and a GBW product of 35 • 4.5MHz = 157MHz. Conclusion Linear Technology’s new family of low noise op amps operate rail-to-rail input and output while maintaining a light appetite for supply current. This combination is accomplished without sacrificing AC or DC performance. The family is available in singles, duals and quads and in a wide variety of packages. LTC4255, continued from page 11 the disconnect timer runs out, the port power is turned off and the corresponding status bit is set. The LTC4255 monitors the DC component of the Power Maintenance Signature only; additional circuitry is needed to monitor the AC component of the signature if required by the application. Conclusion The LTC4255 provides complete power control circuitry to switch 48V onto Ethernet wires, greatly simplifying the design of the power path of PSE devices. An LTC4255, together with a standard quad PHY chip, a detection/classification circuit, and a handful of external components make four complete powered Ethernet ports. Fault protection, startup control, and disconnect sensing are all performed by the LTC4255, minimizing external circuitry. The I2C interface simplifies monitoring and control of the LTC4255 by a host system. Part 2 of this series will cover the details of PD design and show how to put together the power receiving end of the link. Notes 1 The 802.3af standard is still in draft form, and parts of the standard are still in flux. No product can yet claim full compliance, but compatible products are already available in advance of the final standard. For the latest information on the state of the 802.3af standard or on LTC products designed to meet the standard, contact the LTC Applications department. For more information on parts featured in this issue, see http://www.linear.com/go/ltmag Linear Technology Magazine • August 2002 15