Datasheet ULPPO 32.768 kHz

PETERMANN-TECHNIK GmbH
Lechwiesenstr. 13 ∙ D-86899 ∙ Landsberg am Lech
Tel: +49/8191/305395 ∙ Fax: +49/8191/305397
[email protected] ∙ www.petermann-technik.com
ULTRA-LOW POWER HIGH PRECISION OSCILLATOR
SERIES „ULPPO“
32.768 kHz
FEATURES
APPLICATIONS
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100% pin-to-pin drop-in replacement to quartz-based XO
Ultra Low Power High Precision Oscillator for Low Cost
Excellent long time reliability—outperforms quartz-based XO
32.768 kHz ±5, ±10, ±20 ppm frequency stability options
World’s smallest high precision 32.768 kHz Oscillator
in a 1.5 x 0.8 mm housing
Ultra-low power: <1 µA
VDD supply range: 1.5V to 3.63V
Improved stability reduces system power
Internal filtering eliminates external VDD bypass cap and saves space
Programmable output swing for lowest power
Pb-free, RoHS and REACH compliant / [email protected]°
Smart Phones
Tablets
Health and Wellness Monitors
Fitness Watches
Sport Video Cams
Wireless Keypads
Ultra-Small Notebook PC
Pulse-per-Second (pps) Timekeeping
RTC Reference Clock
Battery Management Timekeeping
Wearables
IoT
GPS
Smart Metering
Home Automation
GENERAL DATA
PARAMETER AND CONDITIONS
SYMBOL
MIN.
TYP.
MAX.
UNIT
CONDITION
FREQUENCY
Output Frequency
F_out
32.768
kHz
FREQUENCY STABILITY
F_stab
Frequency Stability Over
Temperature[1]
(without Initial Offset[2] )
F_stab
Frequency Stability Over
Temperature[1]
(with Initial Offset[2] )
F_VDD
Frequency Stability vs Voltage
First Year Frequency Aging
F_aging
-5.0
+5.0
PPM
Stability part number code = 5A
-10
-20
+10
PPM
Stability part number code = 10B
+20
PPM
Stability part number code = 20X
-10
+10
PPM
Stability part number code = 10A
-13
+13
PPM
Stability part number code = 13B
-22
+22
PPM
Stability part number code = 22X
-0.75
+0.75
PPM
1.8V ±10%
-1.5
+1.5
PPM
1.5V –3.63V%
-1.0
+1.0
PPM
TA = -25°C VDD = 3.3V
OPERATING TEMPERATURE RANGE
Operating Temperature Range
T_use
0
–
+70
°C
Commercial
-40
–
+85
°C
Industrial
T_stor
-55
–
+125
°C
Storage
Operating Supply Voltage
VDD
1.5
3.63
V
TA = -40°C to +85°C
Core Supply Current [3]
IDD
Storage Temperature Range
SUPPLY VOLTAGE AND CURRENT CONSUMPTION
Power-Supply Ramp
Start-up Time at Power-up
0.99
t_VDD_Ramp
t_start
180
µA
TA = 25°C, VDD = 1.8V, LVCMOS Output configuration, No Load
1.52
µA
TA = -40°C to +85°C, VDD =1.5V –3.63V, No load
100
ms
VDD Ramp-up 0 to 90% VDD, TA = -40°C to +85°C
300
ms
TA= -40°C +60°C, valid output
350
ms
TA = +60°C to +70°C, valid output
380
ms
TA = +70°C to 85°C, valid output
Notes: 1.No board level underfill. Measured as peak-to-peak/2. Inclusive of 3x-reflow and ±20% load variation. Tested with Agilent 53132A frequency counter. Due to the
low operating frequency, the gate time must be ≥100 ms to ensure an accurate frequency measurement.
2. Initial offset is defined as the frequency deviation from the ideal 32.768 kHz at room temperature, post reflow.
3. Core operating current does not include output driver operating current or load current. To derive total operating current (no load), add core operating current +
output driver operating current, which is a function of the output voltage swing. See the description titled, Calculating Load Current.
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Tel: +49/8191/305395 ∙ Fax: +49/8191/305397
[email protected] ∙ www.petermann-technik.com
GENERAL DATA (continued)
PARAMETER AND CONDITIONS
SYMBOL
MIN.
TYP.
MAX.
UNIT
CONDITION
µspp
81920 cycles (2.5 sec), 100 samples
nsRMS
Cycles = 10,000, TA = 25°C, VDD = 1.5V – 3.63V
JITTER PERFORMANCE (TA = OVER TEMP)
Long Term Jitter
2.5
Period Jitter
35
LVCMOS OUTPUT (STANDARD VERSION)
Output Rise/Fall Time
tf, tf
Output Clock Duty Cycle
DC
48
100
Output Voltage High
VOH
90%
Output Voltage Low
VOL
200
ns
52
%
10%
10-90% (VDD), 15 pF Load
V
VDD: 1.5V – 3.63V. IOH = -1μA, 15 pF Load
V
VDD: 1.5V – 3.63V. IOL = 1μA, 15 pF Load
PROGRAMMABLE, REDUCED SWING OUTPUT (ADAPTABLE TO CUSTOMERS REQUIREMENT)
Output Rise/Fall Time
tf, tf
Output Clock Duty Cycle
DC
48
200
ns
52
%
30-70% (VOL/VOH), 10 pF Load
AC-coupled Programmable Output Swing
V_sw
0.20 to
0.80
V
ULPPO does not internally AC-couple. This output description
is intended for a receiver that is AC-coupled.
VDD: 1.5V – 3.63V, 10 pF Load, IOH / IOL = ±0.2 μA.
DC-Biased Programmable Output Voltage High
Range
VOH
0.6 to
1.225
V
VDD: 1.5V – 3.63V. IOH = -0.2 μA, 10 pF Load.
DC-Biased Programmable Output Voltage Low
Range
VOL
0.35 to
0.80
V
VDD: 1.5V – 3.63V. IOL = 0.2 μA, 10 pF Load.
V
TA = -40°C to +85°C, VDD = 1.5V to 3.63V.
Programmable Output Voltage Swing
Tolerance
-0.055
0.055
EXCELLENT RELIABILITY DATA
MTBF
500 million hours
Shock Resistance
10.000 g
Vibration Resistance
70 g
PIN DESCRIPTION
Pin
Symbol
1,4
GND
2
CLK Out
3
VDD
I/O
Power Supply
Ground
OUT
Functionality
Connect to ground. All GND pins must be connected to power supply ground. The GND pins
can be connected together, as long as both GND pins are connected ground.
Oscillator clock output. When interfacing to an MCU’s XTAL, the CLK Out is typically connected to the receiving IC’s X IN pin. The
ULPPO oscillator output includes an internal driver. As a result, the output swing and operation is not dependent on capacitive loading. This makes the output much more flexible, layout independent, and robust under changing environmental and manufacturing
conditions.
Power Supply
Connect to power supply 1.5V ≤ Vdd ≤ 3.63V. Under normal operating conditions, V DD does not require external bypass decoupling capacitor(s). For more information about the internal power-supply filtering, see Power-Supply Noise Immunity section in
the detailed description..Contact factory for applications that require a wider operating supply voltage range.
FIGURE 1. 1.5X0.8 MM PACKAGE (TOP VIEW)
GND
1
4
GND
CLK OUT
2
3
VDD
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Tel: +49/8191/305395 ∙ Fax: +49/8191/305397
[email protected] ∙ www.petermann-technik.com
DESCRIPTION
The ULPPO is an ultra-small and ultra-low power 32.768 kHz highprecision oscillator optimized for battery-powered applications. The
silicon oscillator technology enables a 32.768 kHz high-precision
oscillator in the smallest footprint of 1.5x0.8mm housing. Typical
core supply current is only 1 µA. And unlike standard oscillators, the
ULPPO features programmable output swing, a factory programmable output that reduces the voltage swing to minimize power.
HIGH-PRECISION FREQUENCY STABILITY
OUTPUT VOLTAGE
The ULPPO has two output voltage options. One option is a standard
DC-coupled rail-to-rail LVCMOS output swing. The second option is
the programmable output swing reduced swing output and current.
Output swing is customer specific and factory programmed between
200 mV and 800 mV. For DC-coupled applications, output VOH and
VOL are individually factory programmed to the customers’ requirement. VOH programming range is between 600 mV and 1.225V in 100
The ULPPO is factory calibrated over multiple temperature points to
mV increments. Similarly, VOL programming range is between 350
guarantee extremely tight stability over temperature. Unlike quartz
mV and 800 mV. For example; a PMIC or MCU is internally 1.8V logic
crystals that have a classic tuning fork parabola temperature curve
compatible, and requires a 1.2V VIH and a 0.6V VIL. Simply select
with a 25°C turnover point with a 0.04 ppm/C temperature coeffi-
ULPPO programmable output swing factory programming code to be
cient, the ULPPO temperature coefficient is calibrated and corrected
“D14” and the correct output thresholds will match the downstream
over temperature with an active temperature correction circuit. The
IC or MCU input requirements. Interface logic will vary by manufac-
result is a 32.768 kHz ULPPO with extremely tight frequency stability
turer and we recommend that you review the input voltage require-
over the -40°C to +85°C temperature range. Contact Petermann-
ments for the input interface. For DC-biased programmable output
Technik’s engineers for applications that require a wider supply volt-
swing configuration, the minimum VOL is limited to 350mV and the
age range>3.63V, or lower operating frequency below 32.768 kHz.
maximum allowable swing VOH - VOL) is 750mV. For example, 1.1V
When measuring the ULPPO output frequency with a frequency coun-
VOH and 400mV VOL is acceptable, but 1.2V VOH and 400 mV VOL is
ter, it is important to make sure the counter's gate time is >100 ms.
not acceptable.
2
The slow frequency of a 32.768 kHz clock will give false readings with
faster gate times.
POWER SUPPLY NOISE IMMUNITY
In addition to eliminating external output load capacitors common
with standard XTALs, the ULPPO includes special power supply filtering and thus, eliminates the need for an external VDD bypassdecoupling capacitor to keep the footprint as small as possible. Internal power supply filtering is designed to reject more than ±150 mV
noise and frequency components from low frequency to more than 10
+ When the output is interfacing to an XTAL input that is internally
AC-coupIed, the ULPPO output can be factory programmed to
match the input swing requirements. For example, if a IC or MCU
input is internally AC-coupIed and requires an 800mV swing, then
simply choose the ULPPO programming code "AA8“ in the part
number. It is important to note that the ULPPO does not include
internal AC-coupling capacitors. Please see the Part Number
Ordering section at the end of the datasheet for more information about the part number ordering scheme.
MHz.
START-UP AND STEADY-STATE SUPPLY CURRENT
The ULPPO starts-up to a valid output frequency within 300 ms (180
ms typ). To ensure the device starts-up within the specified limit,
make sure the power-supply ramps-up in approximately 10 - 20 ms
ULPPO PROGRAMMABLE OUTPUT SWING
Figure 2 shows a typical ULPPO output waveform (into a 10 pF load)
when factory programmed for a 0.70V swing and DC bias (VOH/VOL) for
(to within 90% of VDD). During initial power-up, the ULPPO power-
1.8V logic:
cycles internal blocks as shown in the power-supply start-up and
EXAMPLE:
steady state plot in the typical operating curves section. Power-up
and initialization is typically 200 ms, and during that time, the peak
supply current reaches 28 µA as the internal capacitors are charged,
then sequentially drops to its 990 nA steady-state current. During
steady-state operation, the internal temperature compensation cir-
+ Programmable output swing part number coding: D14. Example
part number: ULPPO18-1508-5A-W-32.768kHz-T-D14
+ VOH = 1.1V, VOL = 0.4V (VSW = 0.70V)
cuit turns on every 350 ms for a duration of approximately 10 ms.
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Tel: +49/8191/305395 ∙ Fax: +49/8191/305397
[email protected] ∙ www.petermann-technik.com
FIGURE 2. ULPPO OUTPUT WAVEFORM (10 PF LOAD)
FIGURE 3. LVCMOS WAVEFORM (VDD = 1.8V) INTO 15 PF LOAD
Table 1 shows the supported programmable output swing VOH, VOL
CALCULATING LOAD CURRENT
factory programming options.
TABLE 1. ACCEPTABLE VOH/VOL PROGRAMMABLE OUTPUT
SWING LEVELS
0.900
0.800
0.700
NO LOAD SUPPLY CURRENT
VOL/VOH
1.225
1.100
1.000
0.800
D28
D18
D08
0.600
0.700
D27
D17
D07
D97
0.525
D26
D16
D06
D96
D86
0.500
D25
D15
D05
D95
D85
D75
0.400
D14
D04
D94
D84
D74
D64
0.350
D13
D03
D93
D83
D73
D63
Table 2 shows the supported AC coupled Swing levels. The “ACcoupled” terminology refers to the programming description for applications where the downstream chipset includes an internal ACcoupling capacitor, and therefore, only the output swing is important
and VOH/VOL are not relevant. For these applications, refer to Table 2
for the acceptable voltage swing options.
When calculating no-load power for the ULPPO, the core and output
driver components need to be added. Since the output voltage swing
can be programmed for reduced swing between 250 mV and 800 mV,
the output driver current is variable. Therefore, no-load operating
supply current is broken into two sections; core and output driver. The
equation is as follows:
Total Supply Current (no load) = IDD Core + (65nA/V)(Voutpp)
EXAMPLE 1: FULL-SWING LVCMOS
+
+
+
+
IDD Core = 990nA (typ)
Voutpp = 1.8V (LVCMOS)
Idd Output Driver: (Cdriver)(Vout)(Fout) =
(3.5pF)(1.8V)(32768Hz) = 206nA
Supply Current = 990nA + 206nA = 1.2µA
TABLE 2. ACCEPTABLE AC-COUPLED SWING LEVELS
SWING
0.800
0.700
0.600
0.500
0.400
0.300
0.250
0.200
Output Code
AA8
AA7
AA6
AA5
AA4
AA3
AA2
AA1
EXAMPLE 2: REDUCED SWING
EXAMPLE:
+
+
+
+
+
Programmable output swing part number coding: AA2. Example part number: ULPPO-1508-5A-W-32.768KHZ-T-AA2
+
VDD = 1.8V
VDD = 1.8V
IDD Core = 990nA (typ)
Voutpp (Programmable) = VOH – VOL = 1.1V - 0.6V = 500 mV
(3.5pF)(0.50V)(32768Hz) = 57nA
Supply Current = 990nA + 57nA = 1.05µA
Output voltage swing: 0.250V
The values listed in Tables 1 and -2 are nominal values at 25°C and
will exhibit a tolerance of ±55 mV across Vdd and -40°C to 85°C operating temperature range.
EXAMPLE:
+LVCMOS rail-to-rail output part number coding is always S
+Example part number: ULPPO33-1508-5A-W-32.768KHZ-T-S
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[email protected] ∙ www.petermann-technik.com
CALCULATING LOAD CURRENT
TOTAL SUPPLY CURRENT WITH LOAD
To calculate the total supply current, including the load, follow the
equation listed below. Note the 30% reduction in power with Programmable output swing.
Total Current = IDD Core + IDD Output Driver + Load Current (C*V*F)
EXAMPLE 1: FULL-SWING LVCMOS
+
+
+
+
VDD = 1.8V
IDD Core = 990nA
Load Capacitance = 10pF
Idd Output Driver: (Cdriver)(Vout)(Fout) =
(3.5pF)(1.8V)(32768Hz) = 206nA
Load Current: (10pF)(1.8V)(32768Hz) = 590nA
+
+ Total Current = 990nA + 206nA + 590nA = 1.79µA
EXAMPLE 2: PROGRAMMED REDUCED SWING
+
+
+
+
+
+
+
VDD= 1.8V
IDD Core = 990nA
Load Capacitance = 10pF
Voutpp (Programmable): VOH – VOL = 1.1V - 0.6V = 500mV
IDD Output Driver: (Cdriver)(Vout)(Fout) =
(3.5pF)(0.5V)(32768Hz) = 57nA
Load Current: (10pF)(0.5V)(32768Hz) = 164nA
Total Current = 990nA + 57nA + 164nA = 1.2µA
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TYPICAL OPERATING CURVES
FIGURE 5. FREQUENCY STABILITY OVER TEMPERATURE
(POST-REFLOW)
Frequency Stability (PPM)
Frequency Stability (PPM)
FIGURE 4. FREQUENCY STABILITY OVER TEMPERATURE
(PRE-REFLOW)
Temperature (°C)
FIGURE 7. OUTPUT STAGE CURRENT OVER TEMPERATURE
Core Current (uA)
Output Stage Current (nA/Vpp)
FIGURE 6. CORE CURRENT OVER TEMPERATURE
Temperature (°C)
Temperature (°C)
FIGURE 9. START-UP AND STEADY-STATE CURRENT PROFILE
IDD (µA)
No Load Current (µA)
FIGURE 8. SUPPLY CURRENT OVER TEMPERATURE, LVCMOS
(CORE + LVCMOS OUTPUT DRIVER, NO LOAD)
Temperature (°C)
Temperature (°C)
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Time from Power ON (ms)
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TYPICAL OPERATING CURVES
FIGURE 11. TEMPERATURE RAMP RESPONSE
Frequency Error (ppm)
FIGURE 10. POWER SUPPLY NOISE REJECTION
(+/-150MV NOISE)
Noise Injection Frequency (Hz)
FIGURE 12. PROGRAMMABLE OUTPUT SWING WAVEFORM
(VOH = 1.2V, VOL = 0.4V, 10 PF LOAD; ULPPO)
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FIGURE 13. LVCMOS OUTPUT WAVEFORM
(VSWING = 1.8V, ULPPO,10 PF LOAD)
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DIMENSIONS AND PATTERNS
RECOMMENDED LAND PATTERN (UNIT:MM)
PACKAGE SIZE – DIMENSIONS (UNIT:MM)
1.55 X 0.85 MM
Ø 0.25 (4x) NSMD pads
#2
#1
Polymer
coating
#4
1.00 BSC
#3
#3
#2
0.41
#1
0.315±0.015
#4
0.41
BSC
#3
0.84±0.02
#4
0.60 max
0.04
1.54±0.02
#1
#2
1.00
0.35 (4x) Soldermask
opening
(soldermask openings shown with heavy dashed line)
Recommended 4-mil (0.1mm) stencil thickness
REFLOW SOLDER PROFILE
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Tel: +49/8191/305395 ∙ Fax: +49/8191/305397
[email protected] ∙ www.petermann-technik.com
ORDERING INFORMATION
OSCILLATOR
FAMILY
TEMPERATURE
RANGE
SUPPLY VOLTAGE
“X2“ any 1.5-3.63
FREQUENCY
32.768kHz
“C” for 0 +70°C
“W” for -40 +85°C
ULPPO
ULPPO X2-1508-5A-W-32.768kHz-T-S
FREQUENCY
STABILITY
SEE PAGE 1
PACKING METHOD
“T”: TAPE & REEL
3000 pcs. per Reel
Smaller quantities possible
OUTPUT DRIVE
STRENGTH
PACKAGE SIZE
“1508” for 1.5 X 0.8 mm
“S” Standard
(datasheet limits)
EXAMPLE: ULPPOX2-1508-5A-W-32.768kHz-T-S
PLEASE INDICATE YOUR REQUIRED PARAMETERS
EXPRESS SAMPLES ARE DELIVERABLE ON THE SAME DAY
IF ORDERED UNTIL 02:00 PM!
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PREMIUM QUALITY BY
PETERMANN-TECHNIK
OUR COMPANY IS CERTIFIED ACCORDING TO ISO
9001:2008 IN OCTOBER 2013 BY THE DMSZ CERTIFIKATION GMBH.
THIS IS FOR YOU TO ENSURE THAT THE PRINCIPLES OF QUALITY MANAGEMENT ARE FULLY IMPLEMENTED IN OUR QUALITY MANAGEMENT
SYSTEM AND QUALITY CONTROL METHODS ALSO
DOMINATE OUR QUALITY STANDARDS.
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