DF N 20 20 MD -6 PMPB55ENEA 60 V, N-channel Trench MOSFET 6 June 2016 Product data sheet 1. General description N-channel enhancement mode Field-Effect Transistor (FET) in a leadless medium power DFN2020MD-6 (SOT1220) Surface-Mounted Device (SMD) plastic package using Trench MOSFET technology. 2. Features and benefits • • • • • Trench MOSFET technology Small and leadless ultra thin SMD plastic package: 2 x 2 x 0.65 mm Tin-plated 100 % solderable side pads for optical solder inspection ElectroStatic Discharge (ESD) protection > 2 kV AEC-Q101 qualified 3. Applications • • • • Relay driver High-speed line driver Low-side load switch Switching circuits 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj = 25 °C - - 60 V VGS gate-source voltage -20 - 20 V ID drain current - - 4 A - 42 56 mΩ VGS = 10 V; Tamb = 25 °C [1] Static characteristics RDSon [1] drain-source on-state resistance VGS = 10 V; ID = 4 A; Tj = 25 °C 2 Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and mounting pad for drain 6 cm . PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 D drain 2 D drain 3 G gate Simplified outline 1 Graphic symbol 7 2 5 G 3 4 4 S source 5 D drain Transparent top view DFN2020MD-6 (SOT1220) 6 D drain 7 D drain 8 S source D 6 8 S 017aaa255 6. Ordering information Table 3. Ordering information Type number Package Name PMPB55ENEA Description Version DFN2020MD-6 DFN2020MD-6: plastic thermal enhanced ultra thin small outline SOT1220 package; no leads; 6 terminals 7. Marking Table 4. Marking codes Type number Marking code PMPB55ENEA 2G PMPB55ENEA Product data sheet All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 2 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj = 25 °C - 60 V VGS gate-source voltage -20 20 V ID drain current VGS = 10 V; Tamb = 25 °C [1] - 4 A VGS = 10 V; Tamb = 100 °C [1] - 2.5 A IDM peak drain current Tamb = 25 °C; single pulse; tp ≤ 10 µs - 16 A EDS(AL)S non-repetitive drainsource avalanche energy Tj(init) = 25 °C; ID = 1.3 A; DUT in avalanche (unclamped) - 12.6 mJ Ptot total power dissipation Tamb = 25 °C - 1.65 W - 15.6 W [1] Tsp = 25 °C Tj junction temperature -55 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C Source-drain diode IS source current Tamb = 25 °C [1] - 1.2 A HBM [2] - 2000 V ESD maximum rating VESD [1] [2] electrostatic discharge voltage 2 Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and mounting pad for drain 6 cm . Measured between all pins. 017aaa123 120 017aaa124 120 Pder (%) Ider (%) 80 80 40 40 0 - 75 - 25 25 75 125 Tj (°C) 0 - 75 175 Fig. 1. Normalized total power dissipation as a function of junction temperature PMPB55ENEA Product data sheet - 25 25 75 125 Tj (°C) 175 Fig. 2. Normalized continuous drain current as a function of junction temperature All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 3 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET aaa-022659 102 ID (A) Limit RDSon = VDS/ID tp = 10 µs 10 100 µs 1 1 ms DC; Tsp = 25 °C 10 ms 10-1 10-2 10-1 DC; Tamb = 25 °C; drain mounting pad 6 cm2 1 100 ms 10 VDS (V) 102 Fig. 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-source voltage PMPB55ENEA Product data sheet All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 4 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Rth(j-a) thermal resistance from junction to ambient in free air Rth(j-sp) [1] [2] thermal resistance from junction to solder point Min Typ Max Unit [1] - 237 273 K/W [2] - 66 76 K/W - 4 8 K/W Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated and mounting pad for drain 6 cm . aaa-022660 103 Zth(j-a) (K/W) duty cycle = 1 0.75 102 0.33 0.20 0.50 0.25 0.10 10 0.05 0.02 0.01 0 1 10-3 10-2 10-1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values 102 aaa-022661 duty cycle = 1 0.75 Zth(j-a) (K/W) 0.50 0.33 0.20 0.25 0.10 10 0.05 0.02 0.01 0 1 10-3 10-2 10-1 FR4 PCB, mounting pad for drain 6 cm 1 10 102 2 tp (s) 103 Fig. 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PMPB55ENEA Product data sheet All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 5 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 60 - - V VGSth gate-source threshold voltage ID = 250 µA; VDS=VGS; Tj = 25 °C 1.3 1.7 2.7 V IDSS drain leakage current VDS = 60 V; VGS = 0 V; Tj = 25 °C - - 1 µA IGSS gate leakage current VGS = 20 V; VDS = 0 V; Tj = 25 °C - - 10 µA VGS = -20 V; VDS = 0 V; Tj = 25 °C - - -10 µA VGS = 10 V; VDS = 0 V; Tj = 25 °C - - 1 µA VGS = -10 V; VDS = 0 V; Tj = 25 °C - - -1 µA VGS = 10 V; ID = 4 A; Tj = 25 °C - 42 56 mΩ VGS = 10 V; ID = 4 A; Tj = 150 °C - 80 106 mΩ VGS = 4.5 V; ID = 3.5 A; Tj = 25 °C - 48 69 mΩ RDSon drain-source on-state resistance gfs forward transconductance VDS = 10 V; ID = 4 A; Tj = 25 °C - 17 - S RG gate resistance f = 1 MHz - 2.7 - Ω VDS = 30 V; ID = 4 A; VGS = 10 V; Tj = 25 °C - 7.5 12 nC - 1 - nC - 1.2 - nC - 435 - pF - 47 - pF - 26 - pF - 4.5 - ns - 4 - ns Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) turn-off delay time - 13.5 - ns tf fall time - 7 - ns - 0.8 1.2 V VDS = 30 V; f = 1 MHz; VGS = 0 V; Tj = 25 °C VDS = 30 V; ID = 4 A; VGS = 10 V; RG(ext) = 6 Ω; Tj = 25 °C Source-drain diode VSD source-drain voltage PMPB55ENEA Product data sheet IS = 1.2 A; VGS = 0 V; Tj = 25 °C All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 6 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET aaa-022662 16 aaa-022663 10-3 3.2 V ID (A) ID (A) 12 10 V 4.5 V 3.4 V min 10-4 3.0 V typ max 8 2.8 V 10-5 4 VGS = 2.5 V 0 0 1 2 3 4 VDS (V) 10-6 5 Tj = 25 °C 2.8 V 3V VGS (V) 3 aaa-022665 180 RDSon (mΩ) 150 3.2 V 120 120 90 3.4 V 90 60 4.5 V 60 VGS = 10 V 30 0 2 Fig. 7. Sub-threshold drain current as a function of gatesource voltage aaa-022664 2.5 V 1 VDS = 10 V Tj = 25 °C Fig. 6. Output characteristics: drain current as a function of drain-source voltage; typical values 180 RDSon (mΩ) 150 0 0 4 8 12 ID (A) 0 16 0 2 4 6 8 10 VGS (V) ID = 4 A Fig. 8. Drain-source on-state resistance as a function of drain current; typical values Product data sheet Tj = 25 °C 30 Tj = 25 °C PMPB55ENEA Tj = 150 °C Fig. 9. Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 7 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET aaa-022666 16 aaa-022667 2 ID (A) a 12 1.5 8 1 Tj = 150 °C 4 0.5 Tj = 25 °C 0 0 1 2 3 VGS (V) 0 -60 4 0 60 120 Tj (°C) 180 VDS > ID x RDSon Fig. 10. Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig. 11. Normalized drain-source on-state resistance as a function of ambient temperature; typical values aaa-022668 4 aaa-022669 103 Ciss VGS(th) (V) C (pF) 3 max 102 Coss 2 typ Crss min 10 1 0 -60 0 60 120 Tj (°C) 1 10-1 180 ID = 250 μA; VDS = VGS Product data sheet 10 VDS (V) 102 f = 1 MHz; VGS = 0 V Fig. 12. Gate-source threshold voltage as a function of ambient temperature PMPB55ENEA 1 Fig. 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 8 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET aaa-022670 10 VDS VGS (V) ID 8 VGS(pl) 6 VGS(th) VGS 4 QGS1 2 0 QGS2 0 2 4 6 QG (nC) QGS QGD QG(tot) 003aaa508 Fig. 15. Gate charge waveform definitions 8 VDS = 30 V; ID = 4 A Fig. 14. Gate-source voltage as a function of gate charge; typical values aaa-022671 5 IS (A) 4 3 Tj = 150 ºC Tj = 25 ºC 2 1 0 0 0.4 0.8 VSD (V) 1.2 VGS = 0 V Fig. 16. Source current as a function of source-drain voltage; typical values 11. Test information P t2 duty cycle δ = t1 t2 t1 t 006aaa812 Fig. 17. Duty cycle definition PMPB55ENEA Product data sheet All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 9 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. PMPB55ENEA Product data sheet All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 10 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET 12. Package outline DFN2020MD-6: plastic thermal enhanced ultra thin small outline package; no leads; 6 terminals; body 2 x 2 x 0.65 mm SOT1220 (8×) pin 1 index area B E A X D A A1 detail X solderable lead end protrusion max. 0.02 mm (6×) C Lp E2 J1 D2 3 4 2 5 e J D1 bp (6×) e 1 v E1 0 2 mm scale Dimensions (mm are the original dimensions) Unit A A1 bp min 0.25 nom max 0.65 0.04 0.35 D D1 D2 E E1 E2 1.9 1.0 0.2 1.9 1.1 0.51 2.1 1.2 0.3 2.1 1.3 0.61 e J J1 0.65 0.27 0.64 Lp 0.2 0.3 v y y1 0.1 0.05 0.1 Note 1. Dimension A is including plating thickness. Outline version A B 6 pin 1 index area mm y y1 C sot1220_po References IEC JEDEC JEITA European projection Issue date 12-04-23 12-04-30 SOT1220 Fig. 18. Package outline DFN2020MD-6 (SOT1220) PMPB55ENEA Product data sheet All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 11 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET 13. Soldering Footprint information for reflow soldering of DFN2020MD-6 package 0.33 (6×) SOT1220 0.76 0.43 (6×) 0.66 0.53 (6×) 0.56 0.25 0.35 0.45 0.775 0.65 2.06 0.285 1.25 1.35 0.35 (6×) 1.05 0.25 (6×) 0.65 0.45 (6×) 0.9 1.1 1.2 0.935 0.935 2.5 solder land solder land plus solder paste solder paste deposit solder resist occupied area Dimensions in mm sot1220_fr Fig. 19. Reflow soldering footprint for DFN2020MD-6 (SOT1220) PMPB55ENEA Product data sheet All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 12 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET 14. Revision history Table 8. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes PMPB55ENEA v.2 20160606 Product data sheet - PMPB55ENEA v.1 Preliminary data sheet - - Modifications: PMPB55ENEA v.1 PMPB55ENEA Product data sheet • Updated Figure 14 20160401 All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 13 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. 15. 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All rights reserved 14 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Bitsound, CoolFlux, CoReUse, DESFire, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, MIFARE, MIFARE Plus, MIFARE Ultralight, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP Semiconductors N.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. PMPB55ENEA Product data sheet All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 15 / 16 PMPB55ENEA NXP Semiconductors 60 V, N-channel Trench MOSFET 16. Contents 1. General description......................................................1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Quick reference data....................................................1 5. Pinning information......................................................2 6. Ordering information....................................................2 7. Marking.......................................................................... 2 8. Limiting values............................................................. 3 9. Thermal characteristics............................................... 5 10. Characteristics............................................................ 6 11. Test information......................................................... 9 12. Package outline........................................................ 11 13. Soldering................................................................... 12 14. Revision history........................................................13 15. Legal information..................................................... 14 © NXP Semiconductors N.V. 2016. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 6 June 2016 PMPB55ENEA Product data sheet All information provided in this document is subject to legal disclaimers. 6 June 2016 © NXP Semiconductors N.V. 2016. All rights reserved 16 / 16