VS-VSKT570-18PbF Datasheet

VS-VSKT570-18PbF
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Vishay Semiconductors
Thyristor/Thyristor, 570 A
(SUPER MAGN-A-PAK Power Modules)
FEATURES
• High current capability
• High surge capability
• Industrial standard package
• 3000 VRMS isolating voltage with non-toxic
substrate
• Designed and qualified for industrial level
• UL approved file E78996
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
TYPICAL APPLICATIONS
SUPER MAGN-A-PAK
• Motor starters
• DC motor controls - AC motor controls
PRODUCT SUMMARY
• Uninterruptible power supplies
IT(AV)
570 A
Type
Modules - Thyristor, Standard
Package
SMAP
Circuit
Two SCRs Doubler Circuit
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
CHARACTERISTICS
VALUES
IT(AV)
TC = 74 °C
570
IT(RMS)
TC = 74 °C
895
ITSM
I2t
50 Hz
17 800
60 Hz
18 700
50 Hz
1591
60 Hz
1452
I2√t
UNITS
A
kA2s
15 910
kA2√s
V
VRRM
Range
1800
TStg
Range
-40 to +135
TJ
Range
-40 to +135
°C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VS-VSKT570-18PbF
VOLTAGE
CODE
VRRM/VDRM, MAXIMUM REPETITIVE
PEAK REVERSE VOLTAGE
V
VRSM, MAXIMUM NON-REPETITIVE
PEAK REVERSE VOLTAGE
V
IRRM/IDRM MAXIMUM
AT TJ = TJ MAXIMUM
mA
18
1800
1900
120
Revision: 29-Apr-15
Document Number: 93281
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ON-STATE CONDUCTION
PARAMETER
SYMBOL
Maximum average on-state current
at case temperature
Maximum RMS on-state current
Maximum peak, one-cycle,
non-repetitive on-state surge current
IT(AV)
IT(RMS)
ITSM,
IFSM
TEST CONDITIONS
A
74
°C
180° conduction, half sine wave at TC = 74 °C
895
A
t = 10 ms
No voltage
reapplied
17.8
100 % VRRM
reapplied
15.0
t = 8.3 ms
t = 10 ms
t = 10 ms
I2t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum
I2√t
for fusing
I2√t
No voltage
reapplied
18.7
Sinusoidal
half wave,
initial TJ = TJ maximum
100 % VRRM
reapplied
1591
1452
1125
t = 0.1 ms to 10 ms, no voltage reapplied
15 910
(16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum
0.864
High level value of threshold voltage
VT(TO)2
(I > π x IT(AV)), TJ = TJ maximum
0.97
Low level value on-state slope resistance
rt1
(16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum
0.411
High level value on-state slope resistance
rt2
(I > π x IT(AV)), TJ = TJ maximum
0.362
Ipk = 1500 A, TJ = 25 °C, tp = 10 ms sine pulse
1.50
VTM
IH
Maximum latching current
IL
TJ = 25 °C, anode supply 12 V resistive load
kA2s
1027
VT(TO)1
Maximum holding current
kA
15.7
Low level value or threshold voltage
Maximum on-state voltage drop
UNITS
570
180° conduction, half sine wave
t = 8.3 ms
Maximum I2t for fusing
VALUES
500
1000
kA2√s
V
mΩ
V
mA
SWITCHING
PARAMETER
Maximum rate of rise of turned-on current
SYMBOL
dI/dt
TEST CONDITIONS
TJ = TJ maximum, ITM = 400 A, VDRM applied
VALUES
UNITS
1000
A/μs
Typical delay time
td
Gate current 1 A, dIg/dt = 1 A/μs
Vd = 0.67 % VDRM, TJ = 25 °C
2.0
Typical turn-off time
tq
ITM = 750 A; TJ = TJ maximum, dI/dt = - 60 A/μs,
VR = 50 V, dV/dt = 20 V/μs, gate 0 V 100 Ω
200
μs
BLOCKING
PARAMETER
Maximum critical rate of rise
of off-state voltage
SYMBOL
dV/dt
TEST CONDITIONS
VALUES
UNITS
TJ = TJ maximum, linear to VD = 80 % VDRM
1000
V/μs
RMS insulation voltage
VINS
t=1s
3000
V
Maximum peak reverse and
off-state leakage current
IRRM,
IDRM
TJ = TJ maximum, rated VDRM/VRRM applied
120
mA
Revision: 29-Apr-15
Document Number: 93281
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TRIGGERING
PARAMETER
SYMBOL
Maximum peak gate power
PGM
Maximum peak average gate power
PG(AV)
Maximum peak positive gate current
+IGM
Maximum peak positive gate voltage
+VGM
Maximum peak negative gate voltage
-VGM
Maximum DC gate current required to trigger
IGT
DC gate voltage required to trigger
VGT
DC gate current not to trigger
IGD
DC gate voltage not to trigger
VGD
TEST CONDITIONS
VALUES
TJ = TJ maximum, tp ≤ 5 ms
10
TJ = TJ maximum, f = 50 Hz, d % = 50
2.0
3.0
TJ = TJ maximum, tp ≤ 5 ms
20
5.0
200
TJ = 25 °C, Vak 12 V
UNITS
W
A
V
mA
3.0
V
10
mA
0.25
V
VALUES
UNITS
TJ = TJ maximum
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
Maximum junction operating
temperature range
TEST CONDITIONS
TJ
-40 to +135
Maximum storage temperature range
TStg
-40 to +135
Maximum thermal resistance,
junction to case per junction
RthJC
Maximum thermal resistance,
case to heatsink per module
RthC-hs
DC operation
0.065
Mounting surface smooth, flat and greased
0.02
A mounting compound is recommended and the
torque should be rechecked after a period of
3 hours to allow for the spread of the compound.
6-8
°C
K/W
SMAP to heatsink
Mounting torque ± 10 %
busbar to SMAP
Nm
12-15
Approximate weight
1500
Case style
See dimensions (link at the end of datasheet)
g
SUPER MAGN-A-PAK
ΔRthJC CONDUCTION
CONDUCTION ANGLE
SINUSOIDAL CONDUCTION
RECTANGULAR CONDUCTION
180°
0.009
0.006
120°
0.011
0.011
90°
0.014
0.015
60°
0.021
0.022
30°
0.037
0.038
TEST CONDITIONS
UNITS
TJ = TJ maximum
K/W
Note
• Table shows the increment of thermal resistance RthJC when devices operate at different conduction angles than DC
Revision: 29-Apr-15
Document Number: 93281
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Vishay Semiconductors
140
Maximum Allowable Case
Temperature (°C)
120
110
Ø
Conduction angle
100
90
80
180°
120°
90°
60°
30°
70
60
Maximum Average On-State
Power Loss (W)
1200
VSKT570-18PbF
RthJC = 0.065 K/W
130
100
200
300
400
500
600
800
DC
RMS limit
600
400
Ø
Conduction period
200
700
VSKT570-18PbF
TJ = 135 °C
Average On-State Current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 4 - On-State Power Loss Characteristics
VSKT570-18PbF
RthJC = 0.065 K/W
130
120
110
Ø
Conduction period
100
90
DC
180°
120°
90°
60°
30°
70
60
50
0
100 200 300 400 500 600 700 800 900
Average On-State Current (A)
180°
120°
90°
60°
30°
800
700
600
RMS limit
500
400
300
Ø
200
Conduction angle
100
VSKT570-18PbF
TJ = 135 °C
0
100
200
300
400
500
600
Average On-State Current (A)
Fig. 3 - On-State Power Loss Characteristics
Peak Half Sine Wave On-State Current (A)
1000
900
16 000
At any rated load condition and with
rated VRRM applied following surge.
Initial TJ = 135 °C
at 60 Hz 0.0083 s
at 50 Hz 0.0100 s
15 000
14 000
13 000
12 000
11 000
10 000
9000
8000
VSKT570-18PbF
per junction
7000
1
10
100
Number of Equal Amplitude Half
Cycle Current Pulses (N)
Fig. 5 - Maximum Non-Repetitive Surge Current
Fig. 2 - Current Ratings Characteristics
0
100 200 300 400 500 600 700 800 900
Average On-State Current (A)
140
80
0
Peak Half Sine Wave On-State Current (A)
0
Maximum Allowable Case
Temperature (°C)
1000
0
50
Maximum Average On-State
Power Loss (W)
180°
120°
90°
60°
30°
18 000
16 000
14 000
Maximum non-repetitive surge current
versus pulse train duration. Control
of conduction may not be maintained.
Initial TJ = 135 °C
No voltage reapplied
Rated VRRM reapplied
12 000
10 000
8000
VSKT570-18PbF
per junction
6000
0.01
0.1
1
Pulse Train Duration (s)
Fig. 6 - Maximum Non-Repetitive Surge Current
Revision: 29-Apr-15
Document Number: 93281
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Vishay Semiconductors
900
900
180°
120°
90°
60°
30°
Ø
Ø
700
600
800
Maximum Total On-State
Power Loss (W)
Maximum Total On-State
Power Loss (W)
800
Conduction angle
500
400
300
200
VSKT570-18PbF
per module
TJ = 135 °C
100
0
0
R
700
0.0
0.1
500
thS
A
9K
2K
/W
=
0.0
7K
/W
/W
0.2
K
0.3 /W
K/W
500
400
300
0.4 K
/W
0.5 K
/W
200
0.6 K/W
100
0
0
100 200 300 400 500 600 700 800 900
20
40
60
80
100
120
Maximum Allowable Ambient Temperature (°C)
Total RMS Output Current (A)
10 000
0.1
VSKT570-18PbF
per junction
TJ = 25 °C
ZthJC - Transient Thermal
Impedance (K/W)
Instantaneous On-State Current (A)
Fig. 7 - On-State Power Loss Characteristics
TJ = 135 °C
1000
VSKT570-18PbF
per junction
100
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.01
Steady state value
RthJC = 0.065 K/W
(DC operation)
0.001
0.001
5.0
0.01
0.1
1
10
100
Instantaneous On-State Voltage (V)
Square Wave Pulse Duration (s)
Fig. 8 - On-State Voltage Drop Characteristics
Fig. 9 - Thermal Impedance ZthJC Characteristics
10
Rectangular gate pulse
a) Recommended load line for
rated dI/dt: 20 V, 10 Ω;
tr ≤ 1 µs
b) Recommended load line for
≤ 30 % rated dI/dt: 10 V, 10 Ω
tr ≤ 1 µs
(1) PGM = 10 W,
(2) PGM = 20 W,
(3) PGM = 40 W,
(4) PGM = 60 W,
(a)
IGD
0.1
0.001
0.01
TJ = 40 °C
VGD
TJ = 25 °C
1
tp = 4 ms
tp = 2 ms
tp = 1 ms
tp = 0.66 ms
(b)
TJ = 130 °C
Instantaneous Gate Voltage (V)
100
(1)
VSK.570-18PbF
0.1
(2)
(3) (4)
Frequency limited by PG(AV)
1
10
100
1000
Instantaneous Gate Current (A)
Fig. 10 - Gate Characteristics
Revision: 29-Apr-15
Document Number: 93281
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-VSKT570-18PbF
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ORDERING INFORMATION TABLE
Device code
VS-
VSK
T
570
1
2
3
4
-
18
PbF
5
6
1
-
Vishay Semiconductors product
2
-
Module type
3
-
Circuit configuration (see below)
4
-
Current rating
5
-
Voltage code x 100 = VRRM
6
-
Lead (Pb)-free
CIRCUIT CONFIGURATION
CIRCUIT DESCRIPTION
CIRCUIT CONFIGURATION CODE
CIRCUIT DRAWING
VSKT
1
~
+
Two SCRs doubler circuit
T
2
3
-
4 (K1) 7 (K2)
5 (G1) 6 (G2)
LINKS TO RELATED DOCUMENTS
Dimensions
www.vishay.com/doc?95283
Revision: 29-Apr-15
Document Number: 93281
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Outline Dimensions
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Vishay Semiconductors
Super MAGN-A-PAK Thyristor/Diode
DIMENSIONS in millimeters (inches)
52 (2.05)
16 (0.63)
9.9 ± 0.5 (0.39 ± 0.02)
Ø 6.5 mm ± 0.3 mm x 4 Holes (Typ.)
31.0
(1.22)
44.0
(1.73)
50.0
(1.97)
Fast-on tabs
2.8 x 0.8 (0.11 x 0.03)
3
2
26.0
(0.98)
26.0
(0.98)
4
6
7
20.1
(0.78)
1
5
28.0
(1.10)
48.0 (1.89)
60.0 (2.36)
M10
36.4 (1.14)
4.5 (0.20)
112.0 (4.41)
124.0 (4.88)
5, 6 = Gate
4, 7 = Cathode
1.0 (0.039)
149.0 (5.67)
Revision: 09-Mar-15
Document Number: 95283
1
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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
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Revision: 02-Oct-12
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Document Number: 91000