ATS667 Datasheet

ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Features and Benefits
Description
▪ Optimized robustness against magnetic offset variation
▪ Small signal lockout for immunity against vibration
▪ Tight duty cycle and timing accuracy over full operating
temperature range
▪ True zero-speed operation
▪ Air gap independent switchpoints
▪ Large operating air gaps achieved through use of gain
adjust and offset adjust circuitry
▪ Defined power-on state (POS)
▪ Wide operating voltage range
▪ Digital output representing target profile
▪ Single chip sensing IC for high reliability
▪ Small mechanical size
▪ Optimized Hall IC magnetic system
▪ Fast start-up
▪ Undervoltage lockout (UVLO)
The ATS667 is a true zero-speed gear tooth sensor IC consisting
of an optimized Hall IC-rare earth pellet configuration in a
single overmolded package. The unique IC and package design
provides a user-friendly solution for digital gear tooth sensing
applications. This small package can be easily assembled and
used in conjunction with gears of various shapes and sizes.
The device incorporates a dual element Hall IC that switches
in response to differential magnetic signals created by a ferromagnetic target. The IC contains a sophisticated compensating
circuit designed to eliminate the detrimental effects of magnet
and system offsets. Digital processing of the analog signal
provides zero-speed performance independent of air gap and
also dynamic adaptation of device performance to the typical
operating conditions found in automotive applications (reduced
vibration sensitivity). High-resolution peak detecting DACs
are used to set the adaptive switching thresholds of the device.
Hysteresis in the thresholds reduces the negative effects of any
anomalies in the magnetic signal associated with the targets
used in many automotive applications.
Package: 4-pin SIP (suffix SG)
The ATS667 is optimized for transmission applications. It is
available in a lead (Pb) free 4-pin SIP package with a 100%
matte tin plated leadframe.
Not to scale
Functional Block Diagram
VCC
Voltage
Regulator
Automatic
Gain
Control
Hall
Amp
Offset
Adjust
Threshold
Comparator
PDAC
PThresh
VPROC
Reference
Generator
Threshold
Logic
NThresh
NDAC
TEST
Current
Limit
GND
ATS667-DS, Rev. 5
Output
Transistor
VOUT
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Selection Guide
Part Number
Packing*
ATS667LSGTN-T
13-in. reel, 800 pieces/reel
*Contact Allegro™ for additional packing options
Absolute Maximum Ratings
Characteristic
Symbol
Supply Voltage
VCC
Reverse Supply Voltage
VRCC
Notes
See Power Derating section
Rating
Unit
26.5
V
–18
V
Reverse Supply Current
IRCC
–50
mA
Reverse Output Voltage
VROUT
–0.5
V
Output Sink Current
IOUT
25
mA
–40 to 150
ºC
TJ(max)
165
ºC
Tstg
–65 to 170
ºC
Operating Ambient Temperature
TA
Maximum Junction Temperature
Storage Temperature
Range L
Pin-out Diagram
Terminal List
1
2
3
4
Number
Name
1
VCC
Supply voltage
Function
2
VOUT
Device output
3
TEST
Tie to GND or float
4
GND
Ground
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
OPERATING CHARACTERISTICS Valid over operating voltage and temperature ranges; unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.1
Max.
Unit
Electrical Characteristics
Supply Voltage2
Undervoltage Lockout (UVLO)
Reverse Supply Current
VCC
Operating, TJ < TJ(max)
VCC(UV)
IRCC
VCC = –18 V
4.0
–
24
V
–
3.5
3.95
V
–
–
– 10
mA
26.5
–
–
V
Supply Zener Clamp Voltage
VZ
ICC = 15 mA, TA = 25 °C
Supply Zener Current
IZ
TA = 25°C, TJ < TJ(max), continuous, VZ = 26.5 V
–
–
15
mA
Output off
4
7
12
mA
Output on
4
7
12
mA
Connected as in figure 6
–
High
–
–
SROT < 200 rpm; VCC > VCC(min)
–
–
2
ms
Supply Current
ICC
Power-On State Characteristics
Power-On State
POS
Power-On Time3
tPO
OUTPUT STAGE
Low Output Voltage
Output Zener Clamp Voltage
VOUT(SAT)
VZOUT
IOUT = 10 mA, Output = on
IOUT = 3 mA, TA = 25°C
–
100
250
mV
26.5
–
–
V
Output Current Limit
IOUT(LIM)
VOUT = 12 V, TJ < TJ(max)
25
45
70
mA
Output Leakage Current
IOUT(OFF)
Output = off, VOUT = 24 V
–
–
10
μA
Output Rise Time
tr
RPULLUP = 1 kΩ, CL = 4.7 nF, VPULLUP = 12 V,
10% to 90%, connected as in figure 6
–
10
–
μs
Output Fall Time
tf
RPULLUP = 1 kΩ, CL = 4.7 nF, VPULLUP = 12 V,
90% to 10%, connected as in figure 6
–
0.6
2
μs
User induced differential offset
–
±60
–
G
Possible reduced edge detection accuracy, duty
cycle not guaranteed
–
1
6
edge
Running mode operation, bounded for
increasing AG, unlimited for decreasing AG
–
Continuous
–
–
0.5
–
2.5
mm
Output switching only (no missing edges)
–
–
3.1
mm
TθE
100 Gpk-pk ideal sinusoidal signal, TA = 150°C,
SROT = 1000 rpm (f = 1000 Hz)
–
0.06
–
deg.
ΔAGMAX
Percentage of most recent AGpk-pk , single
instantaneous air gap increase, f < 500 Hz,
VPROC(pk-pk) > VLOE after sudden AG change
–
40
–
%
Measured as VOUT , connected as in figure 6;
Wobble < 0.5 mm, AGOP < AGOP(max) , direction
of target rotation pin 4 to pin 1
42
47
52
%
D-to- A Converter (DAC) Characteristics
Allowable User Induced Differential
Offset4,5
BDIFFEXT
Calibration
Initial Calibration6
CALI
Update Method
Operating Characteristics (with Allegro 60-0 Reference Target)
Operational Air Gap Range7
Maximum Operational Air Gap Range
Relative Repeatability8
Maximum Single Outward Sudden Air
Gap Change9
Duty Cycle
AGOP
AGOPMAX
D
Repeatability and duty cycle within specification
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
OPERATING CHARACTERISTICS (continued) Valid over operating voltage and temperature ranges; unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.1
Max.
Unit
Switchpoint Characteristics
Operational Speed
SROT
Allegro 60–0 Reference Target
0
–
12000
rpm
Bandwidth
f-3dB
Cutoff frequency for low-pass filter
15
20
–
kHz
Operate Point
BOP
% of peak-to-peak VPROC referenced from
PDAC to NDAC, AG < AGmax, VOUT high to low
–
70
–
%
Release Point
BRP
% of peak-to-peak VPROC referenced from
PDAC to NDAC, AG < AGmax , VOUT low to high
–
30
–
%
Running Mode Lockout Enable (LOE)
VLOE(RM)
VPROC(PK-PK) < VLOE(RM) = output switching
disabled
–
100
–
mV
Running Mode Lockout Release (LOR)
VLOR(RM)
VPROC(PK-PK) < VLOR(RM) = output switching
enabled
–
220
–
mV
1Typical
data is at VCC = 12 V and TA = 25°C, unless otherwise noted. Performance may vary for individual units, within the specified maximum and
minimum limits.
2 Maximum voltage must be adjusted for power dissipation and junction temperature; see Power Derating section.
3 Power-On Time is the time required to complete the internal Automatic Offset Adjust; the DACs are then ready for peak acquisition.
41 G (gauss) = 0.1 mT (millitesla).
5The device compensates for magnetic and installation offsets. Offsets greater than specification in gauss may cause inaccuracies in the output.
6For power-on S
ROT ≤ 200 rpm, edges are sensed target mechanical edges (see figure Definitions of Terms for Switchpoints).
7Operational Air Gap Range is dependent on the available magnetic field. The available field is target geometry and material dependent and should be
independently characterized. The field available from the Allegro 60-0 reference target is given in the reference target parameter section.
8The repeatability specification is based on statistical evaluation of a sample population, evaluated at 1000 Hz. Repeatability is measured at 150°C
because the lowest signal-to-noise ratio for the VPROC signal occurs at elevated temperatures. Therefore, the worst-case repeatability for the device
will also occur at elevated temperatures.
9Single maximum allowable air gap change in outward direction (increase in air gap).
Definitions of Terms for Switchpoints
Sensed Edgea
Differential Magnetic
Flux Density, BDIFF (G)
+B
Differential Processed
Signal, VProc (V)
Reverse
+V
Tooth
Forward
Valley
BOP(REV)b
b
BOP(FWD)
BRP(REV)
BRP(FWD)
–B
VPROC(BOP)
100 %
VPROC(BRP)
BOP %
BRP %
–V
t
aSensed Edge: leading (rising) mechanical edge in forward rotation, trailing (falling) mechanical edge in reverse rotation
bB
OP(FWD)
triggers the output transition during forward rotation, and BOP(REV) triggers the output transition during reverse rotation
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Reference Target 60-0 (60 Tooth Target)
Characteristics
Symbol
Test Conditions
Typ.
Units
120
mm
Outside diameter of target
Face Width
F
Breadth of tooth, with respect
to branded face
6
mm
Angular Tooth Thickness
t
Length of tooth, with respect
to branded face
3
deg.
Angular Valley Thickness
tv
Length of valley, with respect
to branded face
3
deg.
Tooth Whole Depth
ht
3
mm
–
–
Material
Branded Face
of Package
ØDO
ht
F
t
tV
Do
Outside Diameter
Symbol Key
Low Carbon Steel
Air Gap
Reference Gear Magnetic Gradient Amplitude versus Air Gap
Reference Target 60-0, Hall element spacing 2.20 mm
1000
800
600
400
Branded Face
of Package
200
0
0
1.0
2.0
Reference Target
60-0
3.0
Air Gap (mm)
Reference Gear Magnetic Profile
Reference Target 60-0, Hall element spacing 2.20 mm
600
Air Gap (mm)
400
0.50
0.75
Differential B (G)
Peak-to-Peak Differential B (G)
1200
1.00
200
1.25
1.50
0
1.75
2.00
2.25
200
2.50
2.75
3.00
400
3.00 mm AG
0.50 mm AG
600
0
2
4
6
8
10
12
14
16
18
20
Gear Rotation (°)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Characteristic Performance
Supply Current (Off) versus Ambient Temperature
Supply Current (Off) versus Supply Voltage
14
14
12
12
10
VCC (V)
8
4
12
24
6
ICCOFF (mA)
ICCOFF (mA)
10
4
2
2
0
-50
0
50
100
150
0
20
30
VCC (V)
Supply Current (On) versus Ambient Temperature
Supply Current (On) versus Supply Voltage
14
14
12
12
10
VCC (V)
8
4
12
24
6
ICCON (mA)
ICCON (mA)
10
TA (°C)
10
TA (°C)
–40
25
150
8
6
4
4
2
2
0
0
-50
0
50
100
0
150
10
20
TA (°C)
VCC (V)
Output Voltage versus Ambient Temperature
Duty Cycle versus Air Gap
VCC = 12 V, ILOAD = 10 mA
180
30
Allegro 60-0 Reference Target
52
160
51
140
50
120
49
D (%)
VOUT(SAT) (mV)
6
4
0
TA (°C)
–40
25
150
8
100
80
TA (°C)
–40
25
150
48
47
46
60
45
40
44
20
43
42
0
-50
0
50
TA (°C)
100
150
0
0.5
1.0
1.5
2.0
2.5
3.0
AG (mm)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Symbol
Test Conditions*
Single-sided PCB with copper limited to solder pads
RθJA
Package Thermal Resistance
in.2
Two-sided PCB with copper limited to solder pads and 3.57
(23.03 cm2) of copper area each side, connected to GND pin
Value
Units
126
ºC/W
84
ºC/W
*Additional information is available on the Allegro website.
Maximum Allowable VCC (V)
Power Derating Curve
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
VCC(max)
(RQJA = 84 ºC/W)
(RQJA = 126 ºC/W)
VCC(min)
20
40
60
80
100
120
140
160
180
Temperature (ºC)
Power Dissipation, PD (m W)
Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
(R
QJ
(R
QJ
20
40
60
A
=1
26
ºC
A
=
/W
84
ºC
/W
)
)
80
100
120
Temperature (°C)
140
160
180
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Functional Description
Hall Technology
The ATS667 contains a single-chip differential Hall-effect sensor
IC, a samarium cobalt pellet, and a flat ferrous pole piece (concentrator). As shown in figure 1, the Hall IC supports two Hall
elements, which sense the magnetic profile of the ferrous gear
target simultaneously, but at different points (spaced at a 2.2 mm
pitch), generating a differential internal analog voltage, VPROC,
that is processed for precise switching of the digital output signal.
The Hall IC is self-calibrating and also possesses a temperature compensated amplifier and offset cancellation circuitry. Its
voltage regulator provides supply noise rejection throughout the
operating voltage range. Changes in temperature do not greatly
affect this device due to the stable amplifier design and the offset
compensation circuitry. The Hall transducers and signal processing electronics are integrated on the same silicon substrate, using
a proprietary BiCMOS process.
Target Profiling During Operation
An operating device is capable of providing digital information
that is representative of the mechanical features of a rotating gear.
The waveform diagram in figure 3 presents the automatic translation of the mechanical profile, through the magnetic profile that
it induces, to the digital output signal of the ATS667. No additional optimization is needed and minimal processing circuitry is
required. This ease of use reduces design time and incremental
assembly costs for most applications.
Determining Output Signal Polarity
In figure 3, the top panel, labeled Mechanical Position, represents
the mechanical features of the target gear and orientation to the
device. The bottom panel, labeled IC Output Signal, displays the
square waveform corresponding to the digital output signal that
results from a rotating gear configured as shown in figure 2, and
electrically connected as in figure 6. That direction of rotation (of
the gear side adjacent to the package face) is: perpendicular to
the leads, across the face of the device, from the pin 1 side to the
pin 4 side. This results in the IC output switching from low state
to high state as the leading edge of a tooth (a rising mechanical
edge, as detected by the IC) passes the package face. In this configuration, the device output switches to its high polarity when a
tooth is the target feature nearest to the package. If the direction
of rotation is reversed, so that the gear rotates from the pin 4 side
to the pin 1 side, then the output polarity inverts. That is, the output signal goes high when a falling edge is detected, and a valley
is nearest to the package.
Mechanical Position (Target movement pin 1 to pin 4)
This tooth
sensed earlier
This tooth
sensed later
Target
(Gear)
Target Magnetic Profile
+B
Target (Gear)
Element Pitch
Hall Element 2
Dual-Element
Hall Effect Device
Hall Element 1
Hall IC
Pole Piece
(Concentrator)
South Pole
Back-biasing
Rare-earth Pellet
Case
North Pole
(Pin 4 Side)
(Pin 1 Side)
Figure 1. Relative motion of the target is detected by the dual Hall
elements mounted on the Hall IC.
Package Orientation to Target
Hall Element Pitch
Branded Face
IC
Back-Biasing
SensorPellet
Branded Face
Pin 4
Side
(Package Top View)
Pin 1
Side
IC Internal Differential Analog Signal, VPROC
BOP(#1)
BRP(#1)
BOP(#2)
BRP(#2)
IC Internal Switch State
Branded Face
of Package
Rotating Target
On
Off
On
Off
IC Output Signal, VOUT
1
4
Figure 2. This left-to-right (pin 1 to pin 4) direction of target rotation results
in a high output state when a tooth of the target gear is nearest the
package face (see figure 3). A right-to-left (pin 4 to pin 1) rotation inverts
the output signal polarity.
Figure 3. The magnetic profile reflects the geometry of the target, allowing
the ATS667 to present an accurate digital output response.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Continuous Update of Switchpoints
Switchpoints are the threshold levels of the differential internal
analog signal, VPROC , at which the device changes output signal
state. The value of VPROC is directly proportional to the magnetic flux
density, B, induced by the target and sensed by the Hall elements.
As VPROC rises through a certain limit, referred to as the operate
point, BOP , the output state changes from high to low. As VPROC
falls below BOP to a certain limit, the release point, BRP , the output
state changes from low to high.
(A) TEAG varying; cases such as
eccentric mount, out-of-round region,
normal operation position shift
As shown in panel C of figure 4, threshold levels for the ATS667
switchpoints are established as a function of the peak input signal
levels. The ATS667 incorporates an algorithm that continuously
monitors the input signal and updates the switching thresholds
accordingly with limited inward movement of VPROC. The
switchpoint for each edge is determined by the detection of the
previous two signal edges. In this manner, variations are tracked
in real time.
(B) Internal analog signal, VPROC,
typically resulting in the IC
V+
Smaller
TEAG
IC
Target
Smaller
TEAG
IC
Larger
TEAG
VPROC (V)
Target
Smaller
TEAG
Hysteresis Band
(Delimited by switchpoints)
Larger
TEAG
0
360
Target Rotation (°)
(C) Referencing the internal analog signal, VPROC, to continuously update device response
BOP(#1)
Switchpoint
1
BOP(#1)
BRP(#1)
Pk(#1), Pk(#2)
Pk(#2), Pk(#3)
BOP(#2)
BRP(#2)
Pk(#3), Pk(#4)
Pk(#4), Pk(#5)
2
3
4
BOP(#3)
BRP(#3)
Pk(#5), Pk(#6)
Pk(#6), Pk(#7)
BOP(#4)
Pk(#7), Pk(#8)
BRP(#4)
Pk(#8), Pk(#9)
V+
BOP(#2)
BOP(#3)
BOP(#4)
Pk(#9)
Pk(#1)
Pk(#3)
Pk(#7)
Pk(#5)
VPROC (V)
BHYS
Determinant
Peak Values
VPROC(BOP)(#1)
VPROC(BOP)(#2)
BHYS(#1)
BHYS(#2)
VPROC(BRP)(#1)
Pk(#4)
BHYS(#3)
VPROC(BOP)(#3)
VPROC(BRP)(#2)
VPROC(BOP)(#4)
VPROC(BRP)(#3)
BHYS(#4)
VPROC(BRP)(#4)
Pk(#6)
Pk(#8)
Pk(#2)
BRP(#1)
BRP(#2)
BRP(#3)
BRP(#4)
Figure 4. The Continuous Update algorithm allows the Allegro IC to interpret and adapt to variances in the magnetic field generated by the
target as a result of eccentric mounting of the target, out-of-round target shape, and similar dynamic application problems that affect the TEAG
(Total Effective Air Gap). Not detailed in the figure are the boundaries for peak capture DAC movement which intentionally limit the amount of
inward signal variation the IC is able to react to over a single transition. The algorithm is used to establish and subsequently update the device
switchpoints (BOP and BRP). The hysteresis, BHYS(#x) , at each target feature configuration results from this recalibration, ensuring that it remains
properly proportioned and centered within the peak-to-peak range of the internal analog signal, VPROC.
As shown in panel A, the variance in the target position results in a change in the TEAG. This affects the IC as a varying magnetic field, which
results in proportional changes in the internal analog signal, VPROC, shown in panel B. The Continuous Update algorithm is used to establish
switchpoints based on the fluctuation of VPROC, as shown in panel C.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Start Mode Hysteresis
This feature helps to ensure optimal self-calibration by rejecting
electrical noise and low-amplitude target vibration during
initialization. This prevents AGC from calibrating the IC on such
spurious signals. Calibration can be performed using the actual
target features.
A typical scenario is shown in figure 5. The Start Mode Hysteresis,
POHYS , is a minimum level of the peak-to-peak amplitude of the
internal analog electrical signal, VPROC, that must be exceeded
before the ATS667 starts to compute switchpoints.
Target, Gear
Target Magnetic Profile
BOP(initial)
Differential Signal, VPROC
BRP
Start Mode
Hysteresis, POHYS
BOP
BRP(initial)
IC Position
Relative to Target
Output Signal, VOUT
1
2
3
BOP
4
If exceed POHYS
on high side
If exceed POHYS
on low side
Figure 5. Operation of Start Mode Hysteresis
• At power-on (position 1), the ATS667 begins sampling VPROC.
• At the point where the Start Mode Hysteresis, POHYS , is exceeded, the device establishes an initial switching threshold, by using the Continuous
Update algorithm. If VPROC is falling through the limit on the low side (position 2), the switchpoint is BRP , and if VPROC is rising through the limit on the
high side (position 4), it is BOP . After this point, Start Mode Hysteresis is no longer a consideration. Note that a valid VPROC value exceeding the Start
Mode Hysteresis can be generated either by a legitimate target feature or by excessive vibration.
• In either case, because the switchpoint is immediately passed as soon as it is established, the ATS667 enables switching:
--If on the low side, at BRP (position 2) the output would switch from low to high. However, because output is already high, no output switching occurs.
At the next switchpoint, where BOP is passed (position 3), the output switches from high to low.
--If on the high side, at BOP (position 4) the output switches from high to low.
As this example demonstrates, initial output switching occurs with the same polarity, regardless of whether the Start Mode Hysteresis is exceeded on the
high side or on the low side.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Undervoltage Lockout
When the supply voltage falls below the undervoltage lockout
voltage, VCC(UV) , the device enters Reset, where the output
state returns to the Power-On State (POS) until sufficient VCC
is supplied. ICC levels may not meet datasheet limits when VCC
< VCC(min). This lockout feature prevents false signals, caused
by undervoltage conditions, from propagating to the output of the
IC.
Power Supply Protection
The device contains an on-chip regulator and can operate over a
wide VCC range. For devices that must operate from an unregulated power supply, transient protection must be added externally.
For applications using a regulated line, EMI/RFI protection may
still be required. Contact Allegro for information on the circuitry
needed for compliance with various EMC specifications. Refer
to figure 6 for an example of a basic application circuit.
Automatic Gain Control (AGC)
This feature allows the device to operate with an optimal internal
electrical signal, regardless of the air gap (within the AG specification). At power-on, the device determines the peak-to-peak
amplitude of the signal generated by the target. The gain of the IC
is then automatically adjusted. Figure 7 illustrates the effect of
this feature.
Automatic Offset Adjust (AOA)
The AOA circuitry automatically compensates for the effects of
chip, magnet, and installation offsets. This circuitry is continuously active, including during both power-on mode and running
mode, compensating for any offset drift (within the Allowable
User Induced Differential Offset). Continuous operation also
allows it to compensate for offsets induced by temperature variations over time.
Running Mode Lockout
The ATS667 has a running mode lockout feature to prevent
switching in response to small signals that are characteristic of
vibration signals. The internal logic of the chip considers small
signal amplitudes below a certain level to be vibration. The output is held to the state prior to lockout until the amplitude of the
signal returns to normal operational levels.
Assembly Description
The ATS667 is integrally molded into a plastic body that has
been optimized for size, ease of assembly, and manufacturability.
High operating temperature materials are used in all aspects of
construction.
Ferrous Target
Mechanical Profile
VPULLUP
VCC
V+
RPULLUP
ATS667
1
CBYPASS
0.1 μF
(Required)
VCC
VOUT
2
Internal Differential
Analog Signal
Response, without AGC
AGLarge
AGSmall
GND
4
TEST
3
CL
V+
Internal Differential
Analog Signal
Response, with AGC
Figure 6. Typical circuit for proper device operation.
AGSmall
AGLarge
Figure 7. Automatic Gain Control (AGC). The AGC function corrects for
variances in the air gap. Differences in the air gap cause differences in
the magnetic field at the device, but AGC prevents that from affecting
device performance, as shown in the lowest panel.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Power Derating
The device must be operated below the maximum junction
temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro website.)
The Package Thermal Resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity, K,
of the printed circuit board, including adjacent devices and traces.
Radiation from the die through the device case, RJC, is relatively
small component of RJA. Ambient air temperature, TA, and air
motion are significant external factors, damped by overmolding.
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.


PD = VIN × IIN
(1)
T = PD × RJA
(2)
TJ = TA + ΔT
(3)
Example: Reliability for VCC at TA = 150°C, package SG, using a
single-layer PCB.
Observe the worst-case ratings for the device, specifically:
RJA = 126 °C/W, TJ(max) = 165°C, VCC(max) = 24 V, and
ICC(max) = 12 mA.
Calculate the maximum allowable power level, PD(max). First,
invert equation 3:
Tmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = Tmax ÷ RJA = 15°C ÷ 126 °C/W = 119 mW
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(max) = 119 mW ÷ 12 mA = 9.9 V
The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤ VCC(est).
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then
reliable operation between VCC(est) and VCC(max) requires
enhanced RJA. If VCC(est) ≥ VCC(max), then operation between
VCC(est) and VCC(max) is reliable under these conditions.
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 7.5 mA, and RJA = 126 °C/W, then:
PD = VCC × ICC = 12 V × 7.5 mA = 90 mW

T = PD × RJA = 90 mW × 126 °C/W = 11.3°C
TJ = TA + T = 25°C + 11.3°C = 36.3°C
A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding
TJ(max), at a selected RJA and TA.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Package SG, 4-Pin SIP
5.50±0.05
F
2.20
E
B
8.00±0.05
LLLLLLL
NNN
5.80±0.05
E1
E2
YYWW
Branded
Face
1.70±0.10
D
4.70±0.10
1
2
3
4
= Supplier emblem
L = Lot identifier
N = Last three numbers of device part number
Y = Last two digits of year of manufacture
W = Week of manufacture
A
0.60±0.10
Standard Branding Reference View
0.71±0.05
+0.06
0.38 –0.04
24.65±0.10
For Reference Only, not for tooling use (reference DWG-9002)
Dimensions in millimeters
A Dambar removal protrusion (16X)
B Metallic protrusion, electrically connected to pin 4 and substrate (both sides)
C Thermoplastic Molded Lead Bar for alignment during shipment
0.40±0.10
15.30±0.10
D Branding scale and appearance at supplier discretion
E
Active Area Depth, 0.43 mm
F
Hall elements (E1, E2), not to scale
1.0 REF
A
1.60±0.10
C
1.27±0.10
0.71±0.10
0.71±0.10
5.50±0.10
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
ATS667LSG
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
Revision History
Revision
Current
Revision Date
Rev. 5
April 14, 2011
Description of Revision
Update TθE
Copyright ©2009-2013, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
14
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