A1469 Datasheet

A1469
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
FEATURES AND BENEFITS
DESCRIPTION
• Unique design for robustness against high power EMC
transients
• Peak detection based switching algorithm for large
operating air gaps
• Minimum differential field 20 Gpk-pk
• Running mode calibration for continuous optimization
• Precise duty cycle signal throughout operating
temperature range
• Automatic Gain Control (AGC) for air-gap–independent
switchpoints
• Automatic Offset Adjustment (AOA) for signal
processing optimization
• True zero-speed operation
• Scan and IDDQ for increased test coverage
The A1469 is an optimized Hall effect sensing IC that provides
a user-friendly solution for digital ring-magnet sensing, or
when coupled with a magnet, ferromagnetic target sensing,
in three-wire applications. The small device package can be
easily assembled into applications for use in conjunction with
a wide variety of target shapes and sizes.
PACKAGE:
4-pin SIP (suffix K)
The integrated circuit incorporates dual Hall effect elements
with a 2.2 mm spacing and signal processing that switches
in response to differential magnetic signals created by ringmagnet poles. The circuitry contains a sophisticated digital
circuit to reduce system offsets, to calibrate the gain for airgap–independent switchpoints, and to achieve true zero-speed
operation. Signal optimization occurs at power-on through
the combination of offset and gain adjust, and is maintained
throughout the operating time with the use of a running-mode
calibration. The running-mode calibration provides immunity
to environmental effects such as micro-oscillations of the target
or sudden air gap changes.
The device is ideally suited to obtaining speed and duty cycle
information in ring-magnet–based speed, position, and timing
applications, such as in speedometers.
The A1469 is available in a 4-pin SIP (suffix K) package. The
package is lead (Pb) free, with 100% matte tin leadframe plating.
Not to scale
VCC
E1
Hall
Amplifier
∑
Internal
Regulator
Gain
E2
Automatic Offset
Adjustment (AOA)
Control
AOA DAC
Automatic Gain
Control (AGC)
AGC DAC
Tracking DAC
Peak Hold
OUT
+
–
Current
Limit
Test Signals
TEST
GND
Functional Block Diagram
A1469-DS
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
A1469
SPECIFICATIONS
Selection Guide
Part Number
Package
Packing*
A1469LK-T
4-pin through hole SIP
Bulk, 500 pieces per bag
Operating Ambient
Temperature Range, TA
(°C)
-40 to 150
*Contact Allegro™ for additional packing options.
Absolute Maximum Ratings
Characteristic
Symbol
Forward Supply Voltage
VCC
Reverse Supply Voltage
VRCC
Notes
Rating
Refer to Power Derating Curves chart
Unit
28
V
–18
V
Output Current
IOUT
30
mA
Reverse Output Current
IROUT
–50
mA
Reverse Output Voltage
VROUT
–0.5
V
Output Off Voltage
VOUT
28
V
–40 to 150
ºC
TJ(max)
165
ºC
Tstg
–65 to 170
ºC
Operating Ambient Temperature
TA
Maximum Junction Temperature
Storage Temperature
L temperature range
Pin-out Diagrams and Terminal List Table
Terminal List Table
1
2
3
Name
Number
Function
VCC
1
Supply voltage
VOUT
2
Output
TEST
3
Test pin, float
GND
4
Ground
4
Package K, 4-Pin SIP
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115 Northeast Cutoff
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2
A1469
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
OPERATING CHARACTERISTICS: valid throughout operating voltage and ambient temperature ranges, typical data applies at VCC = 12 V and TA = 25°C; unless otherwise specified
Characteristics
Symbol
Test Conditions
Min.
Typ.
Max.
Unit1
Operating, TJ ≤ 165°C
4
–
26.5
V
VCC = 0 → VCC(min) + 1 V and
VCC(min) + 1 V → 0 V
–
–
VCC(min)
V
3.0
5.0
7.5
mA
Electrical Characteristics
Supply Voltage2
Undervoltage Lockout
Supply Current
VCC
VCC(uv)
ICC
VCC > VCC(min)
Power-On Characteristics
Power-On State
POS
Power-On Time3
tPO
VOUT, connected as in figure 6
–
High
–
V
VCC > VCC(min)
–
–
2.3
ms
Transient Protection Characteristics
Supply Zener Clamp Voltage
VZ(supply)
ICC = ICC(max) + 3 mA, TA = 25 °C
28
–
–
V
Supply Zener Current
IZ(supply)
Vsupply = 28 V
–
–
ICC(max)
+3
mA
VRCC = –18 V, TJ < TJ(max)
–
–
–1
mA
Reverse Supply Current
IRCC
Output Zener Clamp Voltage
VZ(output)
IOUT = 3 mA, TA = 25°C
28
–
–
V
Output Zener Current
IZ(output)
VOUT = 28 V
–
–
3
mA
Output Current Limit
IOUT(lim)
30
–
85
mA
IOUT(sink) = 20 mA
–
220
400
mV
VOUT = 24 V, output off
–
–
10
µA
RPU = 1 kΩ, VPU = 20 V, COUT = 10 pF
–
2
–
µs
20
–
1200
G
–
120
–
mV
3
–
10
G
–
120
–
mV
Output Stage Characteristics
Output Saturation Voltage
Output Leakage Current
Output Fall Time
VOUT(sat)
IOFF
tf
Performance Characteristics
Operating Magnetic Signal Range
BDIFF
Peak-to-peak of differential signal; operation
within specification
Operate Point4
BOP
See figure 5
Release Point4
BRP
Operating Frequency
fOP
Analog Signal Bandwidth
BW
ncal
Initial Calibration Cycle5
See figure 5
3
–
10
G
0
–
10
kHz
Equivalent to f = –3 dB
20
–
–
kHz
Output rising edges before calibration is
completed, 0 offset, fOP ≤ 200 Hz
–
–
3
edge
Output Duty Cycle Precision
DOUT
Using a pure sine magnetic signal, with fOP and
BDIFF within specification
–
–
±15
%
Output Period Precision
TOUT
Using pure sine magnetic signal with
BDIFF = 50 Gpk-pk and fOP = 1 kHz
–
0.3
–
%
Output switching only
–
–
±100
G
Allowable User Induced Differential
Offset
BDIFFEXT
11 G
(gauss) = 0.1 mT (millitesla).
voltage operation must not exceed maximum junction temperature. Refer to Power Derating Curves chart.
3Time required to initialize device. Power-On Time includes the time required to complete the internal automatic offset adjust. The DAC is then ready for peak acquisition.
4Values in G are based on device in maximum gain setting.
5Non-uniform magnetic profiles may require additional output pulses before calibration is complete.
2Maximum
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115 Northeast Cutoff
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3
A1469
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
Thermal Characteristics may require derating at maximum conditions, see application information
Characteristic
Symbol
Package Thermal Resistance
Test Conditions*
RθJA
On single-layer PCB with copper limited to solder pads
Value
Unit
177
ºC/W
*Additional thermal information available on the Allegro website.
Maximum Allowable VCC (V)
Power Derating Curves
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
VCC(max)
177ºC/W
VCC(min)
20
40
60
80
100
120
140
160
180
Ambient Temperature, TA (ºC)
Power Dissipation versus Ambient Temperature
900
Power Dissipation, PD (mW)
800
700
600
500
177 °C/W
400
300
200
100
0
20
40
60
80
100
120
140
160
180
Ambient Temperature, TA (ºC)
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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4
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
A1469
CHARACTERISTIC PERFORMANCE
Supply Current (Output On) versus Temperature
7
6
Supply Current, Icc (mA)
6
Supply Current, Icc (mA)
Supply Current (Output On) versus Supply Voltage
7
5
4
Vcc (V)
3
4
2
12
1
5
4
TA (°C)
3
-40
25
2
85
1
26.5
150
0
0
-50
-25
0
25
50
75
100
125
0
150
5
Ambient Temperature,( TA °C)
25
30
6
Supply Current, Icc (mA)
Supply Current, Icc (mA)
20
Supply Current (Output Off) versus Supply Voltage
7
6
5
4
Vcc (V)
3
4
2
12
1
-50
-25
0
25
50
75
100
125
5
4
TA (°C)
3
-40
25
2
85
1
26.5
0
150
0
150
0
5
Ambient Temperature, TA (°C)
Output Saturation Voltage versus Temperature
500
IOUT(mA)
450
10
15
20
25
400
350
300
250
200
150
100
50
0
-50
-25
0
25
50
75
100
Ambient Temperature, TA (°C)
10
15
20
25
30
Supply Voltage, Vcc (V)
Output Saturation Voltage, VOUT(sat) (V)
Output Saturation Voltage, VOUT(sat) (V)
15
Supply Voltage, Vcc (V)
Supply Current (Output Off) versus Temperature
7
10
125
150
Output Saturation Voltage versus Output Current
500
TA (°C)
450
400
-40
350
25
300
85
250
150
200
150
100
50
0
0
5
10
15
20
25
30
Output Current, I OUT(mA)
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115 Northeast Cutoff
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5
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
A1469
Output Fall Time versus Temperature
Output Fall Time, t f (µs)
3
2.5
2
1.5
1
IOUT (mA)
10
0.5
20
0
-25
0
25
50
75
100
Ambient Temperature, TA (°C)
125
150
Output Duty Cycle Precision versus Temperature
at Air Gap* = 3mm
16
fOP (Hz)
14
20
500
1000
2000
12
10
8
6
4
2
0
-50
-25
0
25
50
75
100
Output Duty Cycle Precision versus Frequency
at Air Gap* = 3mm
16
Output Duty Cycle Precision, DOUT (%)
Output Duty Cycle Precision, DOUT (%)
-50
125
14
TA (°C)
12
-40
10
25
8
85
6
150
4
2
0
150
0
Output Duty Cycle Precision versus Air Gap*
at TA = 25°C
16
14
fOP (Hz)
12
20
500
1000
2000
10
8
6
4
2
0
0
1
2
Air Gap (mm)
3
4
Output Duty Cycle Precision, DOUT (%)
Output Duty Cycle Precision, DOUT (%)
Ambient Temperature, TA (°C)
500
1000
1500
Operating Frequency, fOP (Hz)
2000
Output Duty Cycle Precision versus Frequency
at TA = 25°C
16
Air Gap*(mm)
14
0.5
1.0
1.5
2.0
2.5
3.0
3.5
12
10
8
6
4
2
0
0
500
1000
1500
2000
Operating Frequency, fOP (Hz)
*Air
*Air gap
gapdefined
defined as
asthe
thedistance
distancebetween
between the
the front
front face of
of the
the A1468
A1469 package
packageand
andthe
theAllegro
AllegroReference
ReferenceTarget
Target 60-0
60-0 ring
ring magnet
magnet.
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115 Northeast Cutoff
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6
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
A1469
CHARACTERISTIC ALLOWABLE AIR GAP MOVEMENT
Allowable Air Gap Movement from TEAGCAL*
2.0
∆TEAGOUT (mm)
1.5
1.0
0.5
0
-0.5
-1.0
0
0.5
1.0
1.5
2.0
∆TEAGIN (mm)
2.5
3.0
3.5
*Data based on study performed using Allegro Reference
Target 60-0 ring magnet, and applicable to ring magnet
targets with similar magnetic characteristics.
The colored area in the chart above shows the region of allowable air gap movement within which the device will continue
output switching. The output duty cycle is wholly dependent on
the target’s magnetic signature across the air gap range of movement, and may not always be within specification throughout the
entire operating region (to AG(OPmax)).
panel a) within the range defined by an increase of ΔTEAGOUT =
0.35 mm (shown in panel b), and a decrease of ΔTEAGIN =
0.65 mm (shown in panel c). This case is plotted with an “x” in
the chart above.
Please note that after extreme cases of decrease in air gap, the
device may not switch when the air gap resumes the nominal
value. For example, if ΔTEAGIN = 2.75 mm, the chart shows
ΔTEAGOUT = –0.5 mm, meaning that the device can now switch
only in the air gap range of 0.5 to 2.75 mm inward from the
nominal air gap.
The axis parameters for the chart are defined in the drawings
below. As an example, assume the case where the air gap is
allowed to vary from the nominal installed air gap (TEAGCAL ,
(a)
(b)
A1469
TEAG
(c)
A1469
TEAG
CAL
TEAG
IN
OUT
A1469
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115 Northeast Cutoff
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A1469
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
FUNCTIONAL DESCRIPTION
Sensing Technology
The single-chip differential Hall effect sensor IC possesses two
Hall elements, which sense the magnetic profile of the ring magnet simultaneously, but at different points (spaced at a 2.2 mm
pitch), generating a differential internal analog voltage, VPROC ,
that is processed for precise switching of the digital output signal.
The Hall IC is self-calibrating and also possesses a temperature
compensated amplifier and offset compensation circuitry. Its
voltage regulator provides supply noise rejection throughout the
operating voltage range. Changes in temperature do not greatly
affect this device due to the stable amplifier design and the offset
compensation circuitry. The Hall transducers and signal processing electronics are integrated on the same silicon substrate, using
a proprietary BiCMOS process.
Target Profiling
An operating device is capable of providing digital information
that is representative of the magnetic features on a rotating target.
The waveform diagram shown in Figure 3 presents the automatic
translation of the magnetic profile to the digital output signal of
the device.
Output Polarity
Figure 3 shows the output polarity for the orientation of target
and device shown in Figure 2. The target direction of rotation
shown is: perpendicular to the leads, across the face of the device,
from the pin 1 side to the pin 4 side. This results in the device
output switching from low to high as the leading edge of a north
magnetic pole passes the device face. In this configuration, the
device output voltage switches to its high polarity when a north
pole is the target feature nearest to the device. If the direction of
rotation is reversed, then the output polarity inverts.
Target
(Ring Magnet)
S
S
N
N
Element Pitch
Hall Element 2
Hall Element 1
Hall IC
Branded Face
Rotating
Target
(Pin
4 Side)
(Pinof1LSide)
Package
Figure 1: Relative
Motion
of the Target
N S
S NS
N
N
S
The relative motion of the target is detected by the dual Hall elements
Pin Hall
1
mounted on the
IC. Pin 4
Branded Face
of K Package
Rotating Target
S
N
S N
S NS
Pin 1
N
Pin 4
Figure 2: Target Rotation
This left-to-right (pin 1 to pin 4) direction of target rotation results
in a high output signal when a target north pole is nearest the face
of the device (see Figure 3). A right-to-left (pin 4 to pin 1) rotation
inverts the output signal polarity.
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8
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
A1469
VPROC = LEFT-RIGHT
S
N
S
Left
Right
pin 4
pin 1
OUTPUT
TIME
VPROC = LEFT-RIGHT
S
N
S
Left
Right
pin 4
pin 1
OUTPUT
TIME
VPROC = LEFT-RIGHT
S
N
S
Left
Right
pin 4
pin 1
OUTPUT
TIME
VPROC = LEFT-RIGHT
S
N
Left
pin 1
S
Right
pin 4
OUTPUT
TIME
Figure 3: Output Profile of a Ring Magnet Target for the Polarity Indicated in Figure 2
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A1469
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
Automatic Gain Control (AGC)
This feature allows the device to operate with an optimal internal
electrical signal, regardless of the differential signal amplitude
(within the BDIFF and BDIFFEXT specifications). During calibration, the device determines the peak-to-peak amplitude of the
signal generated by the target. The gain of the device is then automatically adjusted. Figure 4 illustrates the effect of this feature.
During running mode, the AGC continues to monitor the system
amplitude, reducing the gain if necessary; see the Device Operation section for more details.
Target
Ring Magnet
Digital Peak Detection
A digital DAC tracks the internal analog voltage signal, VPROC,
and is used for holding the peak value of the internal analog
signal. In the example shown in Figure 5, the DAC would first
track up with the signal and hold the upper peak’s value. When
VPROC drops below this peak value by BOP , the device hysteresis, the output would switch and the DAC would begin tracking
the signal downward toward the negative VPROC peak. After the
DAC acquires the negative peak, the output will again switch
states when VPROC is greater than the peak by the value BRP . At
this point, the DAC tracks up again and the cycle repeats. The
digital tracking of the differential analog signal allows the device
to achieve true zero-speed operation.
S
N
S
Internal Differential
Analog Signal
Response, without AGC
AGLarge
AGSmall
V+
Automatic Offset Adjust (AOA)
The AOA is patented circuitry that automatically compensates for
the effects of chip, magnet, and installation offsets. This circuitry
is continuously active, including both during calibration mode
and running mode, compensating for offset drift. Continuous
operation also allows it to compensate for offsets induced by
temperature variations over time.
N
V+
Internal Differential
Analog Signal
Response, with AGC
AGSmall
AGLarge
Figure 4: Automatic Gain Control (AGC)
The AGC function corrects for variances in the air gap. Differences in
the air gap affect the magnetic gradient, but AGC prevents that from
affecting device performance, as shown in the lowest panel.
V+
Internal
Differential
Analog Signal,
VPROC
0
BOP
BOP
BRP
BRP
V–
VCC
Device Output,
VOUT
VOUT(sat)
Figure 5: Differential Signal Peaks
The peaks in the resulting differential signal are used to set the
operate (BOP ) and release (BRP ) switchpoints.
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A1469
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
Power Supply Protection
The device contains an on-chip regulator and can operate
throughout a wide VCC range. For devices that must be operated
from an unregulated power supply, transient protection must
be added externally. For applications using a regulated line,
EMI/ RFI protection may still be required. Contact Allegro for
information on the circuitry required for compliance with various
EMC specifications. Refer to figure 6 for an example of a basic
application circuit.
Undervoltage Lockout
When the supply voltage falls below the undervoltage lockout
voltage, VCC(uv) , the device enters Reset, where the output state
returns to the Power-On State (POS) until sufficient VCC
is supplied.
track the VPROC signal. After power-on, there are conditions that
could induce a change in the output state. Such an event could be
caused by thermal transients, but would require a static applied
magnetic field, proper signal polarity, and particular direction and
magnitude of internal signal drift.
INITIAL OFFSET ADJUST
The device initially cancels the effects of chip, magnet, and
installation offsets. After offsets have been cancelled, the device
is ready to provide the first output switch. The period of time
required for both Power-On and Initial Offset Adjust is defined as
the Power-On Time.
CALIBRATION MODE
Assembly Description
This device is integrally molded into a plastic body that has been
optimized for size, ease of assembly, and manufacturability. High
operating temperature materials are used in all aspects of construction.
Device Operation
Each operating mode is described in detail below.
The calibration mode allows the device to automatically select
the proper signal gain and continue to adjust for offsets. The
AGC is active, and selects the optimal signal gain based on the
amplitude of the VPROC signal. Following each adjustment to the
AGC DAC, the Offset DAC is also adjusted to ensure the internal
analog signal is properly centered.
During this mode, the tracking DAC is active and output switching occurs, but the duty cycle is not guaranteed to be within
specification.
RUNNING MODE
POWER-ON
When power (VCC > VCC(min)) is applied to the device, a short
period of time is required to power the various portions of the
IC. During this period, the A1469 powers-on in the high voltage
state, VOUT(high), and the digital tracking DAC gets ready to
After the Initial Calibration period, CI, establishes a signal gain,
the device moves to running mode. During running mode, the
device tracks the input signal and gives an output edge for every
peak of the signal. AOA remains active to compensate for any
offset drift over time.
Vsupply
RPU
1 kΩ
VCC
CBYP
0.1 µF
A1469
TEST
OUT
GND
VOUT
COUT
Figure 6: Typical Application Diagram
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Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
A1469
The A1469 incorporates an algorithm for adjusting the signal gain
during running mode. This algorithm is designed to optimize the
VPROC signal amplitude in instances where the magnetic signal
“seen” during the calibration period is not representative of the
amplitude of the magnetic signal for the installed device air gap
1
2
(see Figure 7). Note that in this mode, the gain can be reduced but
not increased, so this algorithm applies only to instances in which
the magnetic signal amplitude during running is higher than that
during calibration.
3
4
5
BOP
Internal Differential
Signal, VPROC
BOP
BRP
BRP
Device Electrical
Output, VOUT
Figure 7: Operation of Running Mode Gain Adjust
• Position1. The device is initially powered-on. Self-calibration occurs.
• Position 2. Small amplitude oscillation of the target sends an erroneously small differential signal to the device. The amplitude of VPROC is
greater than the switching hysteresis (BOP and BRP), and the device output switches.
• Position 3. The calibration period completes on the third rising output edge, and the device enters running mode.
• Position 4. True target rotation occurs and the correct magnetic signal is generated for the installation air gap. The established signal gain
is too large for the target rotational magnetic signal at the given air gap.
• Position 5. Running mode calibration corrects the signal gain to an optimal level for the installation air gap.
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115 Northeast Cutoff
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12
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
A1469
Power Derating
The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro MicroSystems Web site.)
The Package Thermal Resistance, RθJA, is a figure of merit summarizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity, K,
of the printed circuit board, including adjacent devices and traces.
Radiation from the die through the device case, RθJC, is relatively
small component of RθJA. Ambient air temperature, TA, and air
motion are significant external factors, damped by overmolding.
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD. PD = VIN × IIN ΔT = PD × RθJA TJ = TA + ΔT
A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max) , ICC(max)), without exceeding
TJ(max), at a selected RθJA and TA.
Example: Reliability for VCC at TA = 150°C, package K, using
minimum-K PCB.
Observe the worst-case ratings for the device, specifically: RθJA = 177°C/W, TJ(max) = 165°C, VCC(max) = 26.5 V, and
ICC(max) = 7.5 mA.
Calculate the maximum allowable power level, PD(max). First,
invert equation 3:
ΔTmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = ΔTmax ÷ RθJA = 15°C ÷ 177 °C/W = 85 mW
Finally, invert equation 1 with respect to voltage:
(1)
VCC(est) = PD(max) ÷ ICC(max) = 85 mW ÷ 7.5 mA = 11.3 V
(2)
The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤VCC(est).
(3)
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 5 mA, and RθJA = 177 °C/W, then:
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then
reliable operation between VCC(est) and VCC(max) requires
enhanced RθJA. If VCC(est) ≥ VCC(max), then operation between
VCC(est) and VCC(max) is reliable under these conditions.
PD = VCC × ICC = 12 V × 5 mA = 60 mW
ΔT = PD × RθJA = 60 mW × 177 °C/W = 10.6°C
TJ = TA + ΔT = 25°C + 10.6°C = 35.6°C
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
A1469
PACKAGE OUTLINE DIAGRAM
For Reference Only - Not for Tooling Use
(Reference DWG-9010)
Dimensions in millimeters - NOT TO SCALE
Dimensions exclusive of mold flash, gate burs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
B
45°
5.21
+0.08
–0.05
E
2.20
1.55 ±0.05
E
1.50
D
Mold Ejector
Pin Indent
1.32 E
3.43
+0.08
–0.05
E1
45°
Branded
Face
E2
1
2
3
4
2.16 MAX
0.84 REF
NNNN
YYWW
A
0.41
+0.07
–0.05
+0.06
0.38
–0.03
1
1.27 NOM
C
Standard Branding Reference View
N = Device part number
Y = Last two digits of year of manufacture
W = Week of manufacture
14.73 ±0.51
A
Dambar removal protrusion (8X)
B
Gate and tie burr area
C
Branding scale and appearance at supplier discretion
D
Active Area Depth, 0.42 mm
E
Hall elements (E1 and E2), not to scale
Figure 8: Package K, 4-Pin SIP
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
14
A1469
Three-Wire True Zero-Speed Differential Peak-Detecting
Sensor IC with Continuous Calibration
Revision History
Revision
Current
Revision Date
–
January 21, 2015
Description of Revision
Initial Release
Copyright ©2011-2015, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
15
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