DESIGN FEATURES Micropower Precision Oscillator Draws Only 60µA at 1MHz by Albert Huntington Device Description The LTC6906 is a part of Linear Technology’s line of resistor controlled SOT-23 oscillators. These resistor controlled oscillators use a single inexpensive external resistor to accurately set the oscillator frequency, and there is a simple linear relationship between the resistor value and the output frequency. The LTC6906 uses an innovative low power architecture with a master oscillator running between 100kHz and 1MHz. A three state, divide pin is provided which can engage an internal divider to decrease the output frequency by a factor of 1, 3 or 10 Linear Technology Magazine • September 2005 to provide a total frequency range of 10kHz to 1MHz. For increased accuracy at the lower end of the frequency range with very low bias currents, a guard pin is provided for the frequency setting resistor input. The master oscillator frequency is set by an external resistor connected between the SET pin and ground. The LTC6906 maintains the SET pin at approximately 650mV above ground, with a tempco of –2.2mV/°C. The master oscillator frequency is related to the SET resistor by: fMASTER 100kΩ = 1MHz • , RSET and is related only to the resistance on the SET pin, without regard to the exact SET pin current or voltage. Low Power Dissipation The LTC6906 uses only 10µA when running at 100kHz (Figure 2). There are three components to this current draw. A static bias current of about 5µA is used by the internal reference and bias circuits. A variable bias current of about 6 times the current in the SET resistor is used to power and bias the internal oscillator. A load current related to the load capacitance, power supply voltage and load resistance makes up the remainder of the dissipation equation. An approxi90 CL = 5pF TA = 25°C 80 70 + V = 3.6V 60 50 V+ = 2.25V 40 30 20 10 0 0 200 400 600 800 FREQUENCY (kHz) 1000 NO DECOUPLING CAPACITOR NEEDED LTC6906 2.25V TO 3.6V ÷10 ÷3 ÷1 1200 Figure 2. The LTC6906 has extremely low power dissipation. V+ OUT GND GRD DIV SET 10kHz TO 1MHz RSET 100k TO 1M Figure 1. The LTC6906 requires only a single external resistor. mate expression for the total supply current is: ISUPPLY = 5µA + 6 • ISET + V+ V+ • FOUT • (CLOAD + 5pF ) + . 2 • RLOAD Figure 3 shows the relative magnitudes of these three components over the frequency range in the case of a load capacitance of 5pF, with no resistive load. Note that power dissipated in the load ranges from 25% to over 40% of the total power from 100kHz to 1MHz operation. Any lessening in the load capacitance or resistance can have dramatic effects on the load current portion of the power supply dissipation. Power dissipation as low at 7µA at 100kHz is achievable with light output loading. Decreasing the power supply voltage also reduces the power dissipated into the load. CONTRIBUTION TO POWER DISSIPATION (%) Traditionally, electronic clocks use quartz crystals, ceramic resonators, or discrete R, L or C elements as a timing reference, but each of these designs has several drawbacks that make them unsuitable for a variety of applications. Quartz crystals and ceramic resonators can be power-hungry, and their accuracy is subject to environmental stress. Crystal oscillators have the additional disadvantage of being susceptible to damage from shock or vibration. RC oscillators have poor jitter and accuracy, or require expensive precision components. A more robust, and compact alternative to all of these is an all silicon clock, such as the LTC6906 micropower, resistor-controlled oscillator. The LTC6906 is a monolithic silicon oscillator with significant size, power, cost and environmental sensitivity advantages over other oscillators, and it requires only a single external resistor to set the frequency over its full range of 10kHz to 1MHz (Figure 1). Its 0.65% accuracy and jitter as low as 0.03% make it an excellent choice for precision applications, and the power and size advantages let the LTC6906 fit in designs where a crystal oscillator could never go. POWER SUPPLY CURRENT (µA) Introduction 60 50 STATIC BIAS 40 30 SET CURRENT 20 LOAD CURRENT 10 0 V+ = 3V TA = 25°C 0 200 800 400 600 SET RESISTOR (kΩ) 1000 1200 Figure 3. Percentage contributions to power dissipation of static bias, set current and load currents. Data was taken at 3V, 25ºC ambient temperature. 17 DESIGN FEATURES Choosing a SET Resistor The choice of a SET resistor is guided by the desired frequency output. The part is specified for master oscillator frequencies between 100kHz and 1MHz, with possible DIV ratios of 1, 3 and 10. These DIV ranges overlap, and some frequencies have multiple valid combinations of DIV and SET resistor values. The lowest power dissipation for a given frequency is always obtained by setting the SET resistor as high as possible and DIV as low as possible. Generating 100kHz using DIV = 10 and RSET = 100kΩ dissipates much more power than using DIV = 1 and RSET = 1000kΩ. The following equation relates the desired master oscillator frequency to the RSET value: RSET = 1MΩ 100kHz ; • N FOUT where N is the divider ratio chosen of 1,3 or 10, RSET is the SET resistor value and fOUT is the desired output frequency. For example, see Table 1 for valid RSET values to generate a 100kHz output frequency at the three DIV settings. It is apparent from the table that, depending on the DIV pin setting, the current for a particular output frequency could vary by a factor of up to 4.5. There are tradeoffs to choosing the largest possible SET resistor and the smallest possible value of DIV. Jitter increases at the smaller DIV values, and frequency accuracy may suffer Table 1. RSET values for 100kHz Divider RSET Value Setting N 18 Approximate Supply Current 1 1MΩ 10µA 3 333.33KΩ 20µA 10 100kΩ 45µA 80 additional leakage from long traces, it is recommended that the SET resistor be located as close as possible to the SET pin, and on the same side of the PC board as the LTC6906. V+ = 2.7V 70 POWER SUPPLY CURRENT (µA) Engaging the internal divider has larger effects on power dissipation where the load current is higher at higher frequencies, but little effect where the internal bias currents dominate at lower master oscillator frequencies, as illustrated in Figure 4. 60 ÷1 50 ÷3 40 ÷10 Long Term Drift of Silicon Oscillators 30 20 10 0 0 200 400 600 800 RSET (Ω) 1000 1200 Figure 4. The LTC6906 power supply current vs DIV pin setting. All data taken at 3V supply, 5pF load. more with high RSET values due to leakage at the SET pin, especially at higher temperatures. Layout Considerations The LTC6906 is capable of frequency accuracy of <0.65% over the commercial temperature range, and for best accuracy, care must be exercised to limit board leakage around the RSET pin. A 1GΩ parasitic resistance to ground can change the frequency by 0.1%, and the same resistance to the positive supply could increase that to 0.3%. A guard pin which is weakly driven to the same DC voltage as the SET pin has been provided, and the guard signal should be routed completely around the SET pin, on the same side of the PC board as the device, and should have no soldermask (see Figure 5 ). The guard ring is not be necessary in all applications, especially those with lower values of SET resistor and excellent assembly practices. The majority of board leakage problems occur due to insufficient cleaning of flux from the board or from sloppy assembly. With perfectly clean assembly, the guard ring is completely unnecessary. The LTC6906 uses a switched current to drive the SET resistor, so there may be some noise visible on the SET line. Although this noise does not contribute to jitter on the output signal, it can influence the frequency accuracy in the presence of parasitic capacitance on the SET pin. Because of this sensitivity to parasitic capacitance and because of the danger of Long-term stability of silicon oscilla r , which is tors is specified in ppm/√kH typical of other silicon devices such as operational amplifiers and voltage references. Because drift in silicon-based oscillators is generated primarily by movement of ions in the silicon, most of the drift is accomplished early in the life of the device and the drift can be expected to level off in the long term. The ppm/√kHr unit models this time variant decay. Crystal oscillators are occasionally specified with drift measured in ppm/year. This measurement models a different drift mechanism, and the decay profile is not the same. A comparison of various drift rates over a five year time period is shown in Figure 6. When calculating the amount of drift to be expected, it is important to consider the entire time in the calculation, because the relationship to time is not linear. The drift for 5 years is not 5 times the drift for one year. A sample calculation for drift over 5 years at 300ppm/√kHr is as follows: 5 years • 365.25 days/year • 24 hours/day = 43,830 hours = 43.830kHr 43.830kHr = 6.62 kHr 6.62 kHr • 300ppm = 0.198% over 5 years kHr LTC6906 1 OUT V+ 6 GRD 2 GND 3 DIV RSET 5 SET 4 NO SOLDER MASK OVER THE GUARD RING GUARD RING NO LEAKAGE CURRENT LEAKAGE CURRENT Figure 5. The GRD ring should be routed on the same side of the PC board as the LTC6906, and should have the solder mask removed. Linear Technology Magazine • September 2005 DESIGN FEATURES 0.45 0.4 0.35 600ppm/√kHr DRIFT (%) 0.3 0.25 0.2 300ppm/√kHr 0.15 0.1 100ppm/√kHr 0.05 0 0 20 40 60 OPERATING TIME (MONTHS) 80 Figure 6. Comparison of 5-year drift at 100ppm/√kHr, 300ppm/√kHr and 600 ppm/√kHr Drift calculations assume that the part is in continuous operation during the entire time period of the calculation. The movements of ions which results in drift is usually aided by electric fields in the operating parts, and drift is substantially lower if the parts are not powered up during the entire period of drift. Conservative calculations would use a tenth of the drift specification for time when power is not applied to the part. Switching the DIV Pin The DIV input pin on the LTC6906, similar in many ways to the DIV pin on other LTC silicon oscillators, is a three state input, capable of resolving three different states: high, open and low. Three state input pins allow greater functionality in low pin-count packages, and are compatible with the tri-state outputs of many microcontrollers. Static configuration is easily accomplished by tying the pin to either the positive supply or ground, or leaving it floating. In the OPEN state, the DIV pin of the LTC6906 is reasonably immune to noise commonly found on PC boards, but care should be taken to avoid routing a long floating trace off the pin, or routing the pin driving that trace next to a line with strong AC signals. The noise immunity of the DIV pin can be easily improved by adding a capacitor to ground, or a series resistor of up to 100kΩ placed near the DIV pin. In normal operation, the DIV pin uses a small current of about 1µA to pull the DIV pin voltage close to half of the power supply voltage. Therefore, if the pin is left open, any extra capacitance on the pin slows its settling to the OPEN state. Applications that use the DIV pin to switch frequency in real time need to take into account that, because it is designed for low power operation, the DIV pin buffer circuit is slow, with delays up to around 12µs between activation of the DIV pin and changes in the output of the LTC6906. This switching delay must be accounted for in the application, or an external frequency divider can be substituted for the internal frequency divider in order to decrease the frequency change response time. Manipulating the SET Pin The LTC6906 can be configured in applications where the SET resistor needs to be changed for operation at different frequencies. When changing the SET resistor, best performance and accuracy is obtained by placing the switching mechanism between the set resistor and GND, not between the set resistor and the SET pin (see Figure 7). LTC6906 V+ V+ OUT GND GRD DIV SET 1MHz TO 100kHz 100k VMOD 0V TO 0.65V 1M Figure 8. Modulating the SET pin current through a resistor provides greater immunity to noise coupling. LTC6906 V+ V+ OUT GND GRD DIV SET 1MHz TO 100kHz 100k 1M Figure 7. Switching in different SET resistors The SET pin is sensitive to interference from external capacitance or signals, and isolation through the SET resistor reduces this sensitivity. The LTC6906 is not ideally suited to current modulation through the SET pin because in order to save power, the voltage on the SET pin is not regulated over temperature or load. This results in the modulation of the frequency being a function of the set pin voltage as well as the set pin current. The frequency can still be modulated through the SET pin, but the relationship between the modulation current or voltage and the output frequency is not very accurate since it depends on the poorly defined SET pin voltage. The circuit in Figure 8 shows a modulation method that results in low jitter and stable performance. By modulating the SET pin current through a resistor, the effects of parasitic capacitance on the initial frequency accuracy are reduced. Conclusion The LTC6906 is a micropower oscillator with 0.65% accuracy and very low jitter. Its small size, simple configuration and extremely low power consumption make it ideal for low power applications driving microcontrollers, FPGAs and providing a clock reference for battery powered devices. Authors can be contacted at (408) 432-1900 LTC3456, continued from page 16 Conclusion The LTC3456 is a complete system power management IC that seamlessly manages power flow between an AC adapter, USB cable and 2-AA battery supply. A host of features, including Linear Technology Magazine • September 2005 an integrated USB power manager, high efficiency DC-DC converters, a Hot Swap controller and a Low-Battery Indicator, are squeezed into a 4mm × 4mm QFN package. The external components count and overall system cost are minimized. Simplicity, design flexibility, a high level of integration and small size makes LTC3456 an ideal choice for powering many portable USB devices. 19