Data Sheet

D2
PA
K
BUK6C2R1-55C
N-channel TrenchMOS intermediate level FET
Rev. 3 — 18 January 2012
Product data sheet
1. Product profile
1.1 General description
Intermediate level gate drive N-channel enhancement mode Field-Effect Transistor (FET)
in a plastic package using TrenchMOS technology. This product has been designed and
qualified to the appropriate AEC standard for use in high-performance automotive
applications.
1.2 Features and benefits
 AEC Q101 compliant
 High current handling capability, up to
320 A
 Low conduction losses due to very low
on-state resistance
 Suitable for standard and logic level
gate drive sources
 Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
 12 V automotive systems
 Start-Stop micro-hybrid applications
 Electric and electro-hydraulic power
steering
 Transmission control
 Motors, lamps and solenoids
 Ultra high performance power
switching
1.4 Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
55
V
ID
drain current
VGS = 10 V; Tmb = 25 °C;
see Figure 1
-
-
228
A
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
-
300
W
VGS = 10 V; ID = 90 A;
Tj = 25 °C;
see Figure 11
-
1.9
2.3
mΩ
Static characteristics
RDSon
drain-source on-state
resistance
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
Table 1.
Symbol
Quick reference data …continued
Parameter
Conditions
Min
Typ
Max
Unit
ID = 180 A; VDS = 44 V;
VGS = 10 V;
see Figure 13;
see Figure 14
-
79
-
nC
ID = 120 A; Vsup ≤ 55 V;
RGS = 50 Ω; VGS = 10 V;
Tj(init) = 25 °C; unclamped
-
-
770
mJ
Dynamic characteristics
QGD
gate-drain charge
Avalanche ruggedness
EDS(AL)S
non-repetitive
drain-source
avalanche energy
2. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
G
gate
2
S
source
3
S
source
4
D
drain[1]
5
S
source
6
S
source
123 567
7
S
source
SOT427 (D2PAK)
mb
D
mounting base;
connected to drain
[1]
Simplified outline
Graphic symbol
mb
D
G
mbb076
S
4
It is not possible to connect to pin 4 of the SOT427 package.
3. Ordering information
Table 3.
Ordering information
Type number
BUK6C2R1-55C
BUK6C2R1-55C
Product data sheet
Package
Name
Description
D2PAK
plastic single-ended surface-mounted package (D2PAK); 7 leads SOT427
(one lead cropped)
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
Version
© NXP B.V. 2012. All rights reserved.
2 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
gate-source voltage
VGS
drain current
ID
Min
Max
Unit
-
55
V
Pulsed
[1]
-20
20
V
DC
[2]
-16
16
V
Tmb = 25 °C; VGS = 10 V; see Figure 1
-
228
A
Tamb = 100 °C; VGS = 10 V;
see Figure 1
-
162
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs;
see Figure 3
-
914
A
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
300
W
Tstg
storage temperature
-55
175
°C
Tj
junction temperature
-55
175
°C
Source-drain diode
IS
source current
Tmb = 25 °C
-
228
A
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
-
914
A
ID = 120 A; Vsup ≤ 55 V; RGS = 50 Ω;
VGS = 10 V; Tj(init) = 25 °C; unclamped
-
770
mJ
Avalanche ruggedness
non-repetitive drain-source
avalanche energy
EDS(AL)S
[1]
Accumulated pulse duration not to exceed 5mins.
[2]
-16V accumulated duration not to exceed 168 hrs.
003aaf964
250
ID
(A)
03na19
120
Pder
(%)
200
80
150
100
40
50
0
0
0
Fig 1.
50
100
150
200
Tmb (°C)
Continuous drain current as a function of
mounting base temperature
BUK6C2R1-55C
Product data sheet
0
50
100
150
200
Tmb (°C)
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
3 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
003aaf965
104
ID
(A)
103
Limit RDSon = VDS / ID
tp =10 μ s
10
2
100 μ s
10
1 ms
DC
10 ms
1
100 ms
10-1
10-1
Fig 3.
1
102
10
103
V DS (V)
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance from junction to mounting base
see Figure 4
-
-
0.5
K/W
003aaf930
1
Zth(j-mb)
(K/W)
δ = 0.5
0.2
10-1
0.1
0.05
0.02
δ=
P
10-2
tp
T
single shot
t
tp
T
10-3
10-6
Fig 4.
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK6C2R1-55C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
4 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
6. Characteristics
Table 6.
Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
55
-
-
V
ID = 250 µA; VGS = 0 V; Tj = -55 °C
50
-
-
V
VGS(th)
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 9; see Figure 10
1.8
2.3
2.8
V
VGSth
gate-source threshold
voltage
ID = 2.5 mA; VDS = VGS; Tj = 175 °C;
see Figure 10
0.8
-
-
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10
-
-
3.3
V
IDSS
drain leakage current
VDS = 55 V; VGS = 0 V; Tj = 25 °C
-
0.04
1
µA
VDS = 55 V; VGS = 0 V; Tj = 175 °C
-
-
500
µA
IGSS
gate leakage current
VGS = 20 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = -20 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = 10 V; ID = 90 A; Tj = 25 °C;
see Figure 11
-
1.9
2.3
mΩ
VGS = 5 V; ID = 90 A; Tj = 25 °C;
see Figure 11
-
2.4
3.1
mΩ
VGS = 4.5 V; ID = 90 A; Tj = 25 °C;
see Figure 11
-
2.6
3.7
mΩ
VGS 10 V; ID = 90 A; Tj = 175 °C;
see Figure 11; see Figure 12
-
-
5.7
mΩ
ID = 180 A; VDS = 44 V; VGS = 10 V;
see Figure 13; see Figure 14
-
253
-
nC
ID = 180 A; VDS = 44 V; VGS = 5 V;
see Figure 13; see Figure 14
-
140
-
nC
RDSon
drain-source on-state
resistance
Dynamic characteristics
QG(tot)
total gate charge
QGS
gate-source charge
QGD
gate-drain charge
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer
capacitance
td(on)
turn-on delay time
tr
rise time
td(off)
turn-off delay time
tf
fall time
ID = 180 A; VDS = 44 V; VGS = 10 V;
see Figure 13; see Figure 14
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; see Figure 15
VDS = 30 V; RL = 0.3 Ω; VGS = 10 V;
RG(ext) = 10 Ω
-
40
-
nC
-
79
-
nC
-
12000
16000
pF
-
1075
1290
pF
-
730
1000
pF
-
43
-
ns
-
206
-
ns
-
412
-
ns
-
190
-
ns
Source-drain diode
VSD
source-drain voltage
IS = 80 A; VGS = 0 V; Tj = 25 °C;
see Figure 16
-
0.8
1.2
V
trr
reverse recovery time
-
56
-
ns
Qr
recovered charge
IS = 50 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 30 V; Tj = 25 °C
-
115
-
nC
BUK6C2R1-55C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
5 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
003aaf967
400
ID
(A)
VGS (V) =10.0
6.0
5.0
003aaf968
300
4.5
ID
(A)
300
200
4.0
200
3.8
3.6
100
Tj = 175 °C
100
Tj = 25 °C
3.4
3.3
0
0
0
0.5
1
1.5
VDS (V)
2
0
2
4
VGS (V)
6
Tj = 25 °C; tp = 300 μs
Fig 5.
Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 6.
003aaf969
400
Transfer characteristics: drain current as a
function of gate-source voltage; typical values
003aaf972
10
RDSon
(mΩ)
gfs
(S)
8
300
6
200
4
100
2
0
0
0
Fig 7.
100
200
I D (A)
Forward transconductance as a function of
drain current; typical values
BUK6C2R1-55C
Product data sheet
0
300
Fig 8.
5
10
15
VGS (V)
20
Drain-source on-state resistance as a function
of gate-source voltage; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
6 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
003aad806
10-1
ID
(A)
003aae542
4
VGS(th)
(V)
10-2
min
10-3
typ
3
max @1mA
2
typ @1mA
max
-4
10
10-6
0
Fig 9.
min @2.5mA
1
10-5
1
2
3
0
-60
4
VGS (V)
Sub-threshold drain current as a function of
gate-source voltage
VGS (V) = 3.8
RDSon
(mΩ)
4.0
60
120
Tj (°C)
180
Fig 10. Gate-source threshold voltage as a function of
junction temperature
003aaf971
10
0
003aag554
3
a
8
2.4
6
1.8
4.5
4
1.2
5.0
2
10.0
0
0
100
200
300
I D (A)
400
0.6
0
-60
0
60
120
Tj (°C)
180
Tj = 25 °C; tp = 300 µs
Fig 11. Drain-source on-state resistance as a function
of drain current; typical values
BUK6C2R1-55C
Product data sheet
Fig 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
7 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
003aaf973
10
VDS = 44V
VGS
(V)
VDS
8
ID
6
VGS(pl)
4
VGS(th)
VGS
2
QGS1
QGS2
QGS
0
0
100
200
QG (nC)
QGD
QG(tot)
300
003aaa508
Tj = 25 °C; ID = 180 A
Fig 13. Gate-source voltage as a function of gate
charge; typical values
003aaf970
105
Fig 14. Gate charge waveform definitions
003aaf974
300
IS
(A)
C
(pF)
104
Ciss
200
103
Coss
100
Tj = 175 °C
Crss
102
10-1
1
10
VDS (V)
102
VGS = 0 V; f = 1 MHz
Product data sheet
0
0
0.5
1
VSD (V)
1.5
VGS = 0 V
Fig 15. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
BUK6C2R1-55C
Tj = 25 °C
Fig 16. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
8 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
7. Package outline
Plastic single-ended surface-mounted package (D2PAK); 7 leads (one lead cropped)
SOT427
A
A1
E
D1
mounting
base
D
HD
4
1
Lp
7
b
e
e
e
e
e
c
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
A1
b
c
D
max.
D1
E
e
Lp
HD
Q
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
11
1.60
1.20
10.30
9.70
1.27
2.90
2.10
15.80
14.80
2.60
2.20
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
05-03-09
06-03-16
SOT427
Fig 17. Package outline SOT427 (D2PAK)
BUK6C2R1-55C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
9 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BUK6C2R1-55C v.3
20120118
Product data sheet
-
BUK6C2R1-55C v.2
-
BUK6C2R1-55C v.1
Modifications:
BUK6C2R1-55C v.2
BUK6C2R1-55C
Product data sheet
•
Status changed from preliminary to product.
20111221
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
10 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
9. Legal information
9.1
Data sheet status
Document status [1] [2]
Product status [3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
9.3
Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
BUK6C2R1-55C
Product data sheet
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
11 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from competent authorities.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BUK6C2R1-55C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 18 January 2012
© NXP B.V. 2012. All rights reserved.
12 of 13
BUK6C2R1-55C
NXP Semiconductors
N-channel TrenchMOS intermediate level FET
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10
Legal information. . . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Contact information. . . . . . . . . . . . . . . . . . . . . .12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 18 January 2012
Document identifier: BUK6C2R1-55C