Data Sheet

DP
AK
BUK9277-55A
N-channel TrenchMOS logic level FET
12 June 2014
Product data sheet
1. General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
2. Features and benefits
•
•
•
Q101 compliant
Suitable for logic level gate drive sources
Suitable for thermally demanding environments due to 175 °C rating
3. Applications
•
•
•
12 V and 24 V loads
Automotive and general purpose power switching
Motors, lamps and solenoids
4. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
55
V
ID
drain current
VGS = 5 V; Tmb = 25 °C; Fig. 2; Fig. 3
-
-
18
A
Ptot
total power dissipation
Tmb = 25 °C; Fig. 1
-
-
51
W
VGS = 10 V; ID = 10 A; Tj = 25 °C
-
59
69
mΩ
VGS = 4.5 V; ID = 10 A; Tj = 25 °C
-
-
86
mΩ
VGS = 5 V; ID = 10 A; Tj = 25 °C; Fig. 13
-
65
77
mΩ
ID = 18 A; Vsup ≤ 55 V; RGS = 50 Ω;
-
-
33
mJ
Static characteristics
RDSon
drain-source on-state
resistance
Avalanche ruggedness
EDS(AL)S
non-repetitive drainsource avalanche
energy
VGS = 5 V; Tj(init) = 25 °C; unclamped
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
5. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
Simplified outline
1
G
gate
2
D
drain
3
S
source
mb
D
mounting base; connected to
drain
Graphic symbol
D
mb
G
mbb076
2
1
S
3
DPAK (SOT428)
6. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
BUK9277-55A
DPAK
plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
SOT428
BUK9277-55A/CD
DPAK
plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
SOT428
7. Marking
Table 4.
Marking codes
Type number
Marking code
BUK9277-55A
BUK9277-55A
BUK9277-55A/CD
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
55
V
VDGR
drain-gate voltage
RGS = 20 kΩ
-
55
V
VGS
gate-source voltage
-15
15
V
Ptot
total power dissipation
Tmb = 25 °C; Fig. 1
-
51
W
ID
drain current
Tmb = 25 °C; VGS = 5 V; Fig. 2; Fig. 3
-
18
A
Tmb = 100 °C; VGS = 5 V; Fig. 2
-
13
A
BUK9277-55A
Product data sheet
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
Symbol
Parameter
Conditions
Min
Max
Unit
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 3
-
73
A
Tstg
storage temperature
-55
175
°C
Tj
junction temperature
-55
175
°C
Source-drain diode
IS
source current
Tmb = 25 °C
-
18
A
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
-
73
A
non-repetitive drain-source
avalanche energy
ID = 18 A; Vsup ≤ 55 V; RGS = 50 Ω;
-
33
mJ
repetitive drain-source
avalanche energy
Fig. 4
-
J
Avalanche ruggedness
EDS(AL)S
EDS(AL)R
[1]
[2]
[3]
[4]
VGS = 5 V; Tj(init) = 25 °C; unclamped
[1][2][3][4]-
Maximum value not quoted. Repetitive rating defined in avalanche rating figure.
Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
Repetitive avalanche rating limited by an average junction temperature of 170 °C.
Refer to application note AN10273 for further information.
03aa16
120
003aab510
20
ID
(A)
Pder
(%)
15
80
10
40
5
0
Fig. 1.
0
50
100
150
Tmb (°C)
Normalized total power dissipation as a
function of mounting base temperature
BUK9277-55A
Product data sheet
0
200
Fig. 2.
0
100
150
Tmb (°C)
200
Continuous drain current as a function of
mounting base temperature
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
003aab511
102
10 µs
Limit RDSon = V DS / ID
ID
(A)
10
100 µs
1 ms
DC
10 ms
1
10-1
Fig. 3.
100 ms
1
10
102
VDS (V)
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
003aab531
102
IAL
(A)
(1)
10
(2)
1
(3)
10-1
10-2
10-3
Fig. 4.
10-2
10-1
1 t (ms) 10
AL
Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time
9. Thermal characteristics
Table 6.
Thermal characteristics
Symbol
Parameter
Rth(j-mb)
thermal resistance
from junction to
mounting base
BUK9277-55A
Product data sheet
Conditions
All information provided in this document is subject to legal disclaimers.
12 June 2014
Min
Typ
Max
Unit
-
-
2.93
K/W
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-a)
thermal resistance
from junction to
ambient
Fig. 5
-
71.4
-
K/W
03ne00
10
Zth(j-mb)
(K/W)
δ = 0.5
1
0.2
0.1
0.05
10- 1
0.02
P
δ=
tp
T
single shot
tp
10- 2
10- 6
Fig. 5.
10- 5
10- 4
10- 3
10- 2
10- 1
t
T
1
tp (s)
Transient thermal impedance from junction to mounting base as a function of pulse duration
10. Characteristics
Table 7.
Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
drain-source
breakdown voltage
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
55
-
-
V
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
50
-
-
V
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = -55 °C;
-
-
2.3
V
1
1.5
2
V
0.5
-
-
V
VDS = 55 V; VGS = 0 V; Tj = 175 °C
-
-
500
µA
VDS = 55 V; VGS = 0 V; Tj = 25 °C
-
0.05
10
µA
VGS = 15 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = -15 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = 10 V; ID = 10 A; Tj = 25 °C
-
59
69
mΩ
VGS = 4.5 V; ID = 10 A; Tj = 25 °C
-
-
86
mΩ
VGS = 5 V; ID = 10 A; Tj = 175 °C;
-
-
154
mΩ
Static characteristics
V(BR)DSS
VGS(th)
Fig. 12
ID = 1 mA; VDS = VGS; Tj = 25 °C;
Fig. 12
ID = 1 mA; VDS = VGS; Tj = 175 °C;
Fig. 12
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
Fig. 13
BUK9277-55A
Product data sheet
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VGS = 5 V; ID = 10 A; Tj = 25 °C; Fig. 13
-
65
77
mΩ
Dynamic characteristics
QG(tot)
total gate charge
ID = 10 A; VDS = 44 V; VGS = 5 V;
-
11
-
nC
QGS
gate-source charge
Fig. 14
-
1.6
-
nC
QGD
gate-drain charge
-
5
-
nC
Ciss
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
-
440
643
pF
Coss
output capacitance
Tj = 25 °C; Fig. 15
-
90
110
pF
Crss
reverse transfer
capacitance
-
60
93
pF
td(on)
turn-on delay time
VDS = 30 V; RL = 1.2 Ω; VGS = 5 V;
-
10
-
ns
tr
rise time
RG(ext) = 10 Ω; Tj = 25 °C
-
47
-
ns
td(off)
turn-off delay time
-
28
-
ns
tf
fall time
-
33
-
ns
LD
internal drain
inductance
meausured from drain lead from
package to centre of die; Tj = 25 °C
-
2.5
-
nH
LS
internal source
inductance
measured from source lead from
package to source bond pad; Tj = 25 °C
-
7.5
-
nH
Source-drain diode
VSD
source-drain voltage
IS = 15 A; VGS = 0 V; Tj = 25 °C; Fig. 16
-
0.85
1.2
V
trr
reverse recovery time
IS = 20 A; dIS/dt = -100 A/µs;
-
33
-
ns
recovered charge
VGS = -10 V; VDS = 30 V; Tj = 25 °C
-
60
-
nC
Qr
03nd43
60
VGS (V) = 8
10
ID
(A)
7
6
40
03nd42
120
RDSon
(mΩ)
100
5
80
4
20
60
3
0
Fig. 6.
0
2
4
6
8
2.2
10
VDS (V)
40
Output characteristics: drain current as a
Fig. 7.
function of drain-source voltage; typical values
BUK9277-55A
Product data sheet
2
6
8
VGS (V)
10
Drain-source on-state resistance as a function
of gate-source voltage; typical values
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03aa36
10-1
ID
(A)
03nd40
15
gfs
(S)
10-2
10
10-3
min
typ
max
10-4
5
10-5
10-6
Fig. 8.
0
1
2
VGS (V)
0
3
Sub-threshold drain current as a function of
gate-source voltage
Fig. 9.
03nd41
25
0
5
10
15
20
25
Forward transconductance as a function of
drain current; typical values
03nd39
5
ID
(A)
ID (A)
VGS
(V)
20
4
15
3
10
2
5
1
Tj = 175 °C
0
0
1
Tj = 25 °C
2
3
4
VGS (V)
0
5
Fig. 10. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
BUK9277-55A
Product data sheet
VDD = 44(V)
VDD = 14(V)
0
5
10
QG (nC)
15
Fig. 11. Gate-source voltage as a function of turn-on
gate charge; typical values
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03aa33
2.5
VGS(th)
(V)
2
003aab504
180
VGS (V) = 3
3.4
3.8 4
5
RDSon
(mΩ)
max
130
1.5
typ
1
min
80
0.5
0
-60
0
60
120
Tj (° C)
30
180
Fig. 12. Gate-source threshold voltage as a function of
junction temperature
003aab508
5
VGS
(V)
0
10
20
30
40 I (A) 50
D
Fig. 13. Drain-source on-state resistance as a function
of drain current; typical values
003aab506
1200
C
(pF)
4
VDS (V) = 14
800
VDS (V) = 44
3
C iss
2
400
C oss
1
0
0
5
10
QG (nC)
Fig. 14. Gate-source voltage as a function of gate
charge; typical values
BUK9277-55A
Product data sheet
0
10-2
15
C rss
10-1
1
10
VDS (V)
102
Fig. 15. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
003aab509
50
IS
(A)
40
30
20
Tj = 175 °C
10
0
0.0
0.5
Tj = 25 °C
1.0
VSD (V)
1.5
Fig. 16. Source current as a function of source-drain voltage; typical values
BUK9277-55A
Product data sheet
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
11. Package outline
Plastic single-ended surface-mounted package (DPAK); 3 leads (one lead cropped)
SOT428
y
E
A
A
A1
b2
see Note 1
E1
mounting
base
D2
D1
HD
2
L2
L
1
L1
3
b1
b
w
c
A
e
e1
0
5
10 mm
scale
Dimensions (mm are the original dimensions)
Unit
mm
A
A1
b
max 2.38 0.93 0.89
nom
min 2.22 0.46 0.71
b1
b2
c
D1
1.1
5.46 0.56 6.22
0.9
5.00 0.20 5.98
D2
E
E1
6.73
4.0
6.47 4.45
e
e1
2.285 4.57
HD
L
L1
10.4 2.95
9.6
2.55
L2
0.9
0.5
0.5
w
0.2
Note
1. Plastic body may have 45° chamfer.
Outline
version
SOT428
0.2
sot428_po
References
IEC
y
JEDEC
JEITA
TO-252
SC-63
European
projection
Issue date
06-03-16
14-06-10
Fig. 17. Package outline DPAK (SOT428)
BUK9277-55A
Product data sheet
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
12. Legal information
12.1 Data sheet status
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Document
status [1][2]
Product
status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification
This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Definition
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nxp.com.
12.2 Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local NXP
Semiconductors sales office. In case of any inconsistency or conflict with the
short data sheet, the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product
is deemed to offer functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
BUK9277-55A
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their
applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default
in the customer’s applications or products, or the application or use by
customer’s third party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications
and the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
12.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, ICODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight,
MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug,
TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP
Semiconductors N.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
BUK9277-55A
Product data sheet
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BUK9277-55A
NXP Semiconductors
N-channel TrenchMOS logic level FET
13. Contents
1
General description ............................................... 1
2
Features and benefits ............................................1
3
Applications ........................................................... 1
4
Quick reference data ............................................. 1
5
Pinning information ............................................... 2
6
Ordering information ............................................. 2
7
Marking ................................................................... 2
8
Limiting values .......................................................2
9
Thermal characteristics .........................................4
10
Characteristics ....................................................... 5
11
Package outline ................................................... 10
12
12.1
12.2
12.3
12.4
Legal information .................................................11
Data sheet status ............................................... 11
Definitions ...........................................................11
Disclaimers .........................................................11
Trademarks ........................................................ 12
© NXP Semiconductors N.V. 2014. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 12 June 2014
BUK9277-55A
Product data sheet
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