Data Sheet

BUK9509-75A
N-channel TrenchMOS logic level FET
Rev. 03 — 22 September 2008
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
„ Low conduction losses due to low
on-state resistance
„ Suitable for logic level gate drive
sources
„ Q101 compliant
„ Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
„ 12 V, 24 V and 42 V loads
„ Motors, lamps and solenoids
„ Automotive and general purpose
power switching
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
75
V
ID
drain current
VGS = 5 V; Tj = 25 °C; see
Figure 3; see Figure 1
-
-
75
A
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
-
-
230
W
ID = 75 A; Vsup ≤ 75 V;
RGS = 50 Ω; VGS = 5 V;
Tj(init) = 25 °C; unclamped
-
-
562
mJ
VGS = 4.5 V; ID = 25 A;
Tj = 25 °C
-
-
9.95
mΩ
VGS = 5 V; ID = 25 A;
Tj = 25 °C; see Figure 12;
see Figure 15
-
7.6
9
mΩ
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
Static characteristics
RDSon
drain-source
on-state resistance
BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2.
Pinning information
Pin
Symbol
Description
Simplified outline
1
G
gate
2
D
drain
3
S
source
mb
D
mounting base; connected to
drain
Graphic symbol
D
mb
G
mbb076
S
1 2 3
SOT78A
(TO-220AB; SC-46)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
BUK9509-75A
TO-220AB;
Plastic single-ended package; heatsink mounted; 1 mounting hole;
SC-46
3-lead TO-220AB
Version
SOT78A
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
75
V
VDGR
drain-gate voltage
RGS = 20 kΩ
-
75
V
VGS
gate-source voltage
-10
10
V
ID
drain current
VGS = 5 V; Tj = 100 °C; see Figure 1
-
65
A
VGS = 5 V; Tj = 25 °C; see Figure 3; see Figure 1
-
75
A
IDM
peak drain current
Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3
-
440
A
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
230
W
Tstg
storage temperature
-55
175
°C
Tj
junction temperature
-55
175
°C
VGSM
peak gate-source
voltage
pulsed; tp ≤ 50 µs
-15
15
V
Source-drain diode
IS
source current
Tmb = 25 °C
-
75
A
ISM
peak source current
tp ≤ 10 µs; pulsed; Tmb = 25 °C
-
440
A
BUK9509-75A_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 22 September 2008
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BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
Table 4.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
-
562
mJ
Avalanche ruggedness
non-repetitive
ID = 75 A; Vsup ≤ 75 V; RGS = 50 Ω; VGS = 5 V;
drain-source avalanche Tj(init) = 25 °C; unclamped
energy
EDS(AL)S
03aa24
120
03na19
120
Ider
(%)
Pder
(%)
80
80
40
40
0
0
0
50
100
150
200
0
50
100
150
Tmb (°C)
200
Tmb (°C)
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
Fig 1. Normalized continuous drain current as a
function of mounting base temperature
03nb44
1000
ID
(A)
RDSon = VDS/ ID
tp = 10 us
100
100 us
1 ms
δ=
P
10
tp
D.C.
T
10 ms
100 ms
t
tp
T
1
1
10
VDS (V)
100
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK9509-75A_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 22 September 2008
3 of 12
BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Rth(j-mb)
Rth(j-a)
Conditions
Min
Typ
Max
Unit
thermal resistance from see Figure 4
junction to mounting
base
-
-
0.65
K/W
thermal resistance from vertical in still air
junction to ambient
-
60
-
K/W
1
Zth(j-mb)
(K/W)
03nb45
δ = 0.05
0.2
0.1
0.1
0.05
0.02
δ=
P
0.01
tp
T
Single Shot
t
tp
T
0.001
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9509-75A_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 22 September 2008
4 of 12
BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
drain-source
breakdown voltage
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
75
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
70
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C; see
Figure 6
1
ID = 1 mA; VDS = VGS; Tj = 175 °C; see
Figure 6
ID = 1 mA; VDS = VGS; Tj = -55 °C; see
Figure 6
Typ
Max
Unit
-
-
V
-
-
V
1.5
2
V
0.5
-
-
V
-
-
2.3
V
Static characteristics
V(BR)DSS
VGS(th)
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 75 V; VGS = 0 V; Tj = 175 °C
-
-
500
µA
VDS = 75 V; VGS = 0 V; Tj = 25 °C
-
0.05
10
µA
VDS = 0 V; VGS = 10 V; Tj = 25 °C
-
2
100
nA
VDS = 0 V; VGS = -10 V; Tj = 25 °C
-
2
100
nA
VGS = 4.5 V; ID = 25 A; Tj = 25 °C
-
-
9.95
mΩ
VGS = 5 V; ID = 25 A; Tj = 175 °C; see
Figure 12; see Figure 15
-
-
18.9
mΩ
VGS = 10 V; ID = 25 A; Tj = 25 °C
-
7.23
8.5
mΩ
VGS = 5 V; ID = 25 A; Tj = 25 °C; see
Figure 12; see Figure 15
-
7.6
9
mΩ
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; see Figure 14
-
6631
8840
pF
-
905
1090
pF
-
610
840
pF
-
47
-
ns
Dynamic characteristics
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer
capacitance
td(on)
turn-on delay time
tr
rise time
-
185
-
ns
td(off)
turn-off delay time
-
424
-
ns
tf
fall time
-
226
-
ns
LD
internal drain
inductance
from contact screw on mounting base to
centre of die; Tj = 25 °C
-
3.5
-
nH
from drain lead 6 mm from package to
centre of die; Tj = 25 °C
-
4.5
-
nH
from source lead to source bond pad;
Tj = 25 °C
-
7.5
-
nH
-
0.85
1.2
V
LS
internal source
inductance
VDS = 30 V; RL = 1.2 Ω; VGS = 5 V;
RG(ext) = 10 Ω; Tj = 25 °C
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C; see
Figure 13
trr
reverse recovery time
Qr
recovered charge
IS = 20 A; dIS/dt = -100 A/µs; VGS = -10 V;
VDS = 30 V; Tj = 25 °C
BUK9509-75A_3
Product data sheet
-
70.3
-
ns
-
213
-
nC
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 22 September 2008
5 of 12
BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03aa36
10-1
ID
(A)
03aa33
2.5
VGS(th)
(V)
10-2
2
10-3
max
1.5
typ
10-4
1
min
10-5
0.5
min
typ
max
10-6
0
1
2
VGS (V)
3
Fig 5. Sub-threshold drain current as a function
of gate-source voltage
03nb41
400
ID
(A)
350
10 6 5
8
7
0
-60
0
60
120
Tj (°C)
180
Fig 6. Gate-source threshold voltage as a
function of junction temperature
03nb40
20
RDSon
(mΩ)
18
VGS (V) = 4
300
16
250
14
200
12
150
3
10
8
100
6
50
2.2
4
0
0
2
4
6
8
2
10
VDS (V)
Fig 7. Output characteristics: drain current as a
function of drain-source voltage; typical
values
4
5
6
7
8
VGS (V)
Fig 8. Drain-source on-state resistance as a
function of gate-source voltage; typical
values
BUK9509-75A_3
Product data sheet
3
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 22 September 2008
6 of 12
BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03nb38
140
gfs
(S)
120
03nb39
120
ID
(A)
100
100
80
80
60
60
Tj = 175 OC
40
40
Tj = 25 OC
20
20
0
0
0
20
40
60
80
ID (A)
100
Fig 9. Forward transconductance as a function of
drain current; typical values
03nb37
VGS 5
(V)
4.5
0.0
1.0
2.0
3.0
VGS (V)
4.0
Fig 10. Transfer characteristics: drain current as a
function of gate-source voltage; typical
values
20
RDSon
(mΩ)
03nb42
VGS (V) = 3
3.2
3.4
4
VDD= 14 V
4
3.6
3.5
VDD= 60 V
3
3.8
15
2.5
2
10
1.5
6
1
0.5
0
5
0
50
100
QG (nC) 150
Fig 11. Gate-source voltage as a function of gate
charge; typical values
0
100
150
200
250
300
350
ID (A)
Fig 12. Drain-source on-state resistance as a
function of drain current; typical values
BUK9509-75A_3
Product data sheet
50
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 22 September 2008
7 of 12
BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
03nb36
120
IS
(A)
100
03nb43
16000
C (pF)
14000
12000
80
10000
60
8000
O
Tj = 175 C
Ciss
6000
40
4000
20
2000
O
Tj = 25 C
0
Coss
Crss
0
0.0
0.2
0.4
0.6
0.8
1.0
VSD (V)
0.01
0.1
1
10
VDS(V)
100
Fig 14. Input, output and reverse transfer
capacitances as a function of drain-source
voltage; typical values
Fig 13. Reverse diode current as a function of
reverse diode voltage; typical values
03nb25
2.4
a
1.6
0.8
0
−60
0
60
120
180
Tj (°C)
Fig 15. Normalized drain-source on-state resistance factor as a function of junction temperature
BUK9509-75A_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 22 September 2008
8 of 12
BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
7. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
E
SOT78A
A
A1
p
q
mounting
base
D1
D
L2
L1(1)
Q
b1
L
1
2
3
c
b
e
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
b1
c
D
D1
E
e
L
L1(1)
L2
max.
p
q
Q
mm
4.5
4.1
1.39
1.27
0.9
0.6
1.3
1.0
0.7
0.4
15.8
15.2
6.4
5.9
10.3
9.7
2.54
15.0
13.5
3.30
2.79
3.0
3.8
3.6
3.0
2.7
2.6
2.2
Note
1. Terminals in this zone are not tinned.
OUTLINE
VERSION
SOT78A
REFERENCES
IEC
JEDEC
JEITA
3-lead TO-220AB
SC-46
EUROPEAN
PROJECTION
ISSUE DATE
03-01-22
05-03-14
Fig 16. Package outline SOT78A (TO-220AB; SC-46)
BUK9509-75A_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 22 September 2008
9 of 12
BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BUK9509-75A_3
20080922
Product data sheet
-
BUK9509_9609_75A-02
Modifications:
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Type number BUK9509-75A separated from data sheet BUK9509_9609_75A-02.
Package outline updated, see Figure 16.
BUK9509_9609_75A-02
20001106
Product data sheet
-
BUK9509_9609_75A-01
BUK9509_9609_75A-01
20001010
Product data sheet
-
-
BUK9509-75A_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 22 September 2008
10 of 12
BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
9. Legal information
9.1
Data sheet status
Document status [1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
9.3
Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BUK9509-75A_3
Product data sheet
© NXP B.V. 2008. All rights reserved.
Rev. 03 — 22 September 2008
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BUK9509-75A
NXP Semiconductors
N-channel TrenchMOS logic level FET
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2
Thermal characteristics . . . . . . . . . . . . . . . . . . .4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .10
Legal information. . . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Contact information. . . . . . . . . . . . . . . . . . . . . . 11
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: Rev. 03 — 22 September 2008
Document identifier: BUK9509-75A_3
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