Data Sheet

BUK7510-55AL
N-channel TrenchMOS standard level FET
Rev. 03 — 4 August 2009
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
„ Q101 compliant
„ Suitable for thermally demanding
environments due to 175 °C rating
„ Suitable for use in control systems due
to stable operation in linear mode
1.3 Applications
„ 12 V and 24 V loads
„ DC motor control
„ Automotive systems
„ Repetitive clamped inductive switching
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
Min
Typ
Max
Unit
-
-
55
V
-
-
75
A
VDS
drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
ID
drain current
VGS = 10 V; Tmb = 25 °C;
see Figure 1; see Figure 3
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
-
-
300
W
ID = 75 A; Vsup ≤ 55 V;
RGS = 50 Ω; VGS = 10 V;
Tj(init) = 25 °C; unclamped
-
-
1.1
J
VGS = 10 V; ID = 25 A;
VDS = 44 V; Tj = 25 °C;
see Figure 15
-
50
-
nC
VGS = 10 V; ID = 25 A;
Tj = 25 °C; see Figure 12;
see Figure 13
-
8.5
10
mΩ
[1]
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy
Dynamic characteristics
QGD
gate-drain charge
Static characteristics
RDSon
[1]
drain-source
on-state resistance
Continuous current is limited by package.
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2.
Pinning information
Pin
Symbol
Description
Simplified outline
1
G
gate
2
D
drain
3
S
source
mb
D
mounting base; connected to
drain
Graphic symbol
D
mb
G
mbb076
S
1 2 3
SOT78
(TO-220AB; SC-46)
3. Ordering information
Table 3.
Ordering information
Type number
BUK7510-55AL
Package
Name
Description
Version
TO-220AB;
SC-46
Plastic single-ended package; heatsink mounted; 1 mounting hole;
3-lead TO-220AB
SOT78
BUK7510-55AL_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
2 of 13
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
55
V
VDGR
drain-gate voltage
RGS = 20 kΩ
VGS
gate-source voltage
ID
drain current
-
55
V
-20
20
V
Tmb = 25 °C; VGS = 10 V; see Figure 1;
see Figure 3
[1][2]
-
122
A
Tmb = 25 °C; VGS = 10 V; see Figure 1;
see Figure 3
[3]
-
75
A
Tmb = 100 °C; VGS = 10 V; see Figure 1
[3]
-
75
A
-
490
A
IDM
peak drain current
Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3
Ptot
total power dissipation
Tmb = 25 °C; see Figure 2
-
300
W
Tstg
storage temperature
-55
175
°C
Tj
junction temperature
-55
175
°C
Source-drain diode
source current
IS
peak source current
ISM
Tmb = 25 °C;
[1][2]
-
122
A
Tmb = 25 °C;
[3]
-
75
A
-
490
A
-
1.1
J
-
-
J
tp ≤ 10 µs; pulsed; Tmb = 25 °C
Avalanche ruggedness
EDS(AL)S
non-repetitive
ID = 75 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V;
drain-source avalanche Tj(init) = 25 °C; unclamped
energy
EDS(AL)R
repetitive drain-source
avalanche energy
see Figure 4
[1]
Current is limited by power dissipation chip rating.
[2]
Refer to document 9397 750 12572 for further information.
[3]
Continuous current is limited by package.
[4]
Single-shot avalanche rating limited by maximum junction temperature of 175 °C.
[5]
Repetitive avalanche rating limited by average junction temperature of 170 °C.
[6]
Refer to AN10273 for further information.
BUK7510-55AL_3
Product data sheet
[4][5]
[6]
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
3 of 13
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aaa726
150
03aa16
120
ID
(A)
Pder
(%)
100
80
(1)
40
50
0
0
0
Fig 1.
50
100
150
Tmb (°C)
200
0
50
100
150
200
Tmb (°C)
Continuous drain current as a function of
mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
003aaa737
103
Limit RDSon = VDS / ID
ID
(A)
tp = 10 μ s
100 μ s
102
(1)
1 ms
DC
10 ms
10
100 ms
1
1
Fig 3.
10
102
VDS (V)
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK7510-55AL_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
4 of 13
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aaa739
102
(1)
IAV
(A)
(2)
Tj = 25 ˚C
10
150 ˚C
(3)
1
10-1
10-2
Fig 4.
10-1
1
tAV (ms)
10
Single-shot and repetitive avalanche rating; avalanche current as a function of avalanche period
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Rth(j-a)
Rth(j-mb)
Conditions
Min
Typ
Max
Unit
thermal resistance from vertical in still air
junction to ambient
-
60
-
K/W
thermal resistance from see Figure 5
junction to mounting
base
-
0.25
0.5
K/W
003aaa734
1
Zth(j-mb)
(K/W) δ = 0.5
0.2
10-1
0.1
0.05
0.02
10
δ=
P
-2
single shot
tp
T
t
tp
T
10-3
10-6
Fig 5.
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK7510-55AL_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
5 of 13
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
50
-
-
V
ID = 250 µA; VGS = 0 V; Tj = 25 °C
55
-
-
V
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10; see Figure 11
2
3
4
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10; see Figure 11
-
-
4.4
V
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 10; see Figure 11
1
-
-
V
Static characteristics
V(BR)DSS
VGS(th)
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VDS = 55 V; VGS = 0 V; Tj = 175 °C
-
-
500
µA
VDS = 55 V; VGS = 0 V; Tj = 25 °C
-
0.05
10
µA
VDS = 0 V; VGS = +20 V; Tj = 25 °C
-
2
100
nA
VDS = 0 V; VGS = -20 V; Tj = 25 °C
-
2
100
nA
VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 12; see Figure 13
-
-
20
mΩ
VGS = 10 V; ID = 25 A; Tj = 25 °C;
see Figure 12; see Figure 13
-
8.5
10
mΩ
ID = 25 A; VDS = 44 V; VGS = 10 V;
Tj = 25 °C; see Figure 15
-
124
-
nC
-
22
-
nC
-
50
-
nC
Dynamic characteristics
QG(tot)
total gate charge
QGS
gate-source charge
QGD
gate-drain charge
VGS(pl)
gate-source plateau
voltage
ID = 25 A; VDS = 44 V; Tj = 25 °C;
see Figure 15
-
5
-
V
Ciss
input capacitance
-
4710
6280
pF
Coss
output capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
-
980
1180
pF
Crss
reverse transfer
capacitance
-
560
770
pF
td(on)
turn-on delay time
-
33
-
ns
tr
rise time
-
117
-
ns
td(off)
turn-off delay time
-
132
-
ns
tf
fall time
-
95
-
ns
LD
internal drain
inductance
from contact screw on package to centre
of die; Tj = 25 °C
-
3.5
-
nH
from drain lead 6mm from package to
centre of die; Tj = 25 °C
-
4.5
-
H
from source lead to source bond pad;
Tj = 25 °C
-
7.5
-
nH
LS
internal source
inductance
VDS = 30 V; RL = 1.2 Ω; VGS = 10 V;
RG(ext) = 10 Ω; Tj = 25 °C
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 14
-
0.85
1.2
V
trr
reverse recovery time
-
73
-
ns
Qr
recovered charge
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 30 V; Tj = 25 °C
-
430
-
nC
BUK7510-55AL_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
6 of 13
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aaa729
400
ID
(A)
VGS (V) = 10
9.5
9
8.5
8
7.5
7
6.5
6
5.5
5
4.5
100
0
Fig 6.
8
9
10
15
200
0
7
RDSon
(mΩ)
20
18
16
14
12
300
003aaa731
20
2
4
6
10
VGS (V) = 20
5
0
8
VDS (V)
10
Output characteristics: drain current as a
function of drain-source voltage; typical values
003aaa732
40
gfs
(S)
0
Fig 7.
100
200
300
ID (A)
400
Drain-source on-state resistance as a function
of drain current; typical values
003aaa733
150
ID
(A)
35
100
30
50
25
Tj = 175 °C
20
0
Fig 8.
Tj = 25 °C
0
20
40
60
ID (A)
80
Forward transconductance as a function of
drain current; typical values
0
Fig 9.
4
6
8
10
VGS (V)
Transfer characteristics: drain current as a
function of gate-source voltage; typical values
BUK7510-55AL_3
Product data sheet
2
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
7 of 13
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
03aa32
5
03aa35
10−1
ID
(A)
VGS(th)
(V)
4
3
typ
max
10−3
typ
2
min
10−2
max
10−4
min
10−5
1
0
−60
10−6
0
60
120
0
180
2
4
Tj (°C)
Fig 10. Gate-source threshold voltage as a function of
junction temperature
Fig 11. Sub-threshold drain current as a function of
gate-source voltage
003aaa730
18
6
VGS (V)
03ne89
2
a
RDSon
(mΩ)
1.5
14
1
10
0.5
6
5
10
15
VGS (V)
20
Fig 12. Drain-source on-state resistance as a function
of gate-source voltage; typical values
0
-60
60
120
Tj (°C)
180
Fig 13. Normalized drain-source on-state resistance
factor as a function of junction temperature
BUK7510-55AL_3
Product data sheet
0
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
8 of 13
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aaa736
150
003aaa735
10
VGS
(V)
IS
(A)
8
VDS = 14 V
100
VDS = 44 V
6
Tj = 25 °C
4
50
Tj = 175 °C
0
0.0
2
0
0.3
0.6
0.9
VSD (V)
1.2
0
Fig 14. Source current as a function of source-drain
voltage; typical values
100
QG (nC)
150
Fig 15. Gate-source voltage as a function of gate
charge; typical values
003aaa738
8000
C
(pF)
50
Ciss
6000
4000
Coss
C
rss
2000
0
10-1
1
10
VDS (V)
102
Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values
BUK7510-55AL_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
9 of 13
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
7. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
SOT78
E
A
A1
p
q
mounting
base
D1
D
L1(1)
L2(1)
Q
L
b1(2)
(3×)
b2(2)
(2×)
1
2
3
b(3×)
c
e
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
b1(2)
b2(2)
c
D
D1
E
e
L
L1(1)
L2(1)
max.
p
q
Q
mm
4.7
4.1
1.40
1.25
0.9
0.6
1.6
1.0
1.3
1.0
0.7
0.4
16.0
15.2
6.6
5.9
10.3
9.7
2.54
15.0
12.8
3.30
2.79
3.0
3.8
3.5
3.0
2.7
2.6
2.2
Notes
1. Lead shoulder designs may vary.
2. Dimension includes excess dambar.
OUTLINE
VERSION
SOT78
REFERENCES
IEC
JEDEC
JEITA
3-lead TO-220AB
SC-46
EUROPEAN
PROJECTION
ISSUE DATE
08-04-23
08-06-13
Fig 17. Package outline SOT78 (TO-220AB)
BUK7510-55AL_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
10 of 13
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BUK7510-55AL_3
20090804
Product data sheet
-
BUK7510-55AL_2
Modifications:
•
Package outline updated.
BUK7510-55AL_2
20080103
Product data sheet
-
BUK75_7610_55AL_1
BUK75_7610_55AL_1
20050331
Product data sheet
-
-
BUK7510-55AL_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
11 of 13
BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
9. Legal information
9.1
Data sheet status
Document status [1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
9.3
Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BUK7510-55AL_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 4 August 2009
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BUK7510-55AL
NXP Semiconductors
N-channel TrenchMOS standard level FET
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Contact information. . . . . . . . . . . . . . . . . . . . . .12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 4 August 2009
Document identifier: BUK7510-55AL_3
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