Data Sheet

BUK7E3R1-40E
N-channel TrenchMOS standard level FET
11 September 2012
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in a SOT226 package using TrenchMOS technology.
This product has been designed and qualified to AEC Q101 standard for use in high
performance automotive applications.
1.2 Features and benefits
• AEC Q101 compliant
• Repetitive avalanche rated
• Suitable for thermally demanding environments due to 175 °C rating
• True standard level gate with VGS(th) rating of greater than 1V at 175 °C
1.3 Applications
• 12 V Automotive systems
• Motors, lamps and solenoid control
• Start-Stop micro-hybrid applications
• Transmission control
• Ultra high performance power switching
1.4 Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
40
V
ID
drain current
VGS = 10 V; Tmb = 25 °C; Fig. 1
-
-
100
A
Ptot
total power dissipation
Tmb = 25 °C; Fig. 2
-
-
234
W
VGS = 10 V; ID = 25 A; Tj = 25 °C;
-
2.6
3.1
mΩ
-
22
-
nC
[1]
Static characteristics
RDSon
drain-source on-state
resistance
Fig. 11
Dynamic characteristics
QGD
gate-drain charge
VGS = 10 V; ID = 25 A; VDS = 32 V;
Fig. 13; Fig. 14
[1]
Continuous current is limited by package.
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BUK7E3R1-40E
NXP Semiconductors
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
Simplified outline
1
G
gate
2
D
drain
3
S
source
mb
D
mounting base; connected to
drain
Graphic symbol
D
mb
G
S
mbb076
1 2 3
I2PAK (SOT226)
3. Ordering information
Table 3.
Ordering information
Type number
Package
BUK7E3R1-40E
Name
Description
Version
I2PAK
plastic single-ended package (I2PAK); TO-262
SOT226
4. Marking
Table 4.
Marking codes
Type number
Marking code
BUK7E3R1-40E
BUK7E3R1-40E
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
40
V
VDGR
drain-gate voltage
RGS = 20 kΩ
-
40
V
VGS
gate-source voltage
Tj ≤ 175 °C; DC
-20
20
V
ID
drain current
Tmb = 25 °C; VGS = 10 V; Fig. 1
[1]
-
100
A
Tmb = 100 °C; VGS = 10 V; Fig. 1
[1]
-
100
A
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 4
-
798
A
Ptot
total power dissipation
Tmb = 25 °C; Fig. 2
-
234
W
Tstg
storage temperature
-55
175
°C
BUK7E3R1-40E
Product data sheet
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N-channel TrenchMOS standard level FET
Symbol
Parameter
Conditions
Tj
junction temperature
Min
Max
Unit
-55
175
°C
-
100
A
-
798
A
-
419
mJ
Source-drain diode
IS
source current
Tmb = 25 °C
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
[1]
Avalanche ruggedness
EDS(AL)S
non-repetitive drain-source
avalanche energy
ID = 100 A; Vsup ≤ 40 V; RGS = 50 Ω;
[2][3]
VGS = 10 V; Tj(init) = 25 °C; unclamped;
Fig. 3
[1]
[2]
[3]
Continuous current is limited by package.
Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
Refer to application note AN10273 for further information.
003aah195
200
03aa16
120
ID
(A)
Pder
(%)
150
80
(1)
100
40
50
0
0
50
100
150
Tmb (° C)
0
200
(1) Capped at 120A due to package
Fig. 1.
Continuous drain current as a function of
mounting base temperature
BUK7E3R1-40E
Product data sheet
Fig. 2.
0
100
150
Tmb (°C)
200
Normalized total power dissipation as a
function of mounting base temperature
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BUK7E3R1-40E
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aah196
103
IAL
(A)
102
(1)
10
(2)
1
(3)
10-1
10-3
Fig. 3.
10-2
10-1
1 t (ms) 10
AL
Single pulse avalanche rating; avalanche current as a function of avalanche time
003aah197
103
ID
(A)
10
Limit RDSon= VDS / ID
tp =10 µ s
2
100 µ s
DC
10
1 ms
10 ms
100 ms
1
10-1
10-1
Fig. 4.
1
10
102
VDS (V)
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
6. Thermal characteristics
Table 6.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance
from junction to
mounting base
Fig. 5
-
-
0.64
K/W
Rth(j-a)
thermal resistance
from junction to
ambient
-
65
-
K/W
BUK7E3R1-40E
Product data sheet
vertical in still air
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BUK7E3R1-40E
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aah198
1
Zth(j-mb) δ = 0.5
(K/W)
0.2
10-1
0.1
0.05
0.02
single shot
10-2
P
tp
10
-3
10-6
Fig. 5.
10-5
10-4
10-3
10-2
tp
T
δ=
t
T
10-1
1
tp (s)
Transient thermal impedance from junction to mounting base as a function of pulse duration
7. Characteristics
Table 7.
Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
40
-
-
V
ID = 250 µA; VGS = 0 V; Tj = -55 °C
36
-
-
V
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C;
2.4
3
4
V
-
-
4.5
V
1
-
-
V
VDS = 40 V; VGS = 0 V; Tj = 25 °C
-
0.2
2
µA
VDS = 40 V; VGS = 0 V; Tj = 175 °C
-
-
500
µA
VGS = 20 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = -20 V; VDS = 0 V; Tj = 25 °C
-
2
100
nA
VGS = 10 V; ID = 25 A; Tj = 25 °C;
-
2.6
3.1
mΩ
-
-
5.9
mΩ
Static characteristics
V(BR)DSS
VGS(th)
Fig. 9; Fig. 10
ID = 1 mA; VDS = VGS; Tj = -55 °C;
Fig. 10
ID = 1 mA; VDS = VGS; Tj = 175 °C;
Fig. 10
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
Fig. 11
VGS = 10 V; ID = 25 A; Tj = 175 °C;
Fig. 12; Fig. 11
Dynamic characteristics
QG(tot)
total gate charge
ID = 25 A; VDS = 32 V; VGS = 10 V;
-
79
-
nC
QGS
gate-source charge
Fig. 13; Fig. 14
-
20
-
nC
QGD
gate-drain charge
-
22
-
nC
BUK7E3R1-40E
Product data sheet
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N-channel TrenchMOS standard level FET
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Ciss
input capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
-
4650
6200
pF
Coss
output capacitance
Tj = 25 °C; Fig. 15
-
885
1065
pF
Crss
reverse transfer
capacitance
-
470
640
pF
td(on)
turn-on delay time
VDS = 30 V; RL = 1.2 Ω; VGS = 10 V;
-
24
-
ns
tr
rise time
RG(ext) = 5 Ω
-
29
-
ns
td(off)
turn-off delay time
-
54
-
ns
tf
fall time
-
32
-
ns
LD
internal drain
inductance
from upper edge of drain mounting
base to center of die
-
2.5
-
nH
LS
internal source
inductance
from source lead to source bonding
pad
-
7.5
-
nH
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 16
-
0.82
1.2
V
trr
reverse recovery time
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
-
38.8
-
ns
recovered charge
VDS = 25 V
-
44.6
-
nC
Qr
003aah124
400
ID
(A)
VGS (V) = 20
10
003aah050
10
8
RDSon
(mΩ )
320
7.5
240
6
160
5.5
5
0
2.5
5
80
4.5
4
0
0.5
1
VDS(V)
0
1.5
Tj = 25 °C; tp = 300 μs
Fig. 6.
Fig. 7.
Output characteristics; drain current as a
function of drain-source voltage; typical values
BUK7E3R1-40E
Product data sheet
4
12
16 V (V) 20
GS
Drain-source on-state resistance as a function
of gate-source voltage; typical values
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N-channel TrenchMOS standard level FET
003aah127
400
003aah028
10-1
ID
(A)
ID
(A)
10-2
300
typ
min
10-3
max
200
Tj = 175 ° C
Tj = 25 ° C
100
0
Fig. 8.
10-4
10-5
0
2
4
10-6
6 V (V) 8
GS
Transfer characteristics; drain current as a
function of gate-source voltage; typical values
003aah027
5
VGS(th)
(V)
2
4
VGS (V)
6
Sub-threshold drain current as a function of
gate-source voltage
003aah055
12
5
RDSon
(mΩ )
max
4
Fig. 9.
0
5.5
6
9
3
typ
2
min
6
8
1
0
-60
V GS (V) = 20
0
60
120
T j (°C)
0
180
Fig. 10. Gate-source threshold voltage as a function of
junction temperature
BUK7E3R1-40E
Product data sheet
10
3
0
100
200
300 I (A) 400
D
Tj = 25 °C; tp = 300 μs
Fig. 11. Drain-source on-state resistance as a function
of drain current; typical values
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BUK7E3R1-40E
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aag816
2
VDS
a
ID
1.5
VGS(pl)
VGS(th)
1
VGS
QGS1
0.5
QGS2
QGS
QGD
QG(tot)
003aaa508
0
-60
0
60
120
Tj (°C)
Fig. 13. Gate charge waveform definitions
180
Fig. 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
003aah057
10
003aah058
104
VGS
(V)
C
(pF)
8
Ciss
14 V
6
103
VDS = 32V
4
Coss
Crss
2
0
0
20
40
60
Q G (nC)
102
10-1
80
Fig. 14. Gate-source voltage as a function of gate
charge; typical values
BUK7E3R1-40E
Product data sheet
1
10
VDS (V)
102
Fig. 15. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
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BUK7E3R1-40E
NXP Semiconductors
N-channel TrenchMOS standard level FET
003aah134
400
IS
(A)
300
200
Tj = 175° C
100
0
0
0.5
Tj = 25 °C
1
1.5
VSD (V)
2
Fig. 16. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
BUK7E3R1-40E
Product data sheet
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N-channel TrenchMOS standard level FET
8. Package outline
Plastic single-ended package (I2PAK); low-profile 3-lead TO-262
SOT226
A
A1
E
D1
mounting
base
D
L1
Q
b1
L
1
2
3
b
e
c
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
b1
c
D
max
D1
E
e
L
L1
Q
mm
4.5
4.1
1.40
1.27
0.85
0.60
1.3
1.0
0.7
0.4
11
1.6
1.2
10.3
9.7
2.54
15.0
13.5
3.30
2.79
2.6
2.2
OUTLINE
VERSION
SOT226
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
06-02-14
09-08-25
TO-262
Fig. 17. Package outline I2PAK (SOT226)
BUK7E3R1-40E
Product data sheet
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NXP Semiconductors
N-channel TrenchMOS standard level FET
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
9. Legal information
9.1 Data sheet status
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Document
status [1][2]
Product
status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification
This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Definition
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nxp.com.
9.2 Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local NXP
Semiconductors sales office. In case of any inconsistency or conflict with the
short data sheet, the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product
is deemed to offer functions and qualities beyond those described in the
Product data sheet.
9.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, NXP Semiconductors does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
BUK7E3R1-40E
Product data sheet
Right to make changes — NXP Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their
applications and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default
in the customer’s applications or products, or the application or use by
customer’s third party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications
and the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
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BUK7E3R1-40E
NXP Semiconductors
N-channel TrenchMOS standard level FET
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
9.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
BUK7E3R1-40E
Product data sheet
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N-channel TrenchMOS standard level FET
10. Contents
1
1.1
1.2
1.3
1.4
Product profile ....................................................... 1
General description .............................................. 1
Features and benefits ...........................................1
Applications .......................................................... 1
Quick reference data ............................................ 1
2
Pinning information ............................................... 2
3
Ordering information ............................................. 2
4
Marking ................................................................... 2
5
Limiting values .......................................................2
6
Thermal characteristics .........................................4
7
Characteristics ....................................................... 5
8
Package outline ................................................... 10
9
9.1
9.2
9.3
9.4
Legal information .................................................11
Data sheet status ............................................... 11
Definitions ...........................................................11
Disclaimers .........................................................11
Trademarks ........................................................ 12
© NXP B.V. 2012. All rights reserved
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 11 September 2012
BUK7E3R1-40E
Product data sheet
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