HIP5015, HIP5016 Data Sheet June 1996 7V, 7A SynchroFET™ Complementary Drive Synchronous Half-Bridge Designed with the Pentium® in mind, the Intersil SynchroFET family provides a new approach for implementing a synchronous rectified buck switching regulator. The SynchroFET™ replaces two power DMOSs, a Schottky diode, two gate drivers and synchronous control circuitry. The complementary drive circuit turns the upper FET on and the lower FET off when the input from the PWM is high. When the input from the PWM goes low the upper FET turns off and the lower FET turns on. The HIP5016 has a PWM pin that inverts the relationship from the input to PHASE. This architecture allows the designer to utilize a low cost single-ended PWM controller in either a current or voltage mode configuration. The SynchroFET operates in continuous conduction mode reducing EMI constraints and enabling high bandwidth operation. Several features ensure easy start-up. First, the supply currents stay below specification as the supply voltages ramp up; no unexpected surges occur that might perturb a soft-start or deplete a charge-pump. Second, any power-up sequence of the VCC, VIN, or PWM pins can be used without causing large currents. Third, the chip operates when VCC is greater than 2V so VCC can be created from a charge pump powered from VIN. TEMP. RANGE (oC) PACKAGE HIP5015IS -40 to 85 7 Ld Gullwing SIP Z7.05B HIP5015IS1 -40 to 85 7 Ld Staggered Vertical SIP Z7.05C HIP5016IS -40 to 85 7 Ld Gullwing SIP Z7.05B HIP5016IS1 4142 Features • Complementary Drive, Half-Bridge Power NMOS • Use With Low-Cost Single-Output PWM Controllers • Improve Efficiency Over Conventional Buck Converter with Schottky Clamp • Minimum Deadtime Provided by Adaptive Shoot-Through Protection Eliminates External Schottky • Grounded Case for Low EMI and Simple Heatsinking • Low Operating Current • Frequency Exceeding 1MHz • Dual Polarity Input Options • All Pins Surge Protected Applications • 5V to ≤3.3V Synchronous Buck Converters • 3.3V to ≤2.9V Synchronous Buck Converters • Pentium Power Supplies • Bus Terminations (BTL and GTL) • Drive 5V Motors Directly from Microprocessor Ordering Information PART NUMBER File Number -40 to 85 PKG. NO. 7 Ld Staggered Vertical SIP Z7.05C Typical Application Block Diagram +12V +5V VCC VIN +3.3V PWM CONTROLLER PWM PHASE CONTROL HIP5015 GND SYNCHRONOUS RECTIFIED BUCK CONVERTER Pinouts HIP5015IS1, HIP5016IS1 (SIP - VERTICAL) TOP VIEW 7 6 5 4 3 2 1 GND (TAB) NC NC PWM (HIP5015), PWM (HIP5016) GND VCC VIN PHASE FRONT ROWS = PINS 1,3,5,7 BACK ROWS = PINS 2,4,6 HIP5015IS, HIP5016IS (SIP - GULLWING) TOP VIEW GND (TAB) 7 6 5 4 3 2 1 NC NC PWM (HIP5015), PWM (HIP5016) VCC VIN PHASE Pentium® is a registered trademark of Intel Corporation. SynchroFET™ is a trademark of Intersil Corporation. 2-8 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 HIP5015, HIP5016 Non-Inverting SynchroFET Block Diagram HIP5015 VCC VIN DRIVER ADAPTIVE SHOOT-THROUGH PROTECTION BUFFER PHASE PWM VCC DRIVER GND Inverting SynchroFET Block Diagram HIP5016 VCC VIN DRIVER ADAPTIVE SHOOT-THROUGH PROTECTION BUFFER PHASE PWM VCC DRIVER GND 2-9 HIP5015, HIP5016 Absolute Maximum Ratings Thermal Information (Typical) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +16V Input Voltage VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V IPHASE, IVIN, IGND . . . . . . . . . . . . . . . . . . . . . 7A (Repetitive Peak) PWM Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -4V to +16V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 3 (4kV) Lead Temperature (Soldering 10s) (Lead Tips Only). . . . . . . 300oC Storage Temperature Range . . . . . . . . . . . . . . . . . . -65oC to 150oC Junction Temperature Range . . . . . . . . . . . . . . . . . . -40oC to 150oC Operating Conditions Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V, ±20% Input Voltage VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 5.5V Supply Voltage, VCC, minimum for charge-pumped start-up . . . .+4.0V θJA (oC/W)† θJC †† (oC/W) 0 1 2 3 3††† SIP (IS). . . . . 2 55 30 25 24 18 SIP (IS1). . . . 2 55 - - - - Package Versus additional square inches of 1 ounce copper on the printed circuit board. †† θJC is typical with an infinite heatsink. ††† 200 linear feet per minute of air flow. IPHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5A IVIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4A IGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3A † CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the recommended operating conditions of this specification is not implied. Electrical Specifications TJ = - 40oC TJ = +150oC TJ = 25oC PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN MAX UNITS rDS(ON) Upper MOSFET RDSU VCC = 12V, VIN = 5V - 68 78 - 130 mΩ rDS(ON) Lower MOSFET RDSL VCC = 12V, VIN = 5V - 72 82 - 136 mΩ VIN Operating Current IVINO VIN = 5V, No Load, 500kHz - 1.8 4 - 5 mA VIN Quiescent Current IVIN PWM or PWM = VCC or GND - 0.1 10 - 100 µA VCC Operating Current ICCO VCC = 12V, 500kHz - 4.3 7 - 9 mA VCC Quiescent Current (HIP5015) ICCIH PWM = VCC - 40 - - 300 µA VCC Quiescent Current (HIP5015) ICCIL PWM = GND - 0.1 10 - 100 µA VCC Quiescent Current (HIP5016) ICCNIH PWM = VCC - 0.1 10 - 100 µA VCC Quiescent Current (HIP5016) ICCNIL PWM = GND - 100 - - 300 µA Low Level PWM Input Voltage VIL - 1.8 - 1 - V High Level PWM Input Voltage VIH - 2.1 - - 3 V PWM Input Voltage Hysteresis VIHYS - 0.3 - - - V Input Pulldown Resistance (HIP5015) RPWM - 220 - 100 400 kΩ Input Pullup Resistance (HIP5016) RPWM - 220 - 100 400 kΩ Switching Specifications TJ = - 40oC TJ = +150oC TJ = 25oC PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX MIN MAX UNITS Upper Device Turn-Off Delay tPHL VCC = 12V, IPHASE = -0.5A - 30 50 - 80 ns Lower Device Turn-Off Delay tPLH VCC = 12V, IPHASE = +0.5A - 30 50 - 80 ns Dead Time tDT VCC = +12V, IPHASE = -0.5A - 10 - - - ns Phase Rise-Time tr VCC = 12V, IPHASE = -0.5A - 20 - - - ns Phase Fall-Time tf VCC = 12V, IPHASE = +0.5A - 20 - - - ns 2-10 HIP5015, HIP5016 Pin Descriptions SYMBOL DESCRIPTION VCC Positive supply to control logic and gate drivers. De-couple this pin to GND. VIN FET Switch Input Voltage. De-couple this pin to GND. PHASE Output. PWM (HIP5015) PWM (HIP5016) GND Single Ended Control Input. This input connects to the PWM controller output. System Ground. Timing Diagram 12V PWM (HIP5015) 2V 0V 12V PWM (HIP5016) 2V 0V tPHL tPLH 5V 4.5V PHASE 2.5V 0.5V 0V -0.5V tf NOTE: IPHASE = +0.5A for tPLH and tf , IPHASE = -0.5A for tPHL, tDT, and tr. FIGURE 1. 2-11 tDT tr HIP5015, HIP5016 Typical Performance Curves 10 4 9 3.5 8 3 6 IVINO (mA) ICCO (mA) 7 5 4 2.5 2 1.5 3 1 2 0.5 1 0 0 100 200 300 400 500 600 700 800 900 0 1000 0 100 200 300 400 FREQUENCY (kHz) 220 220 200 200 180 180 160 160 rDSL (mΩ) 240 VIN = 5V VIN = 3.3V 120 100 80 60 60 5 6 7 8 9 10 11 900 1000 12 13 14 15 16 VIN = 5V AND 3.3V 40 4 5 6 7 8 9 10 11 12 VCC (V) VCC (V) FIGURE 4. RDSU vs VCC FIGURE 5. RDSL vs VCC 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -40 -20 0 20 40 60 80 TEMPERATURE (oC) 100 120 FIGURE 6. RDSU OR RDSL vs TEMPERATURE 2-12 800 120 80 4 700 140 100 40 600 FIGURE 3. IVINO vs FREQUENCY 240 RDSU OR RDSL (NORMALIZED) rDSU (mΩ) FIGURE 2. ICCO vs FREQUENCY 140 500 FREQUENCY (kHz) 140 13 14 15 16 HIP5015, HIP5016 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. 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