Si2306BDS-DS

SPICE Device Model Si2306BDS
Vishay Siliconix
N-Channel 30-V (D-S) MOSFET
CHARACTERISTICS
• N-Channel Vertical DMOS
• Macro Model (Subcircuit Model)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery
Characteristics
DESCRIPTION
The attached spice model describes the typical electrical
characteristics of the n-channel vertical DMOS. The subcircuit
model is extracted and optimized over the −55 to 125°C
temperature ranges under the pulsed 0-V to-10-V gate drive. The
saturated output impedance is best fit at the gate bias near the
threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model
the gate charge characteristics while avoiding convergence difficulties
of the switched Cgd model. All model parameter values are optimized
to provide a best fit to the measured electrical data and are not
intended as an exact physical interpretation of the device.
SUBCIRCUIT MODEL SCHEMATIC
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate
data sheet of the same number for guaranteed specification limits.
Document Number: 73318
S-50395Rev. A, 14-Mar-05
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SPICE Device Model Si2306DS
Vishay Siliconix
SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED)
Parameter
Symbol
Test Condition
Simulated
Data
VGS(th)
VDS = VGS, ID = 250 µA
1.8
Measured
Data
Unit
Static
Gate Threshold Voltage
On-State Drain Current
a
Drain-Source On-State Resistance a
ID(on)
rDS(on)
V
VDS ≥ 5 V, VGS = 10 V
115
VGS = 10 V, ID = 3.5 A
0.038
0.038
VGS = 4.5 V, ID = 2.8 A
0.048
0.052
A
Ω
Forward Transconductance a
gfs
VDS = 15 V, ID = 2.5 A
3
7
S
Diode Forward Voltage a
VSD
IS = 1.25 A, VGS = 0 V
0.72
0.80
V
Dynamic b
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Gate Charge
Qg
Total Gate Charge
Qgt
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
304
305
VDS = 15 V, VGS = 0 V, f = 1 Mhz
66
65
21
29
VDS = 15 V, VGS = 5 V, ID = 2.5 A
2.5
3
VDS = 15 V, VGS = 10 V, ID = 2.5 A
5.1
6
1.6
1.6
0.60
0.60
pF
nC
Notes
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2%.
b. Guaranteed by design, not subject to production testing.
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Document Number: 73318
S-50395Rev. A, 14-Mar-05
SPICE Device Model Si2306BDS
Vishay Siliconix
COMPARISON OF MODEL WITH MEASURED DATA (TJ=25°C UNLESS OTHERWISE NOTED)
Document Number: 73318
S-50395Rev. A, 14-Mar-05
www.vishay.com
3
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Document Number: 91000
Revision: 18-Jul-08
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