DS8807B 01

RT8807B
Two Phases Synchronous Buck PWM Controller
General Description
Features
The RT8807B is a two phases synchronous Buck PWM
controller with integrated drivers which is optimized for
high-performance graphic microprocessor and computer
applications. The IC integrates a voltage mode PWM
controller, two 5V MOSFET drivers with internal bootstrap
diodes, as well as output current monitoring and protection
functions into the WQFN-24L 4x4 package.
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Two-Phase Power Conversion with Single 12V
Power Supply
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Embedded 5V Upper Gate Driver and 12V Lower
Gate Driver
Internal Regulated 5V Output
Precise Core Voltage Regulation
Selectable Internal / External Reference
Differential Inductor DCR Current Sense
External Programmable Voltage Droop Control
Enable Control for External Shutdown
Adjustable Operating Frequency
Adjustable Soft Start
Power Good and Output Current Indication
Adjustable Over Current Protection
Under Voltage Protection
Over Temperature Protection
RoHS Compliant and Halogen Free
The inductor currents are sensed by lossless DCR current
sensing technique for current balance and over current
protection. The RT8807B also features a reference tracking
mode operation in which the feedback voltage is regulated
and tracks external input reference voltage. Other features
include output current indication, adjustable operating
frequency, adjustable soft-start, power good, external
compensation, and enable/shutdown functions.
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Ordering Information
RT8807B
Applications
Pin Configurations
24
23
22
21
20
19
UGATE1
1
18
UGATE2
BOOT1
2
17
BOOT2
5VCC
3
16
REFOUT/PGOOD
AGND
4
15
REFIN/EN
EN2B
5
14
SS
CSP1
6
13
FB
PGND
CSN1
7
8
9
10
11
12
RT
25
COMP
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
PHASE2
Marking Information
LGATE2
Suitable for use in SnPb or Pb-free soldering processes.
IOUT/IMAX
`
DROOP
(TOP VIEW)
ments of IPC/JEDEC J-STD-020.
VCC
RoHS compliant and compatible with the current require-
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LGATE1
Richtek products are :
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CSP2
Note :
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Middle to High End GPU Core Power
High End Desktop PC Memory Core Power
Low Voltage, High Current DC / DC Converter
Voltage Regulator Modules
CSN2
Lead Plating System
G : Green (Halogen Free and Pb Free)
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PHASE1
Package Type
QW : WQFN-24L 4x4 (W-Type)
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WQFN-24L 4x4
DS8807B-01 April 2011
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1
RT8807B
Typical Application Circuit
VCC
12V
EXT_12V
+
EXT_12V EXT_12V_DETB
DET
Circuits
R1
R2
5
R3
C1
Internal Reference mode
5VCC
C2
R4
16 REFOUT/
PGOOD UGATE1
22
VCC
PHASE1
3
5VCC
LGATE1
15 REFIN/
EN
4
AGND
BOOT2
14
SS
11
UGATE2
RT
C4
12
COMP
C5
R7
R16
Optional
C18
PHASE2
LGATE2
CSN2
13
FB
CSP2
R8
21
CSN1
DROOP
CSP1
2
1
Q1
C8
EXT_12V
/VCC12V
VOUT
L1
24
23
Q2
17 R15
C10
C12
C11
C13
C9
18
Q3
L2
19
+
10 IOUT/
IMAX
R5
R6
BOOT1
C7
+
C3
External Reference
Voltage (0.45 to 2.5V)
EN2B
C6
R14
+
Optional
RT8807B
20
C14
Q4
8
R10
7
R11
9
R12
6
R13
C16
C15
PHASE2
PHASE1
C17
R9
Figure 1. Typical Application Circuit with 12V Input
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DS8807B-01 April 2011
RT8807B
Function Block Diagram
5VCC
EN2B
5VCC
VCC
BOOT1
Gate
Control
Logic &
Shoot
Through
Prevention
5VCC Regulator &
Power On Reset
Oscillator &
Ramp
Generator
RT
REFIN/EN
REF Select
REFOUT/PGOOD
0.6V
REF
Soft Start
SS
AGND
Pulse
Width
Modulator
& Central
Control
Logic
VCC
LGATE1
PGND
BOOT2
Gate
Control
Logic &
Shoot
Through
Prevention
UGATE2
PHASE2
VCC
LGATE2
PGND
OCP
Error
Amplifier
+
Current SENSE
COMP
+
GM1
+
GM2
-
-
FB
PHASE1
5VCC
REF Buffer
50% 75% 115%
UV/OV
Protection &
PGOOD
UGATE1
IOUT/IMAX
CSP1
CSN1
CSP2
CSN2
DROOP
Power up scheme to support dual power rails application
This feature is to support the following case in the application where one phase is powered by PCIEBUS_12V and the
other phase is powered by EXT_12V.
`When the system is powered without EXT_12V Cable, RT8807B will work with one phase and be able to boot system
into Dos Warning screen.
`The Warning message tells user to power off the system first, plug in the EXT_12V Cable, and then reboot the system
again.
`After system re-boot, RT8807B could work with two phases.
Below is the power up sequence for dual VIN (PCIEBUS_12V & EXT_12V) application. This application is classified
into two cases :
<1> The external connector is not plugged while power on
The EXT_12V_DETB is pulled up to High. Soft-start will be released to ramp up after POR. After T1, RT8807B latches
EN2B signal and determines to operate in single phase. The time interval T1 is used to wait EN2B ready. Once single
phase is confirmed, the external 12V power connector plugged or not will not affect the status.
<2> The external connector is plugged while power on
The EXT_12V_DETB is grounded by external cable detection circuits. RT8807B latches EN2B at T1 and determines to
operate in two phases. If the connector is removed later, RT8807B will turn off phase 2 and enter single phase operation
mode. Further plugged in/out will not affect the status anymore.
DS8807B-01 April 2011
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3
RT8807B
~us
First PWM Pulse
VIN Detection Latch Signal
T1
Soft-Start
EN2B/EXT_12V_DETb
One/Two Phase Operation
Two Phase
One Phase
Figure 2. External Connector is not Plugged
~us
First PWM Pulse
VIN Detection Latch Signal
T1
Soft-Start
EN2B/EXT_12V_DETb
One/Two Phase Operation
Two Phase
One Phase
Figure 3. External Connector is Plugged
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DS8807B-01 April 2011
RT8807B
Functional Pin Description
UGATE1 (Pin 1), UGATE2 (Pin 18)
FB (Pin 13)
Upper Gate Drivers. Theses pins provide the gate drive for
the converter's high-side MOSFET. Connect these pins
to the high-side MOSFET gate.
Feedback Pin. This pin is connected to the PWM converter
output's voltage or a resistor divider. This pin also connects
to the inverting input of error amplifier and the PGOOD/
UV/OV detection circuits.
BOOT1 (Pin 2), BOOT2 (Pin 17)
Bootstrap Power Pins. Theses pins power the high-side
MOSFET drivers.
5VCC (Pin 3)
SS (Pin 14)
Soft-Start Pin. Connect a capacitor from this pin to ground
to set the soft-start interval.
Internal Regulator Power Pin. The regulated voltage
provides power supply for all low-voltage circuits. Bypass
at least 1uF ceramic capacitor to sustain high PSRR.
REFIN/EN (Pin 15)
AGND (Pin 4)
`If driven by external voltage ranged from 0.45V to 2.5V,
external reference is used
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
External Reference Input.
`If pulled up to 5VCC, internal reference is used (0.6V)
`If pulled below 0.4V, device is disabled.
EN2B (Pin 5)
REFOUT/PGOOD (Pin 16)
EXT_12V Detection Pin. RT8807B latches high/low status
of this pin in soft start period. If the result is low, RT8807B
will enter two phase operation. If it's high, RT8807B turns
off phase2 and operate in single phase only.
Reference Out and Power GOOD. This pin drives 1.15V
out once FB exceeds ~72.5% of the reference voltage
after soft- start ends. This pin keeps at this voltage
regardless of internal or external reference is used.
CSP1 (Pin 6), CSP2 (Pin 9)
These pins are positive input of current sensing
transconductance amplifiers 1 and 2.
CSN1 (Pin 7), CSN2 (Pin 8)
These pins are negative input of current sensing
transconductance amplifiers 1 and 2.
IOUT/IMAX (Pin10)
Output Current Indication. This pin sends a current out
(IX) referred to the sum of two sensed inductor currents
sense value. Connect this pin through a resistor to ground.
(IOUT = 4 x IX). This pin also sets maximum current limit
threshold.
PHASE1 (Pin 24) PHASE2 (Pin 19)
These pins are return nodes of the high-side driver.
Connect these pins to high-side MOSFET sources
together with the low-side MOSFET drain and the
inductors.
LGATE1 (Pin 23), LGATE2 (Pin 20)
Lower Gate Drivers. Theses pins provide the gate drive for
the converter's low-side MOSFET. Connect these pins to
the low-side MOSFET gate.
DROOP (Pin 21)
Set the load line for droop control. Connect this pin with a
resistor to ground.
RT (Pin11)
VCC (Pin 22)
Frequency Timing Resistor. Connect a resistor from RT
to AGND to set the clock frequency.
Provide a 12V supply voltage for the IC. Connect a
10Ω/1uF low pass filter to sustain high PSRR.
COMP (Pin 12)
PGND [Exposed Pad (25)]
Compensation Pin. This pin is the output of the error amplifier.
Power ground pin. Tie the synchronous PWM converter's
low-side MOSFET source to this pin.
DS8807B-01 April 2011
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5
RT8807B
Absolute Maximum Ratings
(Note 1)
Supply Voltage, VCC ------------------------------------------------------------------------------------PHASE to GND
DC -----------------------------------------------------------------------------------------------------------< 200ns ----------------------------------------------------------------------------------------------------z BOOT to PHASE ----------------------------------------------------------------------------------------z BOOT to GND
DC -----------------------------------------------------------------------------------------------------------< 200ns ----------------------------------------------------------------------------------------------------z UGATE
DC -----------------------------------------------------------------------------------------------------------< 200ns ----------------------------------------------------------------------------------------------------z LGATE
DC -----------------------------------------------------------------------------------------------------------< 200ns ----------------------------------------------------------------------------------------------------z Other Input, Output or I/O Voltage -------------------------------------------------------------------z Power Dissipation, PD @ TA = 25°C
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−0.3V to 15V
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WQFN−24L 4x4 ------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
WQFN−24L 4x4, θJA ------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------Junction Temperature -----------------------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Mode) ----------------------------------------------------------------------------MM (Machine Mode) -------------------------------------------------------------------------------------
Recommended Operating Conditions
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−2V to 15V
−5V to 22V
−0.3V to 7V
−0.3V to VCC + 7V
−0.3V to 30V
VPHASE −0.3V to VBOOT + 0.3V
VPHASE −2V to VBOOT + 0.3V
−0.3V to VCC + 0.3V
−2V to VCC + 0.3V
−0.3V to 7V
1.923W
52°C/W
260°C
150°C
−40°C to 150°C
2kV
200V
(Note 4)
Supply Voltage -------------------------------------------------------------------------------------------- +12V ±10%
Junction Temperature Range --------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range --------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 12V, PGND = 0V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
10.8
12
13.2
V
--
5
--
mA
VCC Supply Input
VCC Supply Voltage
VCC
VCC Supply Current
ICC
REFIN/EN = 0V (static)
5VCC Supply Voltage
V5VCC
V CC = 12V
4.8
5.15
5.5
V
5VCC Output Sourcing
I5VCC
V CC = 12V
20
--
--
mA
5VCC Supply Output
To be continued
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DS8807B-01 April 2011
RT8807B
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
6.7
7.5
8.3
V
--
0.45
--
V
1
1.15
1.3
V
0.35
0.4
0.45
V
--
50
--
mV
0.45
--
2.5
V
0.591
0.6
0.609
V
−1.5
--
+1.5
%
V REFIN = 0.45V to 0.6V
−6
--
+6
mV
V REFIN = 0.6V to 2.5V
−1
--
+1
%
1.127
1.15
1.173
V
−2
--
+2
%
3
5
--
mA
Power-On Reset
VCC Rising Threshold
V VCCTH
V CC Rising
VCC Hysteresis
V VCCHY
EN2B High Threshold
V EN2BTH
EN2B Rising
Enable Rising Threshold
V ENTH
REFIN/EN Rising
Enable Hysteresis
V ENHYS
REFIN/EN
REFIN Tracking Range
Reference Voltage Accuracy (use Internal Reference)
Reference Voltage
Accuracy
V REF
REFIN Pull-High to 5VCC
FB Coupled to COMP
Reference Voltage Accuracy (use External Reference)
Accuracy
REFOUT / PGOOD
REFOUT/PGOOD Voltage
Accuracy
REFOUT Output Sourcing
V REFOUT
V FB > 75% of Reference Voltage
IREFOUT
Error Amplifier
DC Gain
A DC
No load
--
70
--
dB
Gain-Bandwidth
GBW
CLOAD = 10pF
--
8
--
MHz
Slew Rate
SR
CLOAD = 10pF
5
--
--
V/us
Transconductance
GM
--
2400
--
uA/V
100
--
--
uA
450
500
550
kHz
Current Sense Amplifier
Max Current
IGM(MAX)
V CSP = 1V
Sink Current from CSN
Oscillator
Running Frequency
fOSC
RRT = 20kΩ
Max Duty Cycle
D
70
75
80
%
Ramp Amplitude
ΔVRAMP
--
2.6
--
V
Soft Start
Soft Start Current
ISS
14
20
30
uA
2.07
2.3
2.53
V
45
55
63
%
--
160
--
°C
65
72.5
80
%
Protection
Over Current Threshold
V OCP
Sweep IOUT/IMAX Voltage
Under-Voltage Threshold
V UVP
Sweep FB Voltage
Over Temperature Threshold
T OTP
Power GOOD
Active Threshold
V FB Rising
To be continued
DS8807B-01 April 2011
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7
RT8807B
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
--
1.5
3
Ω
--
1.5
4
Ω
Gate Driver
BOOT − PHASE = 5V
Upper Drive Source
RUSOURCE
Upper Drive Sink
RUSINK
Lower Drive Source
ILSOURCE
VCC = 12V
VLGATE = 6V
1
--
--
A
Lower Drive Sink
RLSINK
VCC = 12V
250mA Sink Current
--
0.9
2
Ω
250mA Source Current
BOOT − PHASE = 5V
250mA Sink Current
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θ JA is measured in the natural convection at T A = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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DS8807B-01 April 2011
RT8807B
Typical Operating Characteristics
Switching Frequency vs. Temperature
Start Up in Short Circuit
430
Switching Frequency (kHz)1
VIN = 12V
420
IOUT/IMAX
(2V/Div)
VOUT
(1V/Div)
410
400
390
380
I LOAD
(50A/Div)
370
360
VIN = 12V, VOUT = 1.2V, No Load, RRT = 26.1k
350
-40
-20
0
20
40
60
80
100
120
PHASE2
(10V/Div)
140
Time (250us/Div)
Temperature (°C)
Over Current Protection
Power On from REFIN
VIN = 12V, VOUT = 1.2V
IOUT/IMAX
(2V/Div)
SS
(1V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
I LOAD
(50A/Div)
REFIN
(200mV/Div)
PHASE2
(10V/Div)
PGOOD
(1V/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 55A
Time (250us/Div)
Time (2ms/Div)
Power Off from REFIN
Power On from VCC
SS
(1V/Div)
SS
(1V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
REFIN
(500mV/Div)
VCC
(5V/Div)
PGOOD
(1V/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 55A
Time (1ms/Div)
DS8807B-01 April 2011
PGOOD
(1V/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 55A
Time (2ms/Div)
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RT8807B
Single-phase Operation
Power Off from VCC
SS
(1V/Div)
UGATE1
(20V/Div)
VOUT
(1V/Div)
EN2B
(2V/Div)
VCC
(5V/Div)
VOUT
(1V/Div)
PGOOD
(1V/Div)
UGATE2
(20V/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 55A
VIN = 12V, VOUT = 1.2V, No Load
Time (100us/Div)
Time (50ms/Div)
Inductor Current vs. Output Current
Two-phase to Single-phase
30
25
Inductor Current (A)
UGATE1
(20V/Div)
EN2B
(2V/Div)
VOUT
(1V/Div)
20
IL1
15
IL2
10
5
UGATE2
(20V/Div)
VIN = 12V, VOUT = 1.2V, No Load
VIN = 12V, VOUT = 1.2V, FSW = 400kHz
0
0
Time (50ms/Div)
5
10
15
20
25
30
35
40
45
50
55
Output Current (A)
Efficiency vs. Output Current
90
FSW = 300kHz
85
FSW = 400kHz
Efficiency (%)
80
75
70
65
60
55
VIN = 12V, VOUT = 1.2V
50
0
5
10
15
20
25
30
35
40
45
50
55
Output Current (A)
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DS8807B-01 April 2011
RT8807B
Application Information
The RT8807B is a dual-phase voltage-mode synchronous
buck controller with embedded MOSFET drivers and
protection functions for low-voltage high-current
applications. The bootstrap diode is integrated into the IC
to reduce the external component count. In addition, the
number of operating phase (two-phase/single-phase) is
selectable to provide user with more flexibility in circuit
design. The inductor current is sensed by innovative DCR
current sensing technique for current balance and over
current protection.
Power On Reset
The RT8807B initiates its soft start cycle only after the IC
power supply, VCC, and the internal regulated 5VCC are
ready. The internally regulated 5VCC is used for all of the
internal logic control circuit and the embedded high-side
MOSFET driver. The bootstrap diode for the high-side
MOSFET driver is integrated into the IC to reduce the
external component count. In addition, VCC is used for
the low-side MOSFET driver to reduce the RDS(ON) of the
low-side MOSFET for enhanced efficiency consideration.
The power on reset (POR) circuitry monitors the supply
voltage to ensure that the supply voltage is high enough
for controller's normal operation. Once VCC and 5VCC
exceed the POR rising threshold, the RT8807B releases
the reset state, and works according to the settings.
Additionally, once any one of these two voltages is lower
than its POR falling threshold value, the chip turns off.
The hysteresis between the rising and falling thresholds
ensures that once the chip is enabled, it will not be
inadvertently turned off unless the bias voltage drops
substantially.
Soft Start and Power Good
Once the POR state is released, the soft start cycle
begins. A 20uA current source charges the capacitor, CSS,
which is connected between SS pin and GND to set the
soft start time. Figure 4 shows the power on sequence.
DS8807B-01 April 2011
VVCCTH ˜ 7.5V
VCC
SS
72.5% of VOUT
VOUT
PGOOD
Figure 4. Power on Sequence
During the soft start, the voltage on SS pin gradually
increases, and the output voltage of the error amplifier is
clamped to prevent the inrush current from the input
capacitors. Once the output voltage exceeds the power
good threshold level (72.5% of output voltage), REFOUT/
PGOOD pin will drive and maintain an reference voltage
1.15V unless VCC falls below POR threshold or Under
Voltage occurs.
Internal/External Reference
The RT8807B supports the selectable internal/external
reference voltage to provide more flexibility in practical
applications. The selection of the internal/external
reference is described in detail as follows.
a. Using Internal Reference
The internal reference voltage of the RT8807B is set at
0.6V. When using the internal reference, REFIN/EN pin
should be connected to 5VCC. REFIN/EN pin is also used
for the enable function, the RT8807B will not be enabled
at start up if the voltage at the REFIN/EN pin is lower than
VENTH.
b. Using External Reference
To use the external reference, the applied voltage on
REFIN/EN pin should be within the tracking range (typically
between 0.45V to 2.5V). This externally input voltage is
used as the reference voltage for the error amplifier.
Therefore, the RT8807B operates in the tracking mode
because the feedback voltage continuously tracks the
external reference voltage.
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11
RT8807B
Operating Frequency Setting
The converter switching frequency is programmed by
simply connecting the resistor RRT between RT pin and
GND. Make sure the RRT is firmly connected between RT
pin and GND with a short trace length. If the RRT is removed,
there will not be any free running frequency. Figure 5
illustrates the switching frequency versus RRT.
Switching Frequency vs. RRT
1100
As shown in Figure 6, the differential GM amplifier converts
the voltage signal to a current signal IX for current balance
and output voltage droop control. The following equations
provide the calculation to determine the parameter values
of the current sensing network and RCSN.
If
1000
Switching Frequency (kHz)
R-C network is equal to the time constant of the inductor,
the voltage drop across the DCR is equal to the voltage
across the capacitor, namely VDCR = VC.
900
L = R × C, than V = V
C
DCR = DCR × IL
DCR
The GM amplifier output current IX =
800
VC
RCSN
700
L
600
500
DCR
+ V DCR -
IL
400
C
300
R
200
+ VC -
+
100
-
0
GMx
0
25
50
75
100
125
150
175
200
225
R CSN
Ix
RRT (k
ٛ)
(kΩ)
Figure 6. DCR Current Sense Circuit
Figure 5. Switching Frequency vs. RT Resistance
Dead Zone Elimination
Control Loop
The RT8807B is a two-phase voltage-mode PWM
controller. The control loop includes the power stage
(MOSFETs, inductors and output capacitors), the error
amplifier, the compensation network and the PWM
modulator. The converter's output voltage is sensed as
the feedback voltage through the divider resistors and then
fed into the negative input of the high-gain error amplifier.
The two-phase PWM signals are generated by the PWM
modulator, which compares the output voltage of the error
amplifier with two sawtooth waves, which are out of phase.
Therefore, the output voltage of the converter is determined
by the on-time duty ratio of the PWM signals. With proper
compensation, the feedback voltage can be regulated to
be equal to the reference voltage VREF with required
transient response.
Inductor Current Sense Setting
When the converter is in the light load condition, the voltage
across the sensing capacitor, VC, will be negative. However,
the RT8807B can not provide a negative I X and
consequently is not able to sense the negative inductor
current. This results in a dead zone in the load line
application. Therefore, a technique as shown in Figure 7
is utilized to eliminate the dead zone of the load line at
light load condition. Referring to Figure 7, IX can be
expressed as follows when voltage VC is negative.
IX =
(VOUT + IL × DCR) IL × DCR
+
RCSN2
RCSN
To make sure that the RT8807B can sense the inductor
current, the right hand side of the above equation should
always be positive :
VOUT
I × DCR IL × DCR
+ L
+
≥0
RCSN2
RCSN2
RCSN
The DCR current sensing is a well-known lossless
technique to obtain a voltage signal which is proportional
to the inductor current. When the time constant of the
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DS8807B-01 April 2011
RT8807B
Since RCSN2 >> DCR in practical application, the above
equation can be simplified as :
Sensed Output
Current
(IX1 + IX2 ) x 2
VOUT
I × DCR
≥ L
RCSN2
RCSN
Therefore, RCSN2 ≤ VOUT ×
RCSN
IL × DCR
R IMAX
For example, assuming the negative inductor current is
equal to -5A at no load condition. For RCSN = 390Ω,
DCR = 1.7mΩ, VOUT = 1.2V,
390
-5 × 1.7 × 10-3
≤ 55.06kΩ
RCSN2 ≤ 1.2 ×
RCSN2
Choose RCSN2 = 54.9kΩ
L
IL
R
DCR
+ V DCR C
+ VC -
V OUT
+
-
R CSN
GMx
Ix
OCP Circuit
IOUT/IMAX
R CSN2
Figure 7. Application Circuit for Dead Zone Elimination
Optional
Figure 8. Over Current Protection Function
Output Voltage Droop Control and Load Line
Setting
The RT8807B supports the adaptive voltage droop control.
The concept of the output voltage droop control is to set
the output voltage level to be regulated slightly higher than
the minimum value at light load, and somewhat lower than
the maximum value at full load. As shown in Figure 9, a
larger downward voltage drop during step load is allowed,
which means the number of the required output capacitors
can be reduced or allows the use of capacitor with higher
ESR.
As a result, the full window of output voltage tolerance
can be used during the transient period (see Figure 10),
which reduces the overall cost. Another advantage of
output voltage droop control is that the output power of
the converter at full load is reduced, which greatly facilitates
the thermal design.
IOUT
Over Current Protection Function
RIMAX =
ΔI
?IOUT
V OUT(max)
V OUT
With Droop
?V OUT
ΔV
OUT
V OUT(min)
Figure 9. Output Voltage with Droop
Output Voltage Tolerance
Window
The over current threshold is determined by the resistor
connected to IOUT/IMAX pin. The two GM amplifier's
output currents are summed together and doubled, and
then flows out into the resistor RIMAX, which is connected
between IOUT/IMAX pin and the ground. As shown in
Figure 8, the RT8807B uses an external resistor RIMAX to
set a programmable over current trip point. Once the voltage
across the RIMAX exceeds the threshold VOCP, the OCP
function will be triggered. The following equation provides
the calculation of the RIMAX value for a given maximum
inductor current. If necessary, a small ceramic capacitor
is recommended to be paralleled with the resistor for noise
filtering to obtain accurate over current protection.
V OUT (V)
V OUT(max)
V OUT(min)
VOCP × RCSN
2 × ILOAD(MAX) × DCR
IOUT (A)
No Load
Full Load
Figure 10. Load Line
DS8807B-01 April 2011
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13
RT8807B
The two GM amplifier output currents (IX1 & IX2) are
internally summed and doubled, and then sent to DROOP
pin for droop setting. This current flows through the external
resistor RDROOP, which is connected between DROOP and
GND.
Therefore, the voltage across RDROOP becomes loadcurrent-dependent. As shown in Figure 11, the voltage
across RDROOP is subtracted from the internal/external
reference voltage and then sent to the positive input of the
error amplifier. Therefore, the load line slope can be
calculated using the following equation.
Load line slope =
ΔVOUT 2 × DCR × RDROOP
+
ΔIOUT
RCSN
Internal/External
Reference
+
EA
-
-
To PWM
Comparator
Sensed Output
Current
(IX1 + IX2) x 2
FB
COMP
+
R DROOP
V DROOP
-
Figure 11. Output Voltage Droop Setting
Operating Phase Selection
The number of operating phase is designed to be selectable
to have more flexibility in different applications. EN2B pin
is used to select the number of operating phases.
After the initial turn-on of RT8807B, an internal logic circuit
checks the voltage at EN2B pin. The threshold voltage of
dual-phase/single-phase operation is typically 1.15V. To
set RT8807B as the dual-phase PWM controller, the voltage
at EN2B pin should be kept below 1.15V.
To set RT8807B as a pure single-phase PWM controller,
connecting EN2B pin to a voltage that is higher than 1.15V
at power on. The RT8807B then disables phase 2 (UGATE2
and LGATE2 are both held low) and operates as a singlephase PWM controller.
In addition to the selectable number of operating phase,
the RT8807B supports the operating phase transition.
Notice that if the controller is set to be in dual-phase
operation (voltage at EN2B pin is below the threshold),
further changing the voltage at EN2B pin to be higher than
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14
voltage change is made at EN2B pin.
Besides, also notice that if the RT8807B is set to be in
single-phase operation (voltage at EN2B pin is higher the
threshold), it can not be changed to operate in dual-phase
no matter what voltage change is made at EN2B pin. This
dual-phase to single-phase operation transition is
unidirectional.
Compensation Network Design
+
DROOP
the threshold will change the controller’s operating state
to single-phase operation. However, this operating phase
transition can only be carried out one time and is NOT
reversible. This means that once the controller changes
its operating state from dual-phase to single-phase, it can
not back to dual-phase operation no matter what the
In order to have an accurate output voltage regulation with
fast transient response, an adequate compensator design
is necessary.
The RT8807B uses a high-gain operational
transconductance amplifier (OTA) as the error amplifier.
As Figure 12 shows, the OTA works as the voltage
controlled current source because it takes the difference
of the two voltages as the input for current conversion.
ΔIOUT
, where ΔVM = (VIN+ ) − (VIN- )
ΔVM
and ΔVC = ΔIOUT × ZOUT
GM =
V IN+
V IN-
+ GM
-
IOUT
VC
Z OUT
Figure 12. Operational Transconductance Amplifier, OTA
The OTA output current flows through an impedance to
produce a voltage, which is referred to as the control
voltage. This control voltage is then fed to the PWM
modulator to compare with the sawtooth wave.
The first step of compensator design is to calculate the
dc gain of the PWM modulator. Figure 13 shows the PWM
modulator, which is composed of the PWM comparator,
the drivers and both the high-side and low-side MOSFET.
The dc gain of the modulator is calculated by the input
voltage of the regulator, VIN, divided by the peak-to-peak
voltage of the oscillator, ΔVOSC.
DS8807B-01 April 2011
RT8807B
Gainmodulator =
VIN
ΔVRAMP
V REF
V IN
PWM
Comparator
Error Amplifier Output, V C
?V OSC
FB
RF
Driver
+
PHASE
-
+
GM
-
R1
V OUT
V COMP
C2
C1
R2
Figure 15. Type II Compensator
Driver
Figure 13. PWM Modulator
As shown in Figure 14, the inductor and the output
capacitor together form a low-pass L-C output filter. The
input to the L-C output filter is the PHASE node and the
output is the regulator output. The ESR of the output
capacitor plays an important role in the compensator
design. The L-C filter introduces a double pole to the
system transfer function with a slope of -40dB/dec above
its corner frequency and a total phase lag of 180 degree.
The ESR of the output capacitor introduces a zero to the
system transfer function with a total phase shift of 90
degree.
PHASE
LOUT
DCR
Regulator
Output
Figure 16 shows the Bode diagram of the Type II
compensator. The frequencies of the single zero and the
two poles are determined as follows.
FP1 = 0
1
FP2 =
FZ1
(
2π × R2 × C1× C2
C1+C2
1
=
2π × R2 × C2
)
F P1
F Z1
F P2
ESR
C OUT
Figure 14. Inductor and Output Capacitor
The second step is therefore to calculate the frequencies
of the pole and the zero. The frequency of the double pole
is determined as follows.
FP(LC) =
1
2π × LOUT × COUT
The frequency of the zero is determined as follows.
FZ(ESR) =
1
2π × COUT × ESR
Note that the output capacitor(s) should have enough ESR
to satisfy the stability requirement.
The third step is to design the compensation network.
There are two kinds of compensation network: Type II and
Type III, both consist of the error amplifier and the
impedance network. Figure 15 shows the Type II
compensator.
DS8807B-01 April 2011
Figure 16. Gain Curve of Type II Compensator
Figure 17 shows the Bode plot of the converter's gain vs.
frequency. The compensator helps to shape the profile of
the gain curve with respect to frequency. The zero gives a
90° boost to the phase to counteract the phase decay of
the double pole of the L-C filter. The first pole, FP1, gives a
shift to the gain curve in the low frequency range while the
second pole, FP2, provides further attenuation in the high
frequency range.
In general, a converter system control loop with high
bandwidth can achieve fast transient response but usually
tends to lose stability. Therefore, it is always a trade-off
between the control bandwidth and the system stability.
Empirically, FZ1 is placed at about 10% lower than the
double pole frequency of the L-C filter to have enough
phase margin. In general, the control bandwidth should
be higher than the frequency of the ESR zero but less
than 1/5 of the switching frequency. In addition, the FP2
should be placed at half of the switching frequency.
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15
RT8807B
Loop Gain
FZ1
60
40 40
Compensation
Gain
Gain (dB)
20
0
1
2π × R3 × C3
1
=
2π × R2 × C2
1
=
2π × (R1+R3) × C3
FP3 =
80 80
FZ2
0
F P1
Modulator
Gain
-20
-40-40
-60-60
10Hz
10vdb(vo)
100Hz
vdb(comp2)100
vdb(lo)
1.0KHz
10KHz
1k
10k
Frequency (Hz)
Frequency
100KHz
100k
1.0MHz
1M
F Z1
Figure 17. Converter System Bode Plot with Type II
Compensator
Figure 18 shows the Type III compensator, which
introduces an extra pole-zero pair by inserting a series RC circuit between the VOUT node and the FB node.
F P2
F P3
Figure 19. Gain Curve of Type III Compensator
Figure 20 shows the Bode diagram of the converter's gain
vs. frequency with Type III compensator. It is recommended
that FZ1 is placed at half of the L-C double pole, FZ2 is
placed at the LC double pole, FP1 is placed at the ESR
zero and FP2 is placed at half of the switching frequency.
Loop Gain
60
40
Compensation Gain
20
0
dB
For systems with low DCR and ESR parameters, the overall
efficiency can be higher and the output voltage ripple can
be lower. However, systems that have such L-C filters will
experience a very sharp slope downward in the phase
curve at the double pole and will be more difficult to
compensate. Compared to the Type II compensator, the
Type III compensator adds a pole-zero pair. The Type III
compensator utilizes two zeros to give a 180° phase boost,
and is usually used to compensate a converter with low
ESR output capacitors (e.g. OSCON or pure MLCC) to
provide the necessary phase margin for stability.
F Z2
Gain
-20
-40
C3
V REF
-60
+
GM
-
R1
V OUT
Modulator Gain
R3
FB
RF
V COMP
C2
R2
C1
Figure 18. Type III Compensator
Figure 19 shows the Bode diagram of the Type III
compensator. The frequencies of the three poles and two
zeros are determined as follows.
FP1 = 0
FP2 =
1
(
2π × R2 × C1× C2
C1+C2
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16
-80
2
3
4
5
6
7
Log Frequency
Figure 20. Converter System Bode Plot with Type III
Compensator
Over Temperature Protection
The operating temperature within the chip is continuously
monitored. The chip will be shut down when OTP occurs
with a typical trip point of 160°C.
)
DS8807B-01 April 2011
RT8807B
Power Stages
One of the most important concerns in designing a multiphase converter is to determine the number of phases.
Determining the number of phases highly depends on the
overall cost, the system constraints, and usually differs
case by case. The main concerns for the circuit designer
include the total available board space, the type of
component that can be used (through-hole/surface mount
device), the maximum load current, and of the most
importance, total cost. In general, the most economical
solutions are those in which each phase handles a current
ranging from 20A to 25A (using one high-side MOSFET
and one low-side MOSFET). Design with all surface mount
devices will tend toward to the lower end of this current
range due to the power dissipation capability. If the power
device in through-hole type is available, higher current
per phase is possible. In cases where the board area is
the design limitation, the current per phase can be pushed
up to 40A. However, these designs require appropriate
heat sinks and forced air cooling to remove the large
amount of heat, which is generated by the power
MOSFETs, the inductors and the PCB copper traces.
MOSFET Selection
The majority of power loss in the step-down power
conversion is due to the loss in the power MOSFETs. In
the low-voltage high-current applications, the duty cycle
of the high-side MOSFET is small. Therefore, the switching
loss of the high-side MOSFET is of concern. Power
MOSFETs with lower total gate charge are preferred in
choosing the high-side power devices.
However, the small duty cycle means the low-side
MOSFET is on for most of the switching cycle. Therefore,
the conduction loss tends to dominate the total power
loss of the converter. To improve the overall efficiency, the
MOSFETs with low RDS(ON) are preferred in the circuit
design. In some cases, more than one MOSFET are
connected in parallel to further decrease the on-state
resistance. However, this depends on the low-side
MOSFET driver capability and the budget.
Package Power dissipation
It is also important to consider the amount of power being
dissipated in the two embedded MOSFET drivers when
DS8807B-01 April 2011
choosing power switches. Since there are two drives in
the same package, the total power dissipation must not
exceed the maximum allowable power dissipation for the
WQFN package. Calculating the power dissipation in the
drivers is crucial to ensure a safe operation of the controller.
Exceeding the maximum allowable power dissipation will
let the IC to be operated beyond the recommended
maximum junction temperature of 125°C.
The maximum power dissipation for the 4x4 WQFN
package is approximately equal to 1.923W at room
temperature. The following equations provide the integrated
drivers' power dissipation estimation.
PD = (CUGATE x VBOOT − PHASE2 x fSW) + (CLGATE x VCC2 x
fSW)
TJ = TA + (θJA x PD)
where the CUGATE and the CLGATE represent the CISS of the
high-side MOSFET and the low-side MOSFET,
respectively. From the above equations, it is clear that
the junction temperature is directly proportional to the
total CISS of all the external MOSFETs.
For instance, if CUGATE = 1nF, CLGATE = 5nF (two MOSFETs
in parallel), VBOOT−PHASE = 5V, VCC = 12V, switching
frequency fsw = 300kHz, the power dissipation in the driver
per phase can be obtained :
PD ≈ 1n x 52 x 300k + 2 x 5n x 122 x 300k = 439mW
Assuming the room temperature is equal to 30°C, the
junction temperature for two-phase operation is :
TJ = 30°C + (52°C/W) x (0.439W x 2) = 75.6°C < 125°C,
which means the junction temperature is below the
maximum recommended value for a safe operation.
Layout Considerations
Layout plays a critical role in modern high-frequency
switching converter design. Circuit board with careful
layout can help the IC function properly and achieve low
losses, low switching noise, and stable operation with
improved performance. Without a carefully layout, the PCB
could radiate excessive noise, causing noise-induced IC
problems and then contribute to the converter instability.
The following guidelines can be used to achieve optimal
IC performance.
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17
RT8807B
1. Power components should be placed first. Place the
input capacitors close to the power MOSFETs, then
locate the filter inductors and output capacitors between
the power MOSFETs and the load.
2. Place both the ceramic and bulk input capacitor close
to the drain pin of the high-side MOSFET. This can
reduce the impedance presented by the input bulk
capacitance at high switching frequency. If there is more
than one high-side MOSFET in parallel, each should
have its own individual ceramic capacitor.
setting components and any bypass capacitors. These
components belong to the high-impedance circuit loop
and are inherently sensitive to noise pick-up. Therefore,
they must be located close to their respective controller
pins and away from the noisy switching nodes.
9. A multi-layer PCB design is recommended. Make use
of one single layer as the power ground and have a
separate control signal ground as the reference of all
signals.
3. Keep the power loops as short as possible. For lowvoltage high-current applications, power components
are the most critical part in the layout because they
switch a large amount of current. The current transition
from one device to another at high speed causes voltage
spikes due to the parasitic components on the circuit
board. Therefore, all of the high-current switching loops
should be kept as short as possible with large and thick
copper traces to minimize the radiation of
electromagnetic interference.
4. Minimize the trace length between the power MOSFETs
and its drivers.
Since the drivers use short, high-current pulses to drive
the power MOSFETs, the driving traces should be sized
as short and large as possible to reduce the trace
inductance. This is especially true for the low-side
MOSFET, since this can reduce the possibility of the
shoot-through.
5. Provide enough copper area around the power
MOSFETs and the inductors to aid in heat sinking.
Use thick copper PCB to reduce the resistance and
inductance for improved efficiency.
6. The bank of output capacitor should be placed physically
close to the load. This can minimize the impedance
seen by the load, and then improves the transient
response.
7. Place all of the high-frequency decoupling ceramic
capacitors close to their decoupling targets.
8. Small signal components should be located as close
as possible to the IC. The small signal components
include the feedback components, current sensing
components, the compensation components, function
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DS8807B-01 April 2011
RT8807B
Outline Dimension
D2
D
SEE DETAIL A
L
1
E
E2
e
1
1
2
2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
b
A
A3
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
A1
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
3.950
4.050
0.156
0.159
D2
2.300
2.750
0.091
0.108
E
3.950
4.050
0.156
0.159
E2
2.300
2.750
0.091
0.108
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 24L QFN 4x4 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
DS8807B-01 April 2011
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19