Data Sheet

PBLS2001S
20 V PNP BISS loadswitch
Rev. 02 — 24 August 2009
Product data sheet
1. Product profile
1.1 General description
PNP low VCEsat Breakthrough In Small Signal (BISS) transistor and NPN ResistorEquipped Transistor (RET) in a SOT96-1 (SO8) small Surface-Mounted Device (SMD)
plastic package.
1.2 Features
n
n
n
n
n
Low VCEsat (BISS) transistor and resistor-equipped transistor in one package
Low threshold voltage (< 1 V) compared to MOSFET
Low drive power required
Space-saving solution
Reduction of component count
1.3 Applications
n
n
n
n
Supply line switches
Battery charger switches
High-side switches for LEDs, drivers and backlights
Portable equipment
1.4 Quick reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
Unit
TR1; PNP low VCEsat (BISS) transistor
VCEO
collector-emitter voltage
IC
collector current
RCEsat
collector-emitter saturation
resistance
open base
IC = −2 A;
IB = −200 mA
[1]
-
-
−20
V
-
-
−3
A
-
75
120
mΩ
-
-
50
V
TR2; NPN resistor-equipped transistor
VCEO
collector-emitter voltage
IO
output current
-
-
100
mA
R1
bias resistor 1 (input)
1.54
2.2
2.86
kΩ
R2/R1
bias resistor ratio
0.8
1
1.2
[1]
Pulse test: tp ≤ 300 µs; δ ≤ 0.02
open base
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
2. Pinning information
Table 2.
Pinning
Pin
Description
1
input (base) TR2
2
GND (emitter) TR2
3
base TR1
4
emitter TR1
5
collector TR1
6
collector TR1
7
output (collector) TR2
8
output (collector) TR2
Simplified outline
8
5
Symbol
1
8
R1
R2
1
4
2
TR2
3
7
6
4
TR1
5
006aaa813
3. Ordering information
Table 3.
Ordering information
Type number Package
PBLS2001S
Name
Description
Version
SO8
plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
4. Marking
Table 4.
Marking codes
Type number
Marking code
PBLS2001S
LS2001S
PBLS2001S_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
2 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
TR1; PNP low VCEsat (BISS) transistor
VCBO
collector-base voltage
open emitter
-
−20
V
VCEO
collector-emitter voltage
open base
-
−20
V
VEBO
emitter-base voltage
open collector
-
−5
V
IC
collector current
-
−3
A
ICM
peak collector current
-
−5
A
IB
base current
-
−0.5
A
IBM
peak base current
single pulse;
tp ≤ 1 ms
-
−1
A
Ptot
total power dissipation
Tamb ≤ 25 °C
[1]
-
0.55
W
[2]
-
0.87
W
[3]
-
1.43
W
single pulse;
tp ≤ 1 ms
TR2; NPN resistor-equipped transistor
VCBO
collector-base voltage
open emitter
-
50
V
VCEO
collector-emitter voltage
open base
-
50
V
VEBO
emitter-base voltage
open collector
-
10
V
VI
input voltage
positive
-
+12
V
negative
-
−10
V
IO
output current
-
100
mA
ICM
peak collector current
single pulse;
tp ≤ 1 ms
-
100
mA
Ptot
total power dissipation
Tamb ≤ 25 °C
[1]
-
0.2
W
total power dissipation
Tamb ≤ 25 °C
[1]
-
0.7
W
[2]
-
1.0
W
[3]
-
1.5
W
Per device
Ptot
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
−65
+150
°C
Tstg
storage temperature
−65
+150
°C
[1]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm2.
[3]
Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBLS2001S_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
3 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa808
2.0
Ptot
(W)
(1)
1.5
(2)
1.0
(3)
0.5
0
−75
−25
25
75
125
175
Tamb (°C)
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1cm2
(3) FR4 PCB, standard footprint
Fig 1.
Power derating curves
6. Thermal characteristics
Table 6.
Symbol
Thermal characteristics
Parameter
Conditions
thermal resistance from
junction to ambient
in free air
Min
Typ
Max
Unit
[1]
-
-
180
K/W
[2]
-
-
125
K/W
[3]
-
-
85
K/W
-
-
40
K/W
Per device
Rth(j-a)
TR1; PNP low VCEsat (BISS) transistor
Rth(j-sp)
thermal resistance from
junction to solder point
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1cm2.
[3]
Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBLS2001S_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
4 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa809
103
Zth(j-a)
(K/W)
duty cycle =
102
1.0
0.75
0.5
0.33
0.2
10
0.05
0.1
0.02
0.01
0
1
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, standard footprint
Fig 2.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
006aaa810
103
Zth(j-a)
(K/W)
duty cycle =
1.0
0.75
0.5
0.33
0.2
102
0.1
10
0.05
0.02
0.01
0
1
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, mounting pad for collector 1cm2
Fig 3.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
PBLS2001S_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
5 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa811
103
Zth(j-a)
(K/W)
duty cycle =
102
1.0
0.75
0.5
0.33
0.2
10
0.1
0.05
0.02
0.01
0
1
10−4
10−3
10−2
10−1
1
102
10
103
tp (s)
Ceramic PCB, Al2O3, standard footprint
Fig 4.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
7. Characteristics
Table 7.
Characteristics
Tamb = 25 °C unless otherwise specified
Symbol Parameter
Conditions
Min
Typ
Max
Unit
TR1; PNP low VCEsat (BISS) transistor
ICBO
collector-base cut-off VCB = −20 V; IE = 0 A
current
VCB = −20 V; IE = 0 A;
Tj = 150 °C
-
−100
nA
-
−50
µA
ICES
collector-emitter
cut-off current
VCE = −20 V; VBE = 0 V
-
-
−100
nA
IEBO
emitter-base cut-off
current
VEB = −5 V; IC = 0 A
-
-
−100
nA
hFE
DC current gain
VCE = −2 V; IC = −0.1 A
VCEsat
RCEsat
220
420
-
VCE = −2 V; IC = −0.5 A
[1]
220
360
-
VCE = −2 V; IC = −1 A
[1]
200
310
-
VCE = −2 V; IC = −2 A
[1]
150
235
-
VCE = −2 V; IC = −3 A
[1]
100
180
-
IC = −0.5 A; IB = −50 mA
[1]
-
−45
−75
mV
IC = −1 A; IB = −50 mA
[1]
-
−90
−140
mV
IC = −2 A; IB = −100 mA
[1]
-
−160
−255
mV
IC = −2 A; IB = −200 mA
[1]
-
−150
−240
mV
IC = −3 A; IB = −300 mA
[1]
-
−220
−355
mV
collector-emitter
IC = −2 A; IB = −100 mA
saturation resistance I = −2 A; I = −200 mA
C
B
[1]
-
80
130
mΩ
[1]
-
75
120
mΩ
collector-emitter
saturation voltage
PBLS2001S_2
Product data sheet
-
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
6 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
Table 7.
Characteristics …continued
Tamb = 25 °C unless otherwise specified
Symbol Parameter
Conditions
VBEsat
base-emitter
saturation voltage
Min
Typ
Max
Unit
IC = −2 A; IB = −100 mA
[1]
-
−0.95
−1.1
V
IC = −3 A; IB = −300 mA
[1]
-
−1
−1.2
V
[1]
-
−0.8
−1.2
V
-
7
-
ns
-
34
-
ns
VBEon
base-emitter turn-on
voltage
VCE = −2 V; IC = −1 A
td
delay time
tr
rise time
IC = −2 A; IBon = −100 mA;
IBoff = 100 mA
ton
turn-on time
-
41
-
ns
ts
storage time
-
175
-
ns
tf
fall time
-
30
-
ns
toff
turn-off time
-
205
-
ns
fT
transition frequency
100
-
-
MHz
Cc
collector capacitance VCB = −10 V; IE = ie = 0 A;
f = 1 MHz
-
-
50
pF
IC = −100 mA; VCE = −5 V;
f = 100 MHz
TR2; NPN resistor-equipped transistor
ICBO
collector-base cut-off VCB = 50 V; IE = 0 A
current
-
-
100
nA
ICEO
collector-emitter
cut-off current
VCE = 30 V; IB = 0 A
-
-
1
µA
VCE = 30 V; IB = 0 A;
Tj = 150 °C
-
-
50
µA
VEB = 5 V; IC = 0 A
-
-
2
mA
IEBO
emitter-base cut-off
current
hFE
DC current gain
VCE = 5 V; IC = 20 mA
30
-
-
VCEsat
collector-emitter
saturation voltage
IC = 10 mA; IB = 0.5 mA
-
-
150
mV
VI(off)
off-state input voltage VCE = 5 V; IC = 1 mA
-
1.2
0.5
V
VI(on)
on-state input voltage VCE = 0.3 V; IC = 20 mA
2
1.6
-
V
R1
bias resistor 1 (input)
1.54
2.2
2.86
kΩ
R2/R1
bias resistor ratio
0.8
1
1.2
Cc
collector capacitance VCB = 10 V; IE = ie = 0 A;
f = 1 MHz
-
-
2.5
[1]
Pulse test: tp ≤ 300 µs; δ ≤ 0.02
PBLS2001S_2
Product data sheet
pF
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
7 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa800
800
006aaa801
−5
−4
−45.0
−40.5
−36.0
−31.5
−27.0
−22.5
−3
−18.0
IB (mA) =
IC
(A)
hFE
(1)
600
(2)
−13.5
400
−2
−9.0
(3)
200
0
−4.5
−1
−1
−10
−102
0
−104
−103
0
−0.4
−0.8
−1.2
IC (mA)
VCE = −2 V
−1.6
−2.0
VCE (V)
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig 5.
TR1 (PNP): DC current gain as a function of
collector current; typical values
006aaa802
−1.1
VBE
(V)
Fig 6.
TR1 (PNP): Collector current as a function of
collector-emitter voltage; typical values
006aaa803
−1.1
VBEsat
(V)
−0.9
−0.9
(1)
(1)
−0.7
−0.7
(2)
(2)
(3)
−0.5
−0.5
(3)
−0.3
−0.1
−0.3
−1
−10
−102
−104
−103
−0.1
−1
−10
IC (mA)
VCE = −2 V
IC/IB = 20
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
TR1 (PNP): Base-emitter voltage as a function
of collector current; typical values
Fig 8.
TR1 (PNP): Base-emitter saturation voltage as
a function of collector current; typical values
PBLS2001S_2
Product data sheet
−104
−103
IC (mA)
(1) Tamb = −55 °C
Fig 7.
−102
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
8 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa804
−1
VCEsat
(V)
006aaa805
−1
VCEsat
(V)
(1)
(2)
(3)
−10−1
−10−1
(1)
(2)
−10−2
−10−2
(3)
−10−3
−1
−10
−102
−104
−103
−10−3
−1
−10
−102
IC (mA)
Tamb = 25 °C
IC/IB = 20
(1) Tamb = 100 °C
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig 9.
−104
−103
IC (mA)
TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa806
10
Fig 10. TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa807
102
RCEsat
(Ω)
RCEsat
(Ω)
10
1
1
(1)
(2)
(3)
(1)
(2)
(3)
10−1
10−1
10−2
−1
−10
−102
−104
−103
10−2
−1
−10
IC (mA)
−104
−103
IC (mA)
Tamb = 25 °C
IC/IB = 20
(1) Tamb = 100 °C
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig 11. TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 12. TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBLS2001S_2
Product data sheet
−102
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
9 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
006aaa015
103
006aaa014
103
hFE
(1)
(2)
(3)
102
VCEsat
(mV)
102
(1)
(2)
(3)
10
1
10−1
1
102
10
10
1
IC (mA)
VCE = 5 V
IC/IB = 20
(1) Tamb = 150 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
Fig 13. TR2 (NPN): DC current gain as a function of
collector current; typical values
006aaa016
102
102
10
IC (mA)
VI(on)
(V)
Fig 14. TR2 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa017
10
VI(off)
(V)
10
(1)
(2)
1
(3)
(1)
(2)
(3)
1
10−1
10−1
1
102
10
10−1
10−2
10−1
IC (mA)
10
IC (mA)
VCE = 0.3 V
VCE = 5 V
(1) Tamb = −40 °C
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
Fig 15. TR2 (NPN): On-state input voltage as a
function of collector current; typical values
Fig 16. TR2 (NPN): Off-state input voltage as a
function of collector current; typical values
PBLS2001S_2
Product data sheet
1
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
10 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
8. Test information
− IB
input pulse
(idealized waveform)
90 %
− I Bon (100 %)
10 %
− I Boff
output pulse
(idealized waveform)
− IC
90 %
− I C (100 %)
10 %
t
td
ts
tr
t on
tf
t off
006aaa266
Fig 17. BISS transistor switching time definition
VBB
RB
VCC
RC
Vo
(probe)
oscilloscope
450 Ω
(probe)
450 Ω
oscilloscope
R2
VI
DUT
R1
mgd624
IC = −2 A; IBon = −100 mA; IBoff = 100 mA; R1 = open; R2 = 25 Ω; RB = 70 Ω; RC = 5 Ω
Fig 18. Test circuit for switching times
PBLS2001S_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
11 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
9. Package outline
5.0
4.8
1.75
1.0
0.4
6.2
5.8
4.0
3.8
pin 1 index
1.27
0.49
0.36
Dimensions in mm
0.25
0.19
03-02-18
Fig 19. Package outline SOT96-1 (SO8)
10. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number
PBLS2001S
[1]
Package
SOT96-1
Description
8 mm pitch, 12 mm tape and reel
1000
2500
-115
-118
For further information and the availability of packing methods, see Section 14.
PBLS2001S_2
Product data sheet
Packing quantity
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
12 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
11. Soldering
5.50
0.60 (8×)
1.30
4.00
6.60
7.00
1.27 (6×)
solder lands
occupied area
placement accuracy ± 0.25
Dimensions in mm
sot096-1_fr
Fig 20. Reflow soldering footprint SOT96-1 (SO8)
1.20 (2×)
0.60 (6×)
enlarged solder land
0.3 (2×)
1.30
4.00
6.60
7.00
1.27 (6×)
5.50
board direction
solder lands
occupied area
solder resist
placement accurracy ± 0.25
Dimensions in mm
sot096-1_fw
Fig 21. Wave soldering footprint SOT96-1 (SO8)
PBLS2001S_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
13 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
12. Revision history
Table 9.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PBLS2001S_2
20090824
Product data sheet
-
PBLS2001S_1
Modifications:
PBLS2001S_1
•
This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
20060803
Product data sheet
PBLS2001S_2
Product data sheet
-
-
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
14 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
13. Legal information
13.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
13.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PBLS2001S_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 24 August 2009
15 of 16
PBLS2001S
NXP Semiconductors
20 V PNP BISS loadswitch
15. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
10
11
12
13
13.1
13.2
13.3
13.4
14
15
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test information . . . . . . . . . . . . . . . . . . . . . . . . 11
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
Packing information. . . . . . . . . . . . . . . . . . . . . 12
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 24 August 2009
Document identifier: PBLS2001S_2
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