Data Sheet

PBSS4032SN
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
Rev. 2 — 13 October 2010
Product data sheet
1. Product profile
1.1 General description
NPN/NPN low VCEsat Breakthrough In Small Signal (BISS) transistor in a SOT96-1 (SO8)
medium power Surface-Mounted Device (SMD) plastic package.
Table 1.
Product overview
Type number
PBSS4032SN
Package
NXP
Name
PNP/PNP
complement
SOT96-1
SO8
PBSS4032SP
NPN/PNP
complement
PBSS4032SPN
1.2 Features and benefits
„
„
„
„
„
„
Low collector-emitter saturation voltage VCEsat
Optimized switching time
High collector current capability IC and ICM
High collector current gain (hFE) at high IC
High efficiency due to less heat generation
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
„
„
„
„
DC-to-DC conversion
Battery-driven devices
Power management
Charging circuits
1.4 Quick reference data
Table 2.
Quick reference data
Symbol Parameter
Conditions
Min
Typ
Max
Unit
open base
-
-
30
V
-
-
5.7
A
-
-
10
A
-
45
62.5
mΩ
VCEO
collector-emitter voltage
IC
collector current
ICM
peak collector current
single pulse;
tp ≤ 1 ms
RCEsat
collector-emitter
saturation resistance
IC = 4 A; IB = 0.4 A
[1]
Pulse test: tp ≤ 300 μs; δ ≤ 0.02.
[1]
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
2. Pinning information
Table 3.
Pinning
Pin
Description
1
emitter TR1
2
base TR1
3
emitter TR2
4
base TR2
5
collector TR2
6
collector TR2
7
collector TR1
8
collector TR1
Simplified outline
8
Graphic symbol
8
5
7
TR1
1
4
1
6
5
TR2
2
3
4
006aaa966
3. Ordering information
Table 4.
Ordering information
Type number
PBSS4032SN
Package
Name
Description
Version
SO8
plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
4. Marking
Table 5.
Marking codes
Type number
Marking code
PBSS4032SN
4032SN
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor
VCBO
collector-base voltage
open emitter
-
30
V
VCEO
collector-emitter voltage
open base
-
30
V
VEBO
emitter-base voltage
open collector
-
5
V
IC
collector current
-
5.7
A
ICM
peak collector current
-
10
A
IB
base current
Ptot
PBSS4032SN
Product data sheet
total power dissipation
single pulse; tp ≤ 1 ms
Tamb ≤ 25 °C
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
-
1
A
[1]
-
0.73
W
[2]
-
1
W
[3]
-
1.7
W
© NXP B.V. 2010. All rights reserved.
2 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
Table 6.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
total power dissipation
Tamb ≤ 25 °C
Min
Max
Unit
[1]
-
0.86
W
[2]
-
1.4
W
[3]
-
2.3
W
Per device
Ptot
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
−55
+150
°C
Tstg
storage temperature
−65
+150
°C
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3]
Device mounted on a ceramic PCB, Al2O3, standard footprint.
006aac278
3.0
Ptot
(W)
(1)
2.0
(2)
1.0
(3)
0.0
−75
−25
25
75
125
175
Tamb (°C)
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm2
(3) FR4 PCB, standard footprint
Fig 1.
PBSS4032SN
Product data sheet
Per device: Power derating curves
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
3 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
6. Thermal characteristics
Table 7.
Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
[1]
-
-
170
K/W
[2]
-
-
125
K/W
[3]
-
-
75
K/W
-
-
40
K/W
[1]
-
-
145
K/W
[2]
-
-
90
K/W
[3]
-
-
55
K/W
Per transistor
thermal resistance from
junction to ambient
Rth(j-a)
in free air
thermal resistance from
junction to solder point
Rth(j-sp)
Per device
thermal resistance from
junction to ambient
Rth(j-a)
in free air
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3]
Device mounted on a ceramic PCB, Al2O3, standard footprint.
006aac279
103
Zth(j-a)
(K/W)
duty cycle = 1
0.75
102
0.5
0.33
0.2
0.1
10
0.05
0.02
0.01
1
0
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, standard footprint
Fig 2.
Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4032SN
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
4 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
006aac280
103
Zth(j-a)
(K/W)
duty cycle = 1
102
0.75
0.5
0.33
0.2
0.1
10
0.05
0.02
0.01
1
0
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, mounting pad for collector 1 cm2
Fig 3.
Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aac281
102
duty cycle = 1
0.75
Zth(j-a)
(K/W)
0.5
0.33
0.2
10
0.1
0.05
0.02
0.01
1
0
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
Ceramic PCB, Al2O3, standard footprint
Fig 4.
Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4032SN
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
5 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
7. Characteristics
Table 8.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
collector-base
cut-off current
VCB = 30 V; IE = 0 A
-
-
100
nA
VCB = 30 V; IE = 0 A;
Tj = 150 °C
-
-
50
μA
ICES
collector-emitter
cut-off current
VCE = 24 V; VBE = 0 V
-
-
100
nA
IEBO
emitter-base
cut-off current
VEB = 5 V; IC = 0 A
-
-
100
nA
hFE
DC current gain
VCE = 2 V
IC = 500 mA
300
500
-
IC = 1 A
300
500
-
IC = 2 A
250
450
-
IC = 4 A
200
400
-
150
300
-
IC = 1 A; IB = 50 mA
-
90
125
mV
IC = 1 A; IB = 10 mA
-
130
180
mV
IC = 2 A; IB = 40 mA
-
150
210
mV
IC = 4 A; IB = 400 mA
-
185
250
mV
IC = 4 A; IB = 40 mA
-
250
375
mV
-
300
450
mV
-
45
62.5
mΩ
-
0.76
0.9
V
-
0.91
1.05
V
-
0.77
0.85
V
-
35
-
ns
Per transistor
ICBO
[1]
IC = 6 A
VCEsat
collector-emitter
saturation voltage
[1]
IC = 6 A; IB = 300 mA
RCEsat
collector-emitter
IC = 4 A; IB = 400 mA
saturation resistance
[1]
VBEsat
base-emitter
saturation voltage
[1]
IC = 1 A; IB = 100 mA
IC = 4 A; IB = 400 mA
VBEon
base-emitter
turn-on voltage
VCE = 2 V; IC = 2 A
td
delay time
VCC = 12.5 V; IC = 1 A;
IBon = 0.05 A; IBoff = −0.05 A
tr
rise time
-
30
-
ns
ton
turn-on time
-
65
-
ns
ts
storage time
-
150
-
ns
tf
fall time
-
65
-
ns
toff
turn-off time
-
215
-
ns
fT
transition frequency
VCE = 10 V; IC = 100 mA;
f = 100 MHz
-
140
-
MHz
Cc
collector capacitance VCB = 10 V; IE = ie = 0 A;
f = 1 MHz
-
65
-
pF
[1]
PBSS4032SN
Product data sheet
[1]
Pulse test: tp ≤ 300 μs; δ ≤ 0.02.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
6 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
006aac282
1000
006aac283
12.0
hFE
IB (mA) = 70
IC
(A)
(1)
800
63
56
49
42
35
8.0
(2)
600
28
21
14
400
(3)
4.0
7
200
0
10−1
1
10
102
0.0
0.0
103
104
IC (mA)
1.0
2.0
3.0
4.0
5.0
VCE (V)
Tamb = 25 °C
VCE = 2 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig 5.
DC current gain as a function of collector
current; typical values
Fig 6.
006aac284
1.2
Collector current as a function of
collector-emitter voltage; typical values
006aac285
1.2
VBEsat
(V)
VBE
(V)
1.0
(1)
0.8
0.8
(1)
(2)
0.6
(2)
0.4
(3)
0.4
(3)
0.0
10−1
1
10
102
0.2
10−1
103
104
IC (mA)
1
VCE = 2 V
IC/IB = 20
(1) Tamb = −55 °C
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
Fig 7.
Base-emitter voltage as a function of collector
current; typical values
PBSS4032SN
Product data sheet
Fig 8.
10
102
103
104
IC (mA)
Base-emitter saturation voltage as a function
of collector current; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
7 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
006aac286
1
006aac287
1
VCEsat
(V)
VCEsat
(V)
10−1
10−1
(1)
(1)
(2)
(2)
(3)
10−2
10−1
1
10
(3)
102
103
104
IC (mA)
10−2
10−1
1
102
103
104
IC (mA)
Tamb = 25 °C
IC/IB = 20
(1) Tamb = 100 °C
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig 9.
10
Collector-emitter saturation voltage as a
function of collector current; typical values
006aac288
103
Fig 10. Collector-emitter saturation voltage as a
function of collector current; typical values
006aac289
103
RCEsat
(Ω)
RCEsat
(Ω)
102
102
10
10
1
1
(1)
(2)
(1)
(2)
10−1
10−2
10−1
1
10
102
(3)
10−1
(3)
103
104
IC (mA)
10−2
10−1
1
(1) Tamb = 100 °C
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig 11. Collector-emitter saturation resistance as a
function of collector current; typical values
Product data sheet
102
103
104
IC (mA)
Tamb = 25 °C
IC/IB = 20
PBSS4032SN
10
Fig 12. Collector-emitter saturation resistance as a
function of collector current; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
8 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
8. Test information
IB
input pulse
(idealized waveform)
90 %
IBon (100 %)
10 %
IBoff
output pulse
(idealized waveform)
IC
90 %
IC (100 %)
10 %
t
td
ts
tr
ton
tf
toff
006aaa003
Fig 13. BISS transistor switching time definition
VBB
RB
VCC
RC
Vo
(probe)
oscilloscope
450 Ω
(probe)
450 Ω
oscilloscope
R2
VI
DUT
R1
mlb826
VCC = 12.5 V; IC = 1 A; IBon = 0.05 A; IBoff = −0.05 A
Fig 14. Test circuit for switching times
PBSS4032SN
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
9 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
9. Package outline
5.0
4.8
1.75
1.0
0.4
6.2
5.8
4.0
3.8
pin 1 index
1.27
0.49
0.36
Dimensions in mm
0.25
0.19
03-02-18
Fig 15. Package outline SOT96-1 (SO8)
10. Packing information
Table 9.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number
PBSS4032SN
[1]
PBSS4032SN
Product data sheet
Package
SOT96-1
Description
8 mm pitch, 12 mm tape and reel
Packing quantity
1000
2500
-115
-118
For further information and the availability of packing methods, see Section 14.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
10 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
11. Soldering
5.50
0.60 (8×)
1.30
4.00
6.60
7.00
1.27 (6×)
solder lands
occupied area
placement accuracy ± 0.25
Dimensions in mm
sot096-1_fr
Fig 16. Reflow soldering footprint SOT96-1 (SO8)
1.20 (2×)
0.60 (6×)
enlarged solder land
0.3 (2×)
1.30
4.00
6.60
7.00
1.27 (6×)
5.50
board direction
solder lands
occupied area
solder resist
placement accurracy ± 0.25
Dimensions in mm
sot096-1_fw
Fig 17. Wave soldering footprint SOT96-1 (SO8)
PBSS4032SN
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
11 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
12. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PBSS4032SN v.2
20101013
Product data sheet
-
PBSS4032SN v.1
Modifications:
PBSS4032SN v.1
PBSS4032SN
Product data sheet
•
Figure 1 “Per device: Power derating curves”: updated.
20100714
Product data sheet
-
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
-
© NXP B.V. 2010. All rights reserved.
12 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
13. Legal information
13.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
13.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
PBSS4032SN
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
13 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PBSS4032SN
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 13 October 2010
© NXP B.V. 2010. All rights reserved.
14 of 15
PBSS4032SN
NXP Semiconductors
30 V, 5.7 A NPN/NPN low VCEsat (BISS) transistor
15. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
10
11
12
13
13.1
13.2
13.3
13.4
14
15
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics . . . . . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
Packing information . . . . . . . . . . . . . . . . . . . . 10
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Contact information. . . . . . . . . . . . . . . . . . . . . 14
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 13 October 2010
Document identifier: PBSS4032SN
Similar pages