A4990 Datasheet

A4990
Automotive Dual Full Bridge Driver
Features and Benefits
Description
• Two full bridge power outputs
• Typical application up to ±800 mA, 28 V
• Adjustable peak current limit control
• Minimum overcurrent shutdown at 1.4 A
• Continuous operation at high ambient temperature
• Synchronous rectification for low power dissipation
• Simple parallel interface control
• Inverted and non-inverted inputs
• No crossover current
• Low current consumption in sleep mode
• Error flag diagnostics
• Open load diagnostic during on-state for all outputs
• Outputs protected against overcurrent
• Overtemperature protection with hysteresis
The A4990 is a dual full-bridge driver for stepper motors and
small brush DC motors in automotive applications. Each full
bridge uses DMOS power devices with integrated freewheeling
diodes. Control circuits prevent cross-conduction, or shootthrough, when switching between high-side and low-side
drives.
Continued on the next page…
Package: 20-pin TSSOP with exposed
thermal pad (suffix LP)
This device drives stepper motors with full current in either
direction in each phase, allowing two-phase on, full-step
operation. It drives DC motors in both directions and has brake
capability. A single input turns-off both bridges, allowing
motors to coast. All control modes can easily be achieved
using 3, 4, or 5 outputs from a standard parallel interface of
a microcontroller.
The peak motor current can be limited by sense resistor
selection, providing higher efficiency, reduced motor heating,
and longer motor life.
The outputs are protected from short circuits to supply and
to ground, and low load-current detection is included. Chip
level protection includes: overtemperature shutdown, and
overvoltage and undervoltage lockout.
The A4990 is supplied in a 20-lead TSSOP power package with
an exposed thermal pad (package type LP). This package is
lead (Pb) free with 100% matte-tin lead frame plating.
Not to scale
Typical Applications
Automotive
12 V Power Net
Automotive
12 V Power Net
CP1 CP2 VCP VBB
CP1 CP2 VCP VBB
OUT1
Microcontroller
or
ECU
IN1
IN2
INH
IN3
IN4
A4990
OUT3
EF1
EF2
VREG
OUT4
SENS12
SENS34
GND
A4990-DS
OUT1
OUT2
Stepper
Motor
Microcontroller
or
ECU
IN1
IN2
INH
IN3
IN4
OUT2
A4990
OUT3
EF1
EF2
VREG
DC
Motor
OUT4
SENS12
SENS34
GND
DC
Motor
A4990
Automotive Dual Full Bridge Driver
Features and Benefits (continued)
• Overvoltage and undervoltage lockout
• 3.3 V / 5 V compatible inputs with hysteresis
• Thermally enhanced package (exposed pad)
• Fully integrated in a compact TSSOP package for
space sensitive applications
Selection Guide
Part Number
Packing
Package
A4990KLPTR-T
4000 pieces per
13-in. reel
4.4 mm × 6.5 mm, 1.2 mm nominal height
20-pin TSSOP with exposed thermal pad
Absolute Maximum Ratings with respect to ground
Characteristic
Load Supply Voltage
Symbol
Notes
VBB
CP1 Pin
CP2, VCP Pin
OUT1, OUT2, OUT3, OUT4 Pins
IN1, IN2, IN3, IN4 Pins
VREG Pin
Rating
Unit
–0.3 to 50
V
–0.3 to VBB
V
–0.3 to VBB + 8
V
–0.3 to VBB
V
–0.3 to 6
V
–0.3 to 8.5
V
INH Pin
–0.3 to 6
V
EF1, EF2 Pins
–0.3 to 6
V
SENS12, SENS34 Pins
–0.3 to 1
V
–40 to 150
ºC
Continuous
150
ºC
Single overtemperature event not exceeding
10 s, cumulative lifetime duration not exceeding
10 hours, specified by design characterization
175
ºC
–55 to 150
ºC
Operating Ambient Temperature
Maximum Junction Temperature
Storage Temperature
TA
TJ(max)
L temperature range, limited by power
dissipation
Tstg
Thermal Characteristics may require derating at maximum conditions, see application information
Characteristic
Symbol
Package Thermal Resistance
(Junction to Ambient)
RθJA
Package Thermal Resistance
(Junction to Case)
RθJC
Test Conditions*
Estimated, on Package LH, on 4-layer PCB based on JEDEC standard
Estimated, on 2-layer PCB with 3.8
Estimated
in.2
of copper area each side
Value
Unit
31
ºC/W
38
ºC/W
2
ºC/W
*Additional thermal information available on the Allegro website.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A4990
Automotive Dual Full Bridge Driver
Pin-out Diagram
SENS12
1
20
VBB
OUT1
2
19
OUT2
EF1
3
18
CP2
IN1
4
17
CP1
16
VCP
15
IN3
14
IN4
13
VREG
IN2
5
EF2
6
INH
7
OUT3
8
Charge
Pump
Input/Output
and Control
Reg
GND
9
12
OUT4
SENS34
10
11
VBB
PAD
Terminal List Table
Number
Name
CP1
17
Charge pump capacitor
Function
CP2
18
Charge pump capacitor
EF1
3
Error flag 1
EF2
6
Error flag 2
GND
9
Ground
IN1
4
Bridge control input 1, phase A
IN2
5
Bridge control input 2, phase A
IN3
15
Bridge control input 3, phase B
IN4
14
Bridge control input 4, phase B
Drive disable input, active low
INH
7
OUT1
2
Bridge output 1, phase A
OUT2
19
Bridge output 2, phase A
OUT3
8
Bridge output 3, phase B
OUT4
12
Bridge output 4, phase B
PAD
–
Exposed thermal pad for enhanced thermal dissipation
SENS12
1
Current sense node, phase A bridge
SENS34
10
Current sense node, phase B bridge
VBB
11, 20
VCP
16
Pump storage capacitor
VREG
13
Regulated voltage
Motor supply voltage
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A4990
Automotive Dual Full Bridge Driver
Functional Block Diagram
VREG
Reference
Regulator
PhaseA
CP1
CP2
Charge
Pump
OUT1
OUT2
IN2
Bridge
Control
Logic
Gate
Drive
SENS12
RSA
Fault
PhaseB
VBB
IN3
OUT3
OUT4
IN4
EF1
EF2
VBAT
VBB
VBB
IN1
INH
VCP
UVLO, OVLO, TSD
Short Detect
Open Detect
SENS34
Fault
RSB
PAD
GND
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A4990
Automotive Dual Full Bridge Driver
ELECTRICAL CHARACTERISTICS Valid at TJ = –40°C to 150°C, VBB = 7 to 28 V; unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Supplies
Load Supply Voltage Range1
Load Supply Quiescent Current
VBB(func)
Functional, no unsafe states
0
–
50
V
VBB(op)
Outputs driving
6
–
VBBOV
V
IBBQ
INH = high, IN1 = IN3 = low, IN2 = IN4 = high
–
7
10
mA
INH < 0.5 V, sleep mode
–
1
5
μA
Charge Pump Voltage
VCP
VBB > 7.5 V, INH = high
–
VBB + 6.7
–
V
Internal Regulator Voltage
VREG
INH = high, VBB > 7.5 V
–
7.2
–
V
VREGDO
INH = high, VBB > 5.6 V
–
100
200
mV
VBB = 13.5 V, IOUT = –1 A, TJ = 25°C
–
500
600
mΩ
VBB = 13.5 V, IOUT = –1 A, TJ = 150°C
–
900
1100
mΩ
VBB = 7 V, IOUT = –1 A, TJ = 25°C
–
625
750
mΩ
If = 1 A
–
–
1.4
V
Internal Regulator Dropout Voltage
Motor Bridge Output
High-Side
On-Resistance2
High-Side Body Diode Forward
Voltage
Low-Side On-Resistance
Low-Side Body Diode Forward
Voltage2
Dead Time
Output Leakage Current2
RDS(on)H
VfH
RDS(on)L
VfL
VBB = 13.5 V, IOUT = 1 A, TJ = 25°C
–
500
600
mΩ
VBB = 13.5 V, IOUT = 1 A, TJ = 150°C
–
900
1100
mΩ
VBB = 7 V, IOUT = 1 A, TJ = 25°C
–
625
750
mΩ
If = –1 A
–
–
1.4
V
–
500
–
ns
INH = high, VOUT = VBB
–120
–65
–
μA
tDEAD
IOUT(lkg)
INH = high, VOUT = 0 V
–200
–120
–
μA
INH = low, VOUT = VBB
–
<1.0
20
μA
INH = low, VOUT = 0 V
–20
<1.0
–
μA
MHz
Current Limit
Internal Oscillator Frequency
Blank Time
PWM Frequency
Internal Reference Voltage
fOSC
3.2
4
4.8
tBLANK
2800
3500
4200
ns
fPWM
17.3
21.7
26
kHz
VREF
1.1
1.2
1.3
V
Maximum Sense Voltage
VSMAX
–
125
–
mV
Current Trip Point Error3
ErrITrip
–
–
±10
%
Logic Input Low Voltage
VIL
–
–
0.8
V
Logic Input Low Voltage for Sleep
Mode (INH pin)
VILS
–
–
0.5
V
Logic Input and Output
Logic Input High Voltage
Logic Input Hysteresis
VIH
2.0
–
–
V
VIhys
100
300
–
mV
Continued on the next page…
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
A4990
Automotive Dual Full Bridge Driver
ELECTRICAL CHARACTERISTICS Valid at TJ = –40°C to 150°C, VBB = 7 to 28 V; unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Logic Input and Output (continued)
Logic Input Pull-Down Current
(IN1,IN3, INH pins)
IPD
IN1 = IN3 = INH = 2 V
10
25
50
μA
Logic Input Pull-Up Current (IN2, IN4
pins)2
IPU
IN2 = IN4 = 0.8 V
–10
–25
–50
μA
Logic Output Low Voltage (EF1, EF2
pins)
VOL
EF1 = EF2 = 2 mA
–
0.2
0.4
V
0 V < VO < VDD
–1
–
1
μA
–
80
–
ns
–
300
–
μs
–
–
2
ms
32
34
36
V
2
–
4
V
5.2
5.5
5.8
V
500
760
–
mV
Logic Output Leakage2
Logic Input Pulse Filter Time (IN1,
IN2, IN3, IN4 pins)
Sleep Mode Delay
Wake-up from Reset
IO(lkg)
tPIN
tSLEEP
From INH going low until sleep mode
tEN
Diagnostics and Protection
VBB Overvoltage Turn-Off Voltage
VBB Overvoltage Hysteresis
VBBOV
VBB Undervoltage Threshold
VBBUV
VBB Undervoltage Hysteresis
VBBhys
VREG Undervoltage Threshold
VREGUV
VREG Undervoltage Hysteresis
High-Side Overcurrent Threshold
VBB rising
VBBOVhys
VBB falling
VREG falling
VREGhys
4.6
4.8
4.95
V
250
370
–
mV
1.4
2.05
2.65
A
IOCH
Sampled after tSCT
High-Side Current Limit
ILIMH
Active during tSCT
3
5.5
8
A
Low-Side Overcurrent Sense Voltage
VOCL
Sampled after tSCT
210
250
290
mV
Overcurrent Fault Delay
tSCT
1500
2000
2700
ns
Open Load Current
IOLP
6
12
20
mA
Open Load Fault Delay
tdOLP
717
896
1075
μs
Overtemperature Shutdown
TJF
Temperature increasing
155
170
–
ºC
Overtemperature Hysteresis
TJhys
Recovery = TJF – TJhys
–
15
–
ºC
1V
BB(func) function is correct but parameters may not meet specification when 7 V > VBB or VBB > 28 V. Outputs not operational above VBBOV or
below VREGUVL .
2For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
3Current Trip Point Error is the difference between the actual current trip point and the target current trip point, referred to maximum full scale (100%)
current: ErrTrip = 100 × ( ITripActual – ITripTarget ) / IFullScale (%).
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
A4990
Automotive Dual Full Bridge Driver
Table 1. Functional Truth Table
Input/Output
Functional State
Phase A
INH
IN1
IN2
OUT1
OUT2
L
X
X
Z
Z
Mode
H
Z
Z
L
L
Brake: low side
No phase current
Low-side brake
H
L
L
L
H
Current driven negative
Negative phase current
Motor turns counterclockwise
H
L
H
L
L
Low-side recirculation
No current
Low-side brake
H
H
L
H
H
High-side recirculation
No current
High-side brake
H
H
H
H
L
Current driven positive
Positive phase current
Motor turns clockwise
Sleep
Stepper Motor Operation
Low current consumption
DC Motor Operation
Low current consumption
Phase B
INH
IN3
IN4
OUT3
OUT4
L
X
X
Z
Z
Sleep
Mode
Low current consumption
Stepper Motor Operation
Low current consumption
DC Motor Operation
H
Z
Z
L
L
Brake: low side
No phase current
Low-side brake
H
L
L
L
H
Current driven negative
Negative phase current
Motor turns counterclockwise
H
L
H
L
L
Low-side recirculation
No current
Low-side brake
H
H
L
H
H
High-side recirculation
No current
High-side brake
H
H
H
H
L
Current driven positive
Positive phase current
Motor turns clockwise
X = don’t care, Z = high-impedance
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
A4990
Automotive Dual Full Bridge Driver
IN1, IN2
IN3, IN4
OUT1
OUT2
OUT3
OUT4
+ILOAD
IOUT12
+ILOAD
tSTEP
tSTEP
+ILOAD
IOUT34
+ILOAD
Figure 1. Stepper Motor Input and Output Sequence Timing Diagram
IN1 (IN3)
IN2 (IN4)
OUT1 (OUT3)
OUT2 (OUT4)
+ILOAD
Brake
Counterclockwise
Brake
Clockwise
Brake
IOUT12 (I OUT34 )
+ILOAD
Figure 2. Brush DC Motor Input and Output Sequence Timing Diagram (phase B names shown in parentheses)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
8
A4990
Automotive Dual Full Bridge Driver
Functional Description
The A4990 is an automotive dual full bridge driver suitable for
high temperature applications such as headlamp bending and
leveling, throttle control, and fuel recirculation control. It is also
suitable for other low-current stepper applications, such as air
conditioning and venting.
The device provides two full-bridge drivers for stepper motors
and small brush DC motors. Each full-bridge uses DMOS power
devices with integrated freewheeling diodes and the control circuit prevents cross-conduction, or shoot-through, when switching
between high-side and low-side drives.
The A4990 drives stepper motors with full current, in either
direction in each phase, allowing two-phase on, full-step operation. It drives DC motors in both directions and has brake capability. A single input turns-off all bridges, allowing all motors to
coast. All control modes can easily be achieved using 3, 4 or 5
outputs from a standard parallel interface of a microcontroller.
The current in each phase of the stepper motor is regulated by a
fixed frequency, peak detect PWM current regulator. The motor
peak current can be limited by the values selected for external
sense resistors, providing higher efficiency, reduced motor heating, and longer motor life.
The outputs are protected from short circuits to supply and to
ground, and low load-current detection is included. Chip level
protection includes: overtemperature shutdown, and overvoltage
and undervoltage lockout. Faults are indicated by two error flags.
Pin Functions
VBB Main motor supply and chip supply for internal logic,
regulators, and charge pump. Both VBB pins must be connected
to the main supply and each decoupled to ground with a ceramic
capacitor. A low ESR electrolytic capacitor must be connected
between the main supply and ground to provide motor switching
currents.
CP1 and CP2 Pump capacitor connection for charge pump. Con-
nect a 100 nF / 50 V ceramic capacitor between CP1 and CP2.
VCP Above-supply voltage for high-side drive. A 100 nF / 16 V
ceramic capacitor should be connected between VCP and VBB to
provide the pump storage reservoir.
VREG Regulated supply for bridge gate drives. A 470 nF / 10 V
ceramic capacitor should be connected between VREG
and ground.
GND Chip ground. Connect to supply ground.
OUT1 and OUT2 Motor connection for phase A. Positive motor
phase current direction is defined as flowing from OUT1 to
OUT2.
OUT3 and OUT4 Motor connection for phase B. Positive motor
phase current direction is defined as flowing from OUT3 to
OUT4.
SENS12 Phase A current sense. Connect sense resistor between
SENS12 and GND.
SENS34 Phase B current sense. Connect sense resistor between
SENS34 and GND.
IN1 Control input for OUT1 with internal pull-down.
IN2 Inverted control input for OUT2 with internal pull-up.
IN3 Control input for OUT3 with internal pull-down.
IN4 Inverted control input for OUT4 with internal pull-up.
INH Inhibit control input. Controls activity of bridge outputs.
When held low, deactivates the outputs, that is, turns-off all output bridge FETs and the A4990 enters sleep mode.
EF1 Error flag output 1. Combines with EF2 to indicate active
fault status. Open drain output requiring an external pull-up resistor to the logic supply voltage.
EF2 Error flag output 2. Combines with EF1 to indicate active
fault status. Open drain output requiring an external pull-up resistor to the logic supply voltage.
Operation
The two full-bridges in the A4990 are each controlled by two
logic inputs, one input for each half bridge (IN1 for OUT1,
and so forth), according to the logic shown in table 1. The two
bridges are controlled independently except for the INH input
which turns-off all outputs and puts the A4990 into low current
sleep mode.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
9
A4990
Automotive Dual Full Bridge Driver
The two bridges in the A4990 can be used to drive a single,
two-phase bipolar stepper motor or two bidirectional brush DC
motors:
• Stepper Motor – A two-phase stepper motor is made to rotate
by sequencing the relative currents in each phase using the four
inputs as shown in figure 1. In its simplest form, each phase in
turn is fully energized by applying a forward or reverse voltage
to each winding in sequence.
• Brush DC Motor – A brush DC motor can be driven by each
full-bridge, in both directions as shown in figure 2. In addition
to controlling rotation direction, the two control inputs for each
bridge can be used to provide PWM speed control and motor
braking.
The operating modes for each motor type are listed in table 1.
Current Limiting The A4990 includes a PWM current control
function that can be used to limit the phase current with changes
in the operating temperature and voltage. This prevents overheating in the motor at high supply voltage or low temperatures. The
PWM current control function in the A4990 can be used to limit
the current in each phase independently. The current limit function is only active when other factors, such as motor phase R/L,
motor speed, or supply voltage do not limit the phase current.
For each of the two phases, the currents are measured in the
full-bridge using a sense resistor, RSx, with voltage feedback to
the respective SENSx pin. The target current level, IPHASEx , is
defined as:
IPHASEx = VREF / (16 × RSx )
Table 2 provides some typical currents using E96 series resistor values.
The current comparison is ignored at the start of the PWM
on-time for a duration referred to as the blank time. The blank
time is necessary to prevent any capacitive switching currents
from causing a peak current detection.
Cross-Conduction Each leg (high-side, low-side pair) of a
bridge is protected from cross-conduction, or shoot-through, by
a fixed dead time, tDEAD . This is the time between switching-off
one FET and switching-on the complementary FET. Cross-conduction is prevented by lock-out logic in each driver pair.
Diagnostics
The A4990 integrates a number of diagnostic features to protect
the driver and load as far as possible from fault conditions and
extreme operating environments. Some of these features automatically disable the current drive to protect the outputs and the
load. Others only provide an indication of the likely fault status,
by setting the error flags, EF1 and EF2. The full fault table is
shown in table 3.
Overcurrent An overcurrent fault condition is usually caused
when an output is shorted to the supply or to ground, or the motor
phase terminals are shorted together. An overcurrent condition
must exist for longer than the Overcurrent Fault Delay, tSCT ,
before EF2 is set to low and the outputs are disabled. After the
outputs have been disabled they remain latched in this state until
the power is switched-off or the INH input is taken low.
The timer for the short detection delay, tSCT , is started when an
overcurrent first occurs. If the overcurrent is still present at the
end of the short detection delay time, then a short fault will be
generated and latched. If the overcurrent goes away before the
short detection delay time is complete, then the timer is reset and
a fault is generated.
where
VREF is the internal reference voltage, and
RSx is the phase sense resistor value.
Table 2: Phase Output Current versus Sense
Resistor Value
VREF = 1.2 V
Table 3: Fault Table
RS
(mΩ)
IPHASE
(mA)
EF1
EF2
Fault Condition
Latched
Outputs
Priority
H
H
No fault
–
Active
–
1000
150
500
H
H
Undervoltage
No
Disabled
–
82.5
909
187
401
H
L
Overcurrent
Yes
Disabled
3
93.1
806
249
301
L
H
Open Load
No
Active
2
107
701
374
201
L
L
No
Disabled
1
124
605
750
100
Overvoltage or
Overtemperature
RS
(mΩ)
75
IPHASE
(mA)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
A4990
Automotive Dual Full Bridge Driver
The overcurrent fault detection functions are described in detail
as follows:
• Short to Supply – A short from any of the motor connections to
the motor supply (VBB) is detected by monitoring the voltage
across the low-side current sense resistor for each phase. This
gives a direct measurement of the current through the low side
of the bridge.
When a low-side FET is in the on-state, the voltage across the
sense resistor, under normal operating conditions, should never
be more than the Maximum Sense Voltage, VSMAX . In this state,
an overcurrent is determined to exist when the voltage across
the sense resistor exceeds the Low-Side Overcurrent Sense
Voltage, VOCL , typically 2 times VSMAX . The actual overcurrent
that VOCL represents is determined by the value of the sense
resistor and is typically 2 times ISMAX .
• Short to Ground – A short from any of the motor connections to
ground is detected by directly monitoring the current through
each of the high-side FETs in each bridge
When a high-side FET is in the on-state, the maximum current is
typically always less than 1 A. In this state, an overcurrent is determined to exist when the current through the active high-side
FET exceeds the High-Side Overcurrent Threshold, IOCH . Note
that, when a short to ground is present, the current through the
high-side FET is limited to the High-Side Current Limit, ILIMH,
during the Overcurrent Fault Delay, tSCT . This prevents large
negative transients at the phase output pins when the outputs are
switched-off.
Open Load An open load fault condition is detected if the output
current remains below the open load current level, IOLP , for longer than the Open Load Delay, tdOLP , 896 μs (typ).
When an open load fault appears, EF1 will go low indicating
the fault but no other action will be taken. If the output current
increases above the limit then the fault is removed and EF1 will
go high.
Overvoltage If the motor supply voltage, VBB , rises above the
overvoltage threshold, VBBOV , the A4990 will disable the outputs
and both EF1 and EF2 will go low indicating the fault. (Note that
this setting of the EFx flags also can indicate an overtemperature
fault condition.) The overvoltage level has a hysteresis voltage, VBBOVhys . When the motor supply voltage goes below the
overvoltage threshold by more than VBBOVhys , then the outputs
will be re-enabled and EF1 and EF2 will go high.
Overtemperature If the chip temperature rises above the
overtemperature threshold, TJF , then EF1 and EF2 will go low
and the outputs will be disabled. (Note that this setting of the EFx
flags also can indicate an overvoltage fault condition.) Disabling
the outputs helps to prevent a further increase in the chip temperature. The overtemperature level has a hysteresis temperature,
TJhys . When the temperature drops below the overtemperature
threshold by more than TJhys , then the outputs will be re-enabled
and EF1 and EF2 will go high. If the temperature is not reduced
sufficiently, then the A4990 will cycle in and out of overtemperature protection, depending on the thermal time constants of the
circuit assembly and its environment.
Undervoltage If the supply voltage, VBB, goes below its
undervoltage threshold, VBBUV , or if the voltage of the internal
regulator, VREG , goes below its undervoltage threshold, VREGUV ,
then the A4990 will disable all the bridge outputs. Note that
this fault condition does not affect the fault flag outputs (EF1
and EF2).
The A4990 will re-enable the bridge outputs when both VBB
and VREG have risen above the respective undervoltage turn-on
voltages, after a short delay. Both VBB and VREG undervoltage
detectors have hysteresis, VBBhys and VREGhys respectively, so
the turn-on voltage for VBB is VBBUV + VBBhys , and for VREG is
VREGUV + VREGhys.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
A4990
Automotive Dual Full Bridge Driver
Package LP, 20-Pin TSSOP
with Exposed Thermal Pad
0.45
6.50±0.10
8º
0º
20
0.65
20
0.20
0.09
1.70
C
3.00
4.40±0.10
6.40±0.20
3.00
6.10
0.60 ±0.15
A
1
1.00 REF
2
4.20
0.25 BSC
20X
SEATING
PLANE
0.10 C
0.30
0.19
C
SEATING PLANE
GAUGE PLANE
1
2
4.20
B
PCB Layout Reference View
1.20 MAX
0.65 BSC
0.15
0.00
For Reference Only; not for tooling use (reference MO-153 ACT)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
B Reference land pattern layout (reference IPC7351
SOP65P640X110-21M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
C Exposed thermal pad (bottom surface)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
12
A4990
Automotive Dual Full Bridge Driver
Copyright ©2012-2013, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
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