Data Sheet

PBLS4004D
40 V PNP BISS loadswitch
Rev. 03 — 6 January 2009
Product data sheet
1. Product profile
1.1 General description
PNP low VCEsat Breakthrough In Small Signal (BISS) transistor and NPN ResistorEquipped Transistor (RET) in a SOT457 (SC-74) small Surface-Mounted Device (SMD)
plastic package.
1.2 Features
n
n
n
n
n
Low VCEsat (BISS) and resistor-equipped transistor in one package
Low threshold voltage (< 1 V) compared to MOSFET
Low drive power required
Space-saving solution
Reduction of component count
1.3 Applications
n
n
n
n
Supply line switches
Battery charger switches
High-side switches for LEDs, drivers and backlights
Portable equipment
1.4 Quick reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
Unit
TR1; PNP low VCEsat transistor
VCEO
collector-emitter voltage
IC
collector current
RCEsat
collector-emitter saturation
resistance
-
-
−40
V
[1]
-
-
−1
A
[2]
-
240
340
mΩ
-
-
50
V
open base
IC = −500 mA;
IB = −50 mA
TR2; NPN resistor-equipped transistor
VCEO
collector-emitter voltage
open base
IO
output current
-
-
100
mA
R1
bias resistor 1 (input)
15.4
22
28.6
kΩ
R2/R1
bias resistor ratio
0.8
1
1.2
[1]
Device mounted on a ceramic Printed-Circuit Board (PCB), Al2O3, standard footprint.
[2]
Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
2. Pinning information
Table 2.
Pinning
Pin
Description
Simplified outline
1
emitter TR1
2
base TR1
3
output (collector) TR2
4
GND (emitter) TR2
5
input (base) TR2
6
collector TR1
6
5
4
1
2
3
Graphic symbol
6
5
R1
4
R2
TR2
TR1
1
2
3
sym036
3. Ordering information
Table 3.
Ordering information
Type number
PBLS4004D
Package
Name
Description
Version
SC-74
plastic surface-mounted package (TSOP6); 6 leads
SOT457
4. Marking
Table 4.
Marking codes
Type number
Marking code
PBLS4004D
R4
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
open emitter
-
−40
V
TR1; PNP low VCEsat transistor
VCBO
collector-base voltage
VCEO
collector-emitter voltage
open base
-
−40
V
VEBO
emitter-base voltage
open collector
-
−5
V
IC
collector current
[1]
-
−0.7
A
[2]
-
−0.85
A
[3]
ICM
peak collector current
IB
base current
IBM
peak base current
single pulse; tp ≤ 1 ms
single pulse; tp ≤ 1 ms
PBLS4004D_3
Product data sheet
-
−1
A
-
−2
A
-
−0.3
A
-
−1
A
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
2 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
Table 5.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Ptot
Parameter
Conditions
total power dissipation
Tamb ≤ 25 °C
Min
Max
Unit
[1]
-
250
mW
[2]
-
350
mW
[3]
-
400
mW
TR2; NPN resistor-equipped transistor
VCBO
collector-base voltage
open emitter
-
50
V
VCEO
collector-emitter voltage
open base
-
50
V
VEBO
emitter-base voltage
open collector
-
10
V
VI
input voltage
positive
-
+40
V
negative
-
−10
V
IO
output current
-
100
mA
ICM
peak collector current
single pulse; tp ≤ 1 ms
-
100
mA
Ptot
total power dissipation
Tamb ≤ 25 °C
-
200
mW
[1]
-
400
mW
[2]
-
530
mW
[3]
-
600
mW
Per device
total power dissipation
Ptot
Tamb ≤ 25 °C
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
−65
+150
°C
Tstg
storage temperature
−65
+150
°C
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3]
Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBLS4004D_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
3 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa461
0.8
Ptot
(W)
(1)
0.6
(2)
(3)
0.4
0.2
0
0
40
80
120
160
Tamb (°C)
(1) Ceramic PCB, Al2O3, standard footprint
(2) FR4 PCB, mounting pad for collector 1 cm2
(3) FR4 PCB, standard footprint
Fig 1.
Power derating curves
6. Thermal characteristics
Table 6.
Symbol
Thermal characteristics
Parameter
Conditions
thermal resistance from
junction to ambient
in free air
Min
Typ
Max
Unit
[1]
-
-
312
K/W
[2]
-
-
236
K/W
[3]
-
-
210
K/W
-
-
105
K/W
Per device
Rth(j-a)
Per TR1; PNP low VCEsat transistor
Rth(j-sp)
thermal resistance from
junction to solder point
[1]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2]
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.
[3]
Device mounted on a ceramic PCB, Al2O3, standard footprint.
PBLS4004D_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
4 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa462
103
δ=1
0.75
0.5
0.33
102
0.2
0.1
Zth(j-a)
(K/W)
0.05
0.02
0.01
10
0
1
10−1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, standard footprint
Fig 2.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
006aaa463
103
Zth(j-a)
(K/W)
δ=1
0.75
0.5
0.33
0.2
102
0.1
0.05
10
0.02
0.01
0
1
10−5
10−4
10−3
10−2
10−1
1
10
102
103
tp (s)
FR4 PCB, mounting pad for collector 1 cm2
Fig 3.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
PBLS4004D_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
5 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa464
103
Zth(j-a)
(K/W) δ = 1
0.75
0.5
2
10
0.33
0.2
0.1
0.05
10
0.02
0.01
0
1
10−5
10−4
10−3
10−2
10−1
1
102
10
103
tp (s)
Ceramic PCB, Al2O3, standard footprint
Fig 4.
TR1 (PNP): Transient thermal impedance from junction to ambient as a function of pulse duration; typical
values
7. Characteristics
Table 7.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCB = −40 V; IE = 0 A
-
-
−0.1
µA
VCB = −40 V; IE = 0 A;
Tj = 150 °C
-
-
−50
µA
TR1; PNP low VCEsat transistor
ICBO
collector-base cut-off
current
ICES
collector-emitter
cut-off current
VCE = −30 V; VBE = 0 V
-
-
−0.1
µA
IEBO
emitter-base cut-off
current
VEB = −5 V; IC = 0 A
-
-
−0.1
µA
hFE
DC current gain
VCE = −5 V; IC = −1 mA
VCEsat
collector-emitter
saturation voltage
300
-
-
VCE = −5 V; IC = −100 mA
[1]
300
-
800
VCE = −5 V; IC = −500 mA
[1]
215
-
-
VCE = −5 V; IC = −1 A
[1]
150
-
-
IC = −100 mA; IB = −1 mA
-
−80
−140
mV
IC = −500 mA; IB = −50 mA
[1]
-
−120
−170
mV
IC = −1 A; IB = −100 mA
[1]
-
−220
−310
mV
-
240
340
mΩ
RCEsat
collector-emitter
saturation resistance
IC = −500 mA; IB = −50 mA
[1]
VBEsat
base-emitter
saturation voltage
IC = −1 A; IB = −50 mA
[1]
-
-
−1.1
V
VBEon
base-emitter
turn-on voltage
VCE = −5 V; IC = −1 A
[1]
-
-
−1
V
PBLS4004D_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
6 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
Table 7.
Characteristics …continued
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fT
transition frequency
IC = −50 mA; VCE = −10 V;
f = 100 MHz
150
-
-
MHz
Cc
collector capacitance
VCB = −10 V; IE = ie = 0 A;
f = 1 MHz
-
-
12
pF
TR2; NPN resistor-equipped transistor
ICBO
collector-base cut-off
current
VCB = 50 V; IE = 0 A
-
-
100
nA
ICEO
collector-emitter
cut-off current
VCE = 30 V; IB = 0 A
-
-
1
µA
VCE = 30 V; IB = 0 A;
Tj = 150 °C
-
-
50
µA
µA
IEBO
emitter-base cut-off
current
VEB = 5 V; IC = 0 A
-
-
180
hFE
DC current gain
VCE = 5 V; IC = 5 mA
60
-
-
VCEsat
collector-emitter
saturation voltage
IC = 10 mA; IB = 0.5 mA
-
-
150
mV
VI(off)
off-state input voltage VCE = 5 V; IC = 100 µA
-
1.1
0.8
V
VI(on)
on-state input voltage VCE = 0.3 V; IC = 5 mA
2.5
1.7
-
V
R1
bias resistor 1 (input)
15.4
22
28.6
kΩ
R2/R1
bias resistor ratio
Cc
collector capacitance
[1]
VCB = 10 V; IE = ie = 0 A;
f = 1 MHz
1
1.2
-
2.5
pF
Pulse test: tp ≤ 300 µs; δ ≤ 0.02.
PBLS4004D_3
Product data sheet
0.8
-
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
7 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa465
1200
hFE
800
−2.4
006aaa469
IC
(A)
IB (mA) = −24
−21.6
−19.2
−16.8
−14.4
−12
−9.6
−1.6
(1)
−7.2
(2)
−4.8
−0.8
400
−2.4
(3)
0
−10−1
−1
−10
−102
0
−103
−104
IC (mA)
0
VCE = −5 V
−1
−2
−3
−4
−5
VCE (V)
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig 5.
TR1 (PNP): DC current gain as a function of
collector current; typical values
006aaa467
−1.0
VBE
(V)
Fig 6.
TR1 (PNP): Collector current as a function of
collector-emitter voltage; typical values
006aaa468
−1.3
VBEsat
(V)
−0.8
(1)
−0.9
(1)
−0.6
(2)
(2)
−0.5
(3)
(3)
−0.4
−0.2
−10−1
−1
−10
−102
−103
−104
IC (mA)
−0.1
−10−1
VCE = −5 V
−1
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
TR1 (PNP): Base-emitter voltage as a function
of collector current; typical values
Fig 8.
−103
−104
IC (mA)
TR1 (PNP): Base-emitter saturation voltage as
a function of collector current; typical values
PBLS4004D_3
Product data sheet
−102
IC/IB = 20
(1) Tamb = −55 °C
Fig 7.
−10
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
8 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa466
−1
006aaa471
−10
VCEsat
(V)
VCEsat
(V)
−1
−10−1
−10−1
(1)
(2)
(1)
(2)
−10−2
−10−1
−10−2
(3)
−1
−10
−102
−103
−104
IC (mA)
(3)
−10−3
−10−1
−1
−102
−103
−104
IC (mA)
Tamb = 25 °C
IC/IB = 20
(1) Tamb = 100 °C
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig 9.
−10
TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa470
103
Fig 10. TR1 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa472
103
RCEsat
(Ω)
RCEsat
(Ω)
102
102
(1)
10
(2)
10
(3)
1
1
(1)
(2)
(3)
10−1
−10−1
−1
−10
−102
−103
−104
IC (mA)
10−1
−10−1
−1
−102
−103
−104
IC (mA)
Tamb = 25 °C
IC/IB = 20
(1) Tamb = 100 °C
(1) IC/IB = 100
(2) Tamb = 25 °C
(2) IC/IB = 50
(3) Tamb = −55 °C
(3) IC/IB = 10
Fig 11. TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
Fig 12. TR1 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBLS4004D_3
Product data sheet
−10
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
9 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
006aaa038
103
006aaa039
10−1
hFE
(1)
(1)
(2)
(3)
VCEsat
(V)
(2)
102
(3)
10
1
10−1
1
102
10
10−2
1
IC (mA)
VCE = 5 V
IC/IB = 20
(1) Tamb = 150 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
Fig 13. TR2 (NPN): DC current gain as a function of
collector current; typical values
006aaa040
10
102
10
IC (mA)
Fig 14. TR2 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aaa041
10
VI(off)
(V)
VI(on)
(V)
(1)
(2)
(3)
1
(1)
(2)
1
(3)
10−1
10−1
1
102
10
10−1
10−2
10−1
IC (mA)
IC (mA)
VCE = 0.3 V
VCE = 5 V
(1) Tamb = −40 °C
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
Fig 15. TR2 (NPN): On-state input voltage as a
function of collector current; typical values
Fig 16. TR2 (NPN): Off-state input voltage as a
function of collector current; typical values
PBLS4004D_3
Product data sheet
101
1
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
10 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
8. Package outline
3.1
2.7
6
3.0
2.5
1.7
1.3
1.1
0.9
5
4
2
3
0.6
0.2
pin 1 index
1
0.40
0.25
0.95
0.26
0.10
1.9
Dimensions in mm
04-11-08
Fig 17. Package outline SOT457 (SC-74)
9. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number
PBLS4004D
Package
SOT457
Description
3000
10000
4 mm pitch, 8 mm tape and reel; T1
[2]
-115
-135
4 mm pitch, 8 mm tape and reel; T2
[3]
-125
-165
[1]
For further information and the availability of packing methods, see Section 13.
[2]
T1: normal taping
[3]
T2: reverse taping
PBLS4004D_3
Product data sheet
Packing quantity
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
11 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
10. Soldering
3.45
1.95
0.45 0.55
(6×) (6×)
0.95
solder lands
solder resist
3.3 2.825
0.95
solder paste
occupied area
0.7
(6×)
Dimensions in mm
0.8
(6×)
2.4
sot457_fr
Fig 18. Reflow soldering footprint SOT457 (SC-74)
5.3
1.5
(4×)
solder lands
1.475
0.45
(2×)
5.05
solder resist
occupied area
1.475
Dimensions in mm
preferred transport
direction during soldering
1.45
(6×)
2.85
sot457_fw
Fig 19. Wave soldering footprint SOT457 (SC-74)
PBLS4004D_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
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PBLS4004D
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40 V PNP BISS loadswitch
11. Revision history
Table 9.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PBLS4004D_3
20090106
Product data sheet
-
PBLS4004D_2
Modifications:
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Figure 5, 9 and 10: amended
Section 12 “Legal information”: updated
PBLS4004D_2
20050719
Product data sheet
-
PBLS4004D_1
PBLS4004D_1
20041109
Objective data sheet
-
-
PBLS4004D_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
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13 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
12. Legal information
12.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PBLS4004D_3
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 03 — 6 January 2009
14 of 15
PBLS4004D
NXP Semiconductors
40 V PNP BISS loadswitch
14. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
10
11
12
12.1
12.2
12.3
12.4
13
14
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Packing information. . . . . . . . . . . . . . . . . . . . . 11
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Contact information. . . . . . . . . . . . . . . . . . . . . 14
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 6 January 2009
Document identifier: PBLS4004D_3
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