Fujitsu Microelectronics Europe
Application Note
MCU-AN-390027-E-V28
F²MC-16LX FAMILY
16-BIT MICROCONTROLLER
MB90F3XX/F4XX/F5XX/F8XX/F9XX
BI-ROM PROTOCOL
APPLICATION NOTE
BI-ROM PROTOCOL
Revision History
Revision History
Date
02.08.99
27.09.99
28.07.00
22.02.02
24.07.02
11.04.03
31.07.03
07.01.05
19.01.05
Version
V2.0
V2.1
V2.2
V2.3
V2.4
V2.5
V2.6
V2.7
V2.8
Issue
started
some comments added
New format
RAMCode Start Addresses added
New format, New series added
New series added
New series added, Chapter 3 added, Flash-Security added
New series added
MB9059x and MB9039x without ‘communication check’
This document contains 12 pages.
MCU-AN-390027-E-V28
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© Fujitsu Microelectronics Europe GmbH
BI-ROM PROTOCOL
Warranty and Disclaimer
Warranty and Disclaimer
To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH restricts
its warranties and its liability for all products delivered free of charge (eg. software include or
header files, application examples, target boards, evaluation boards, engineering samples of IC’s
etc.), its performance and any consequential damages, on the use of the Product in accordance with
(i) the terms of the License Agreement and the Sale and Purchase Agreement under which
agreements the Product has been delivered, (ii) the technical descriptions and (iii) all accompanying
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Microelectronics Europe GmbH disclaims all warranties and liabilities for the performance of the
Product and any consequential damages in cases of unauthorised decompiling and/or reverse
engineering and/or disassembling. Note, all these products are intended and must only be used
in an evaluation laboratory environment.
1.
Fujitsu Microelectronics Europe GmbH warrants that the Product will perform substantially in
accordance with the accompanying written materials for a period of 90 days form the date of
receipt by the customer. Concerning the hardware components of the Product, Fujitsu
Microelectronics Europe GmbH warrants that the Product will be free from defects in material
and workmanship under use and service as specified in the accompanying written materials
for a duration of 1 year from the date of receipt by the customer.
2.
Should a Product turn out to be defect, Fujitsu Microelectronics Europe GmbH´s entire liability
and the customer´s exclusive remedy shall be, at Fujitsu Microelectronics Europe GmbH´s
sole discretion, either return of the purchase price and the license fee, or replacement of the
Product or parts thereof, if the Product is returned to Fujitsu Microelectronics Europe GmbH in
original packing and without further defects resulting from the customer´s use or the transport.
However, this warranty is excluded if the defect has resulted from an accident not attributable
to Fujitsu Microelectronics Europe GmbH, or abuse or misapplication attributable to the
customer or any other third party not relating to Fujitsu Microelectronics Europe GmbH.
3.
To the maximum extent permitted by applicable law Fujitsu Microelectronics Europe GmbH
disclaims all other warranties, whether expressed or implied, in particular, but not limited to,
warranties of merchantability and fitness for a particular purpose for which the Product is not
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4.
To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH´s
and its suppliers´ liability is restricted to intention and gross negligence.
NO LIABILITY FOR CONSEQUENTIAL DAMAGES
To the maximum extent permitted by applicable law, in no event shall Fujitsu
Microelectronics Europe GmbH and its suppliers be liable for any damages whatsoever
(including but without limitation, consequential and/or indirect damages for personal
injury, assets of substantial value, loss of profits, interruption of business operation,
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the Product.
Should one of the above stipulations be or become invalid and/or unenforceable, the remaining
stipulations shall stay in full effect
© Fujitsu Microelectronics Europe GmbH
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MCU-AN-390027-E-V28
BI-ROM PROTOCOL
Contents
Contents
REVISION HISTORY ............................................................................................................ 2
WARRANTY AND DISCLAIMER ......................................................................................... 3
CONTENTS .......................................................................................................................... 4
0 INTRODUCTION.............................................................................................................. 5
1 FLASH MCU BI-ROM PROTOCOL ................................................................................. 6
1.1
Memory Map ........................................................................................................... 6
1.2
Common Pin Settings.............................................................................................. 6
1.3
Commands.............................................................................................................. 7
1.4
RAMCode Startaddress........................................................................................... 8
2 EXAMPLES.................................................................................................................... 11
2.1
General Communications Check ........................................................................... 11
2.2
Download (00h) ..................................................................................................... 11
2.3
Execute (40h)........................................................................................................ 11
3 NOTES........................................................................................................................... 12
3.1
Flash-Page ‘FF’ ..................................................................................................... 12
3.2
Flash-Security Feature .......................................................................................... 12
MCU-AN-390027-E-V28
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© Fujitsu Microelectronics Europe GmbH
BI-ROM PROTOCOL
Introduction
0 Introduction
The F²MC-16LX Flash MCU contains a burn-in ROM (BiROM) program that supports a
proprietary protocol to allow download of a user program to on-chip RAM memory (step 1).
The user program is then able to manipulate on-chip Flash memory as required (step 2).
Two basic serial modes are supported, synchronous serial and asynchronous serial. It is not
important to the protocol which serial mode is in use.
The below diagram illustrates the context.
BI-ROM
BI-ROM
990hex
RAM
RS232 to PC
UART
RS232 to PC
UART
990hex
RAM
FLASH
FLASH
1) Load RAM with LOADER Module
2) Program Flash out of RAM
This application note describes the commands, which are supported by the BiROM of the
16LX Flash MCUs in order to generate an own programming environment
.
© Fujitsu Microelectronics Europe GmbH
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MCU-AN-390027-E-V28
BI-ROM PROTOCOL
Chapter 1 Flash MCU BI-ROM Protocol
1 Flash MCU BI-ROM Protocol
As already mentioned, two basic serial modes are supported, synchronous serial and
asynchronous serial. After reset of the MCU, the mode pins and two port pins select the
programming mode respectively. It is not important to the protocol which serial mode is in
use. However, communications settings obviously vary:
Synchronous
8 data bits, external clock (500kbs max)
Asynchronous
8 data bits, 1 stop bit, no parity, baud rate: (mcu clk / 4) / (8 x 13 x 2)
(4800 @ 4MHz, 9600 @ 8MHz, 19200 @ 16MHz)
Follow the sequences in the examples to download and execute the user program. Once the
user program is running, the BiROM is no longer active and all further communication is user
defined. To allow compatibility with all devices, it is important that the user program uses the
minimum of resources. Therefore, we recommend your program uses the following memory
map:
1.1
Memory Map
0100 – 016F
Variables
0170 – 017F
Stack
0180 – 018F
Registers (bank 0)
0190 – end of RAM
User program code and write buffer (512B
max)
1.2
Common Pin Settings
Pin Name
Logic
Level
Description
QFP100
QFP120
MD2,1,0
110
Programming mode
51,50,49
87,88,89
P00 *1 *2
0
Programming mode
85
95 (J19/21)*)
P01 *1
0
Async, 4800, 8bit, 1 stop, no
parity
86
96 (J19/20) *)
1
Clk Sync, Ext clock (500kbs
max)
Vss
-
Power supply
81
91 (J19/25) *)
Vcc
-
Power supply
84
94 (J19/22) *)
*)
Pin numbers in brackets refer to the QFP120 Flash-Test-Board (FLASH-EVA2-120P-M13)
*1
Check Table 1 which port pins are used
MCU-AN-390027-E-V28
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© Fujitsu Microelectronics Europe GmbH
BI-ROM PROTOCOL
Chapter 1 Flash MCU BI-ROM Protocol
*2
Some Flash devices can be used with different external
1.3
Commands
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte n
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
Command
Address
Address
Count
Count
Data/Checksum
7-0
15-8
7-0
15-8
7-0
7-0
Command
Address
Various actions, see table below.
Start address of RAM download code
Count
Number of bytes to transfer. 1 = 1 byte.
Data
Data bytes sent
Checksum
Cumulative sum
Commands
Description
Comment
0 0 0 1 1 - - - 18 Communication
check
General communications check
0 0 0 0 0 - - - 00 Download
User program is downloaded to RAM
0 1 0 0 0 - - - 4x Execute
User program is executed.
Address and count is ignored (start address is fixed
and depends on device, see table to check details)
Note:
The MB90F59x and MB90F39x Series do not support the command ‘Communication check’.
© Fujitsu Microelectronics Europe GmbH
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MCU-AN-390027-E-V28
BI-ROM PROTOCOL
Chapter 1 Flash MCU BI-ROM Protocol
1.4
RAMCode Startaddress
The following Table lists the fixed RAMCode start address and Used Port Pins for the
different Flash microcontroller series.
Part number
RAM Execution
Start address
Port Pins
MB90F038S
190h
P00, P01
MB90F334
190h
P60, P61
MB90F337
190h
P60, P61
MB90F342(C)A(S)
190h
P00, P01
MB90F345(C)A(S)
190h
P00, P01
MB90F347(C)A(S)
190h
P00, P01
MB90F349(C)A(S)
190h
P00, P01
MB90F351/S
190h
P00, P01
MB90F352/S
190h
P00, P01
MB90F387/S
190h
P30, P31
MB90F394H
990h
P00, P01
MB90F395H
990h
P00, P01
MB90MF408
990h
P80, P81
MB90F423GA/GB/GC
190h
P00, P01
MB90F428GA/GB/GC
190h
P00, P01
MB90F438L/LS
990h
P00, P01
MB90F439/S
990h
P00, P01
MB90F443G
990h
P00, P01
MB90F455/S
190h
P30, P31
MB90F456/S
190h
P30, P31
MB90F457/S
190h
P30, P31
MB90F462
190h
P00, P01
MB90F474H/L
190h
P80, P81
MB90F481
190h
P80, P81
MB90F482
190h
P80, P81
MB90F497G
190h
P00, P01
MB90F523B
990h
P00, P01
MB90F543/G/GS
990h
P00, P01
MB90F546G/GS
990h
P00, P01
MB90F548G/GS
990h
P00, P01
MCU-AN-390027-E-V28
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© Fujitsu Microelectronics Europe GmbH
BI-ROM PROTOCOL
Chapter 1 Flash MCU BI-ROM Protocol
Part number
RAM Execution
Start address
Port Pins
MB90F549
990h
P00, P01
MB90F553A
990h
P00, P01
MB90F562/B
190h
P00, P01
MB90F568
190h
P00, P01
MB90F574/A
990h
P00, P01
MB90F583C/CA
990h
P00, P01
MB90F594A/G
990h
P00, P01
MB90F591/G
990h
P00, P01
MB90F598/G
990h
P00, P01
MB90F654A
990h
P00, P01
MB90F804
190h
P65, P66
MB90F822
190h
P00, P01
MB90F823
190h
P00, P01
MB90F867/S
190h
P00, P01
MB90F897/S
190h
P30, P31
MB90F947
990h
P00, P01
MB90F949
990h
P00, P01
Table 1: RAM start address
© Fujitsu Microelectronics Europe GmbH
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MCU-AN-390027-E-V28
BI-ROM PROTOCOL
Chapter 1 Flash MCU BI-ROM Protocol
Command Responses
Byte 0
7 6 5 4 3 2 1 0
Command
Resp
7-4
3-0
Resp
Status response from MCU (bits 7-4 return bits 7-4 of command byte)
Response
Description
- - - - 0 0 0 1 x1
OK
- - - - 0 0 1 0 x2
Command Error
MCU-AN-390027-E-V28
Comment
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© Fujitsu Microelectronics Europe GmbH
BI-ROM PROTOCOL
Chapter 2 EXAMPLES
2 EXAMPLES
2.1
General Communications Check
PC
18
MCU
11
Note:
The MB90F59x and MB90F39x Series do not support the command ‘Communication check’.
2.2
Download (00h)
command / address
PC
00
09
count
90
00
data
02
01
chk
02
resp
9E
MCU
01
This example downloads 2 data bytes, 01hex and 02hex onto RAM location 990hex. See also the
cumulated checksum 9Ehex and response from the MCU.
2.3
Execute (40h)
command / address
PC
40
xx
Xx
count
00
00
MCU
© Fujitsu Microelectronics Europe GmbH
no response, jump is immediate
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MCU-AN-390027-E-V28
BI-ROM PROTOCOL
Chapter 3 Notes
3 Notes
3.1
Flash-Page ‘FF’
When you select the Burn-IN ROM mode for the CPU, and you try to program the upper Flash
memory area with code executed in RAM the situation is as follows:
In Burn-IN ROM mode the Burn-IN ROM is always visible at FF0000-FFFFFF. So you cannot
program the page FF directly. Therefore Bit 3 of the FMCS register is used. Bit 3 of the FMCS
register is used as a upper memory enable. To program the page FF, you have to set this bit first. After
this the page FF will be mapped to page FE.
3.2
Flash-Security Feature
Power-ON Reset or external Reset always will activate the Flash-Security (if available within the
MCU-series)
To restart the BI-ROM (e.g. in order to upload another kernel) WITHOUT ACTIVATING the
FLASH SECURITY two methods can be used:
1) Software-Reset
CKSCR = 0xFC; // switch to Main-Clock
LPMCR = 0x00; // Software Reset
2) Jump to BI-ROM
This needs to know the start-address of the BI-ROM: read addresses 0xFFFFDC..0xFFFFDE
Example 90F543 starts at 0xFFFB50:
asm("\tJMPP 0xFFFB50"); // Jump to Bi-ROM 90F543G
Example 90F387 starts at 0xFFFB80:
asm("\tJMPP 0xFFFB80"); // Jump to Bi-ROM 90F387
After the restart all BI-ROM functions are available again,
e.g.: PC send 0x18 => MCU answers with 0x11
MCU-AN-390027-E-V28
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© Fujitsu Microelectronics Europe GmbH