A3953 to A4973 Application Note

Product Information
Device Comparisons of A3953 and A4973
The Allegro® A4973 is intended as the “next generation”
A3953. The most notable design upgrade is the transition
from bipolar to DMOS technology. DMOS offers smaller
geometries, higher power densities and better switching
performance than bipolar technologies.
As a result of these upgrades some parameters have
changed which may require BOM changes. In most
applications only the sense resistor and REF voltage need
to be changed. For customers who are using the A3953
and must convert to the A4973 this document shows what
changes need to be made to existing circuits in order to use
the new device in a similar way.
The data shown here is for reference only. Refer to the
datasheets of the individual devices for parameters and
detailed functional descriptions. If data in this document
does not match the associated device datasheet, then please
be aware that the datasheet is the governing specification
document in all cases.
Package B, 16-pin DIP
with exposed tabs
Figure 1. Both the A4973 and the A3953 are provided in the 16-pin
DIP (B) and 16-pin SOIC (LB) packages, shown here (not to scale).
Table of Contents
Functional Block Diagrams
Absolute Maximum Ratings
VSENSE Range
VBB Range
Reference Voltage and Current Regulation
VREF Range
RSENSE Selection
VSAT versus RDS(on)X
Voltage Drop
Supply Currents
Thermals
Minimum Regulated Output Current
Decay Modes and Brake
Brake Modes
Input Logic Levels
296086-AN
Package LB, 16-pin SOIC
with internally fused pins
2
3
3
3
3
3
3
3
4
4
4
5
5
5
5
Functional Block Diagrams
6 V CC
LOAD
SUPPLY
OUT A
9
OUT B
LOGIC
SUPPLY
LOAD
SUPPLY
A4973
15
10
16
SLEEP &
STANDBY MODES
MODE
14
PHASE
7
V BB
BRAKE
1
PWM LATCH
R
11
–
8
+
ENABLE
INPUT LOGIC
UVLO
& TSD
SENSE
2
Q
S
BLANKING
GROUND
V CC
4
RS
RC
3
5
12
+ –
2
13
GROUND
REF
V TH
CT
RT
6 V CC
15
10
LOAD
SUPPLY
OUT A
9
OUT B
LOGIC
SUPPLY
LOAD
SUPPLY
A3953
16
SLEEP &
STANDBY MODES
MODE
14
PHASE
7
V BB
BRAKE
1
PWM LATCH
R
11
–
8
+
ENABLE
INPUT LOGIC
UVLO
& TSD
SENSE
Q
S
BLANKING
GROUND
4
V CC
RS
RC
3
5
12
+ –
2
REF
RT
CT
13
GROUND
V TH
Dwg. FP-036-2A
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VREF Range
The addition of the internal reference divider on the A4973
requires a different voltage be applied to the REF input.
Absolute Maximum Ratings
Some of the absolute maximum ratings have changed from the
A3953 to the A4973. The differences are shown in table 1.
The new ITRIP formula is:
VSENSE Range
The absolute maximum voltage on the SENSE pin has been
reduced from 1 V (VCC = 5 V) for the A3953 down to 500 mV for
the A4973. This makes it necessary for some customers to reduce
the size of the current sensing resistor, RSENSE , so that under
maximum load current the voltage on the SENSE pin does not
exceed 500 mV.
VBB Range
The A3953 was capable of operating down to VBB equal to the
logic input minimum of 3V. Due to the DMOS gate thresholds on
the A4973, the supply must be at least 5 V (see table 2). At VBB
< 8 V the output on-resistance will be higher than specified (see
table 3).
Reference Voltage and Current Regulation
Current regulation is controlled via the voltage on the REF pin
and the selected sense resistor. The A3953 did not have a divider.
The A4973 has a divider (divide by 2) before the reference voltage is compared to the voltage on the SENSE pin. When the
sense voltage reaches the reference voltage level, the PWM latch
is tripped.
ITRIP ≈ VREF / (2 × RSENSE)
(1)
RSENSE Selection
As noted above, the maximum allowable VSENSE voltage is
decreased from 1 V to 500 mV. When calculating the value for
RSENSE the upper limit is defined by the maximum load current
and the maximum allowable sense voltage. For example, if 1 A
load current is required, the largest sense resistor that can be used
is calculated as:
RSENSE (max) = 500 (mV) / 1 (A) = 0.5 (Ω)
(2)
This results in maximum sense resistor of 0.5 Ω. Picking a value
slightly lower will provide a guard band for resistor tolerances.
VSAT versus RDS(on)X
One of the largest differences between the A3953 and the A4973
is the change from bipolar to DMOS topology. This results in
significant improvements to die size. The A4973 bridge is made
with a P-channel high side and an N-channel low side.
RDS(on) changes significantly with temperature, increasing as temperature rises. For every 100°C rise, RDS(on) increases by a factor
of 1.6 times. The A4973 RDS(on) is specified for VBB down to 8 V.
For VBB less than 8 V, RDS(on) will be higher (see table 3).
Table 1. Absolute Maximum Ratings Comparison
Characteristic
Sense Voltage
Output Current, Continuous
Symbol
VSENSE
Notes
VCC = 5.0 V
VCC = 3.3 V
IOUT
Rating
A4973
A3953
0.5
±1.5
Unit
1.0
V
0.4
V
±1.3
A
Table 2. VBB Comparison
Characteristic
Load Supply Voltage Range
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Symbol
Test Conditions
VBB
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Limit (Min.)
A4973
A3953
5
VCC
Unit
V
3
Note that the voltage drop across the A4973 bridge at 1.5 A is
1.5 V. At first glance the performance appears better than the
A3953 which would have the same voltage drop at 0.85 A output
current. The difference is that the RDS(on) in the A4973 increases
with increasing temperature, resulting in a larger voltage drop
at higher temperatures. Assuming an operating temperature rise
of 100°C above ambient, the expected RDS(on) would be 1.6 Ω,
resulting in a total voltage drop of 2.4 V at 1.5 A. A total drop of
2.4 V at operating temperature is close to the 2.6 V drop across
the A3953 at the same output current.
Temperature (°C)
Voltage Drop
Bipolar devices are defined by VCE but DMOS devices are
defined by RDS(on). The voltage drop across the A4973 bridge
is a function of current and the RDS(on) at the specific junction
temperature. In order to make the change from the A3953 to the
A4973 as transparent as possible the RDS(on) of the source plus
sink drivers was selected to have similar voltage drops under
similar load conditions. Tables 3 and 4 compare the A3953 bipolar bridge and the A4973 DMOS bridge.
A4973
Output Current (Arms)
Figure 2. Temperature versus Output Current
Temperature (°C)
Supply Currents
The A3953 has bipolar output transistors, with base drive supplied by VCC . The A4973 has MOS output transistors, with gate
drive supplied by the load supply, VBB . This change reduces the
current required of the logic supply, VCC , but increases the current required by VBB to ≈ 480 μA. The additional current required
by VBB is generally miniscule compared to the current drawn to
drive the load.
Thermals
As stated previously, the A4973 utilizes MOS technology for
the output transistors, as opposed to the bipolar transistors of the
A3953. The A4973 was found to run cooler than the A3953 when
both were run with VCC = 5 V and VBB = 24 V (see figure 2). The
A4973 does run hotter as VBB is reduced, but still runs cooler
than the A3953 at 1 A output current (see figure 3).
A3953
A4973
A3953
VBB (V)
Figure 3. Temperature versus Load Supply Voltage
Table 3. A4973 Output Resistance (DMOS Bridge)
Characteristic
Output On Resistance
Symbol
RDS(on)
Test Conditions
Total sink and source, IOUT = 1.5 A,
VBB > 8 V, TJ = 25°C
Limits
Min.
Typ.
Max.
–
1
1.4
Unit
Ω
Table 4. A3953 Output Saturation (Bipolar Bridge)
Characteristic
Symbol
Test Conditions
Source, IOUT = –0.85 A
Output Saturation Voltage
296086-AN
VCE(SAT)
Limits
Min.
Typ.
Max.
–
1.0
1.2
Unit
V
Source, IOUT = –1.5 A
–
1.3
1.5
V
Sink, IOUT = 0.85 A
–
0.5
0.6
V
Sink, IOUT = 1.5 A
–
1.3
1.5
V
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Minimum Regulated Output Current
The minimum regulated output current is determined by grounding the reference input while driving a load. The current cannot
get down to zero due to the blanking time. With RC values of
30 kΩ and 1000 pF, the A4973 is able to regulate to a lower current, 160 mA, than the A3953 can. The A3953 can only regulate
down to 260 mA. See figures 4 and 5.
IOUT
Decay Modes and Brake
After the current has reached the ITRIP value, the current will
decay based on the fixed RC pin and MODE pin settings.
The A3953 has a MODE pin which enables or disables current
control during braking. This feature actively limits the current
recirculated in the sink drivers during the off-time.
The A4973 does not have the ability to measure the current while
the current is decaying, because of the DMOS process structures:
the body diodes of the DMOS will conduct the current. Therefore
the MODE pin on the A4973 is used to select fast decay or slow
decay during the fixed off-time cycle.
Figure 4. A4973 regulation of IOUT (green trace)
Brake Modes
The A3953 has two distinct brake modes. Mode high brake monitored the current and would PWM the brake to keep it from going
over the peak current setting. Mode low brake offered no current
control. The A4973 brake is equivalent to the mode low brake of
the A3953. This mode requires the customer to ensure that the
braking current does not exceed the absolute maximum current of
the A4973 (1.5 A).
IOUT
Figure 5. A3953 regulation regulation of IOUT (green trace)
Input Logic Levels
The A4973 uses CMOS type inputs with thresholds that vary with
the logic supply voltage. The A3953 has TTL inputs. At higher
logic supply voltages the logic high requirement may not be
guaranteed. See table 5.
Table 5. VIN Comparison
Limits
Characteristic
Symbol
A4973
A3953
Unit
Min.
Max.
Min.
Max.
VIN(1)
VCC×
0.55
–
2.0
–
V
VIN(0)
–
VCC×
0.27
–
0.8
V
Logic Input Voltage
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Test Conditions
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nor for any infringement of patents or other rights of third parties which may result from its use.
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