Data Sheet

PIMC31
500 mA, 50 V NPN/PNP double resistor-equipped transistor;
R1 = 1 kΩ, R2 = 10 kΩ
Rev. 01 — 24 March 2009
Product data sheet
1. Product profile
1.1 General description
500 mA, 50 V NPN/PNP double Resistor-Equipped Transistor (RET) in a small
SOT457 (SC-74) Surface-Mounted Device (SMD) plastic package.
NPN/NPN complement: PIMN31
1.2 Features
n
n
n
n
n
n
500 mA output current capability
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
AEC-Q101 qualified
1.3 Applications
n Digital application in automotive and industrial segments
n Switching loads
1.4 Quick reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
Unit
-
-
50
V
-
-
500
mA
kΩ
Per transistor; for the PNP transistor with negative polarity
VCEO
collector-emitter voltage
open base
IO
output current
R1
bias resistor 1 (input)
0.7
1
1.3
R2/R1
bias resistor ratio
9
10
11
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
2. Pinning information
Table 2.
Pinning
Pin
Description
Simplified outline
1
GND (emitter) TR1
2
input (base) TR1
3
output (collector) TR2
4
GND (emitter) TR2
5
input (base) TR2
6
output (collector) TR1
6
5
4
1
2
3
Graphic symbol
6
5
R1
4
R2
TR2
TR1
R2
1
R1
2
3
006aaa143
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PIMC31
SC-74
plastic surface-mounted package (TSOP6); 6 leads
SOT457
Table 4.
Marking codes
4. Marking
Type number
Marking code
PIMC31
ZH
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor; for the PNP transistor with negative polarity
VCBO
collector-base voltage
open emitter
-
50
V
VCEO
collector-emitter voltage
open base
-
50
V
VEBO
emitter-base voltage
open collector
-
5
V
VI
input voltage TR1
positive
-
+10
V
negative
-
−5
V
input voltage TR2
positive
-
+5
V
negative
-
−10
V
PIMC31_1
Product data sheet
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Rev. 01 — 24 March 2009
2 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
Table 5.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
IO
output current
Min
Max
Unit
-
500
mA
-
290
mW
-
420
mW
total power dissipation
Tamb ≤ 25 °C
[1]
Ptot
total power dissipation
Tamb ≤ 25 °C
[1]
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
−55
+150
°C
Tstg
storage temperature
−65
+150
°C
Ptot
Per device
[1]
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
006aab531
500
Ptot
(mW)
400
300
200
100
0
−75
−25
25
75
125
175
Tamb (°C)
FR4 PCB, standard footprint
Fig 1.
Power derating curve
6. Thermal characteristics
Table 6.
Symbol
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
-
-
431
K/W
-
-
105
K/W
-
-
298
K/W
Per transistor
Rth(j-a)
thermal resistance from
junction to ambient
Rth(j-sp)
thermal resistance from
junction to solder point
in free air
[1]
Per device
Rth(j-a)
[1]
thermal resistance from
junction to ambient
in free air
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
PIMC31_1
Product data sheet
[1]
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 24 March 2009
3 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
006aaa494
103
Zth(j-a)
(K/W)
δ=1
0.75
0.50
0.33
102
0.20
0.10
0.05
10
0.02
0.01
0
1
10−5
10−4
10−3
10−2
10−1
1
102
10
103
tp (s)
FR4 PCB, standard footprint
Fig 2.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
7. Characteristics
Table 7.
Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor; for the PNP transistor with negative polarity
ICBO
collector-base cut-off
current
VCB = 50 V; IE = 0 A
-
-
100
nA
ICEO
collector-emitter
cut-off current
VCE = 50 V; IB = 0 A
-
-
0.5
µA
IEBO
emitter-base cut-off
current
VEB = 5 V; IC = 0 A
-
-
0.72
mA
hFE
DC current gain
VCE = 5 V; IC = 50 mA
70
-
-
VCEsat
collector-emitter
saturation voltage
IC = 50 mA; IB = 2.5 mA
-
-
0.3
VI(off)
off-state input voltage
VCE = 5 V; IC = 100 µA
0.3
0.6
1
V
VI(on)
on-state input voltage
VCE = 0.3 V; IC = 20 mA
0.4
0.8
1.4
V
R1
bias resistor 1 (input)
0.7
1
1.3
kΩ
R2/R1
bias resistor ratio
9
10
11
Cc
collector capacitance
TR1 (NPN)
-
7
-
pF
TR2 (PNP)
-
11
-
pF
VCB = 10 V; IE = ie = 0 A;
f = 1 MHz
PIMC31_1
Product data sheet
V
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 24 March 2009
4 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
006aaa314
103
(1)
(1)
(2)
(3)
hFE
006aaa315
10−1
(2)
(3)
VCEsat
(V)
102
10
1
10−1
1
10
102
10−2
103
10
1
VCE = 5 V
IC/IB = 20
(1) Tamb = 100 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
Fig 3.
102
103
IC (mA)
IC (mA)
TR1 (NPN): DC current gain as a function of
collector current; typical values
Fig 4.
TR1 (NPN): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aab055
1
VCEsat
(V)
(1)
(2)
(3)
10−1
10−2
1
10
102
103
IC (mA)
IC/IB = 50
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
Fig 5.
TR1 (NPN): Collector-emitter saturation voltage as a function of collector current; typical values
PIMC31_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 24 March 2009
5 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
006aaa316
10
006aaa317
1
(1)
(2)
VI(off)
(V)
VI(on)
(V)
1
(3)
(1)
(2)
(3)
10−1
10−1
1
10
102
103
10−1
10−1
VCE = 0.3 V
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
TR1 (NPN): On-state input voltage as a
function of collector current; typical values
Fig 7.
TR1 (NPN): Off-state input voltage as a
function of collector current; typical values
PIMC31_1
Product data sheet
10
VCE = 5 V
(1) Tamb = −40 °C
Fig 6.
1
IC (mA)
IC (mA)
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 24 March 2009
6 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
006aaa349
103
006aaa350
−10−1
(1)
hFE
(1)
(2)
(2)
(3)
VCEsat
(V)
(3)
102
10
1
−10−1
−1
−10
−102
−10−2
−103
−1
−10
VCE = −5 V
IC/IB = 20
(1) Tamb = 100 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
Fig 8.
−103
−102
IC (mA)
IC (mA)
TR2 (PNP): DC current gain as a function of
collector current; typical values
Fig 9.
TR2 (PNP): Collector-emitter saturation
voltage as a function of collector current;
typical values
006aab428
−1
VCEsat
(V)
(1)
(2)
(3)
−10−1
−10−2
−1
−10
−103
−102
IC (mA)
IC/IB = 50
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
Fig 10. TR2 (PNP): Collector-emitter saturation voltage as a function of collector current; typical values
PIMC31_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 24 March 2009
7 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
006aaa351
−10
006aaa352
−10
VI(off)
(V)
VI(on)
(V)
(1)
(1)
(2)
−1
−10−1
−10−1
−1
(2)
−1
(3)
−10
−102
−103
(3)
−10−1
−10−1
IC (mA)
−10
IC (mA)
VCE = −0.3 V
VCE = −5 V
(1) Tamb = −40 °C
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(3) Tamb = 100 °C
Fig 11. TR2 (PNP): On-state input voltage as a
function of collector current; typical values
Fig 12. TR2 (PNP): Off-state input voltage as a
function of collector current; typical values
PIMC31_1
Product data sheet
−1
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 24 March 2009
8 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
8. Test information
8.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
9. Package outline
3.1
2.7
6
3.0
2.5
1.7
1.3
1.1
0.9
5
4
2
3
0.6
0.2
pin 1 index
1
0.40
0.25
0.95
0.26
0.10
1.9
Dimensions in mm
04-11-08
Fig 13. Package outline SOT457 (SC-74)
10. Packing information
Table 8.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number
PIMC31
Package
SOT457
Description
3000
10000
4 mm pitch, 8 mm tape and reel; T1
[2]
-115
-135
4 mm pitch, 8 mm tape and reel; T2
[3]
-125
-165
[1]
For further information and the availability of packing methods, see Section 14.
[2]
T1: normal taping
[3]
T2: reverse taping
PIMC31_1
Product data sheet
Packing quantity
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 24 March 2009
9 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
11. Soldering
3.45
1.95
0.45 0.55
(6×) (6×)
0.95
solder lands
solder resist
3.3 2.825
0.95
solder paste
occupied area
0.7
(6×)
Dimensions in mm
0.8
(6×)
2.4
sot457_fr
Fig 14. Reflow soldering footprint SOT457 (SC-74)
5.3
1.5
(4×)
solder lands
1.475
0.45
(2×)
5.05
solder resist
occupied area
1.475
Dimensions in mm
preferred transport
direction during soldering
1.45
(6×)
2.85
sot457_fw
Fig 15. Wave soldering footprint SOT457 (SC-74)
PIMC31_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 24 March 2009
10 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
12. Revision history
Table 9.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PIMC31_1
20090324
Product data sheet
-
-
PIMC31_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 24 March 2009
11 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
13. Legal information
13.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
13.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
14. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PIMC31_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 24 March 2009
12 of 13
PIMC31
NXP Semiconductors
500 mA, 50 V NPN/PNP double RET; R1 = 1 kΩ, R2 = 10 kΩ
15. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
8.1
9
10
11
12
13
13.1
13.2
13.3
13.4
14
15
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 3
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9
Quality information . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Packing information. . . . . . . . . . . . . . . . . . . . . . 9
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11
Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Contact information. . . . . . . . . . . . . . . . . . . . . 12
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 24 March 2009
Document identifier: PIMC31_1
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