A8510 Datasheet

A8510
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
Description
Features and Benefits
• Integrated 2 MHz capable boost converter with 60 V DMOS
switch with OVP protection
• Sync function to synchronize boost converter switching
frequencies up to 2.3 MHz
• LED current up to 40 mA per LED channel into 8 channels
• Drives up to 12 series LEDs in 8 parallel strings
(Vf = 3.5 V, If = 40 mA), VIN = 8 V, switching frequency
of 1 MHz
• Single EN/PWM pin interface for PWM dimming and
enable functions
• APWM pin for fine-tuning color adjustment and/or
maximizing contrast ratio
• Integrated driver for optional external PMOS input
disconnect switch
• Typical LED accuracy of 0.7% and 0.8% for
LED-to-LED matching
• Internal bias supply for single-supply operation
from 5 to 40 V
• Extensive protection features
The A8510 is a multi-output white LED driver for LCD
backlighting. It integrates a current-mode boost converter with
internal power switch and 8 current sinks. The boost converter
can drive up to 96 LEDs with 12 LEDs at 40 mA per string.
The LED sinks can also be paralleled together to achieve even
higher LED currents, up to 320 mA. The A8510 can operate
from a single power supply, from 5 to 40 V.
If required, the A8510 can drive an external P-FET to
disconnect the input supply from the system in the event of a
fault. The A8510 provides protection against output short and
overvoltage, open or shorted diode, open or shorted LED pin,
and overtemperature. A dual level cycle-by-cycle current limit
function provides soft start and protects the internal current
switch against high current overloads.
The A8510 has a synchronization pin that allows PWM
switching frequencies to be synchronized in the range of
580 kHz to 2.3 MHz.
The device package is a 26-contact, 4 mm × 4 mm, 0.75 mm
nominal overall height QFN, with exposed pad for enhanced
thermal dissipation. It is lead (Pb) free, with 100% matte tin
leadframe plating.
Package: 26-pin QFN (suffix EC)
Applications
• Industrial LCD displays
• Backlighting LCD displays
• Infotainment displays
Approximate scale 1:1
Typical Application Diagram
RSC
0.056 Ω
VIN
RADJ
590 Ω
CIN
4.7 μF/ 50 V
VGATE
VSENSE
VIN
VDD
VC
CVDD
0.1 μF
100 kΩ
L1
22 μH
Q1
D1
2 A / 60 V
SW SW
A8510
PAD
FAULT
EN/PWM
APWM
ISET
RISET
8.25 kΩ
RFSET
25.5 kΩ
FSET/SYNC
Figure 1. Typical Application Circuit showing VIN to GND
short protection using P-MOSFET sensing
A8510-DS, Rev. 2
AGND
VOUT
ROVP
169 kΩ
OVP
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
COMP
PGND PGND
CP
120 pF
COUT
4.7 μF
50 V
RZ
120 Ω
CZ
0.47 μF
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Selection Guide
Part Number
A8510GECTR-T
Packing
7000 pieces per 13-in. reel
Absolute Maximum Ratings*
Characteristic
Symbol
Notes
LEDx Pin
OVP Pin
Rating
Unit
–0.3 to 55
V
–0.3 to 60
V
VSENSE and VGATE should not exceed VIN by
more than 0.4 V.
–0.3 to 40
V
Continuous
–0.6 to 62
V
–1.0
V
¯ĀŪ¯L̄¯T̄
¯ Pin
F̄
–0.3 to 40
V
ISET, FSET/SYNC, APWM, and
COMP Pins
–0.3 to 5.5
V
–0.3 to 7
V
VIN, VSENSE, VGATE Pins
SW Pin
t < 50 ns
All other pins
Operating Ambient Temperature
TA
–40 to 105
ºC
Maximum Junction Temperature
TJ(max)
150
ºC
Tstg
–55 to 150
ºC
Storage Temperature
Range G
*Stresses beyond those listed in this table may cause permanent damage to the device. The Absolute Maximum ratings are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical
Characteristics table is not implied. Exposure to Absolute-Maximum-rated conditions for extended periods may affect device reliability.
Thermal Characteristics may require derating at maximum conditions
Characteristic
Package Thermal Resistance
Symbol
RθJA
Test Conditions*
On 2-layer, 3 in. × 3 in. PCB
Value
Unit
48.5
ºC/W
*Additional thermal information available on the Allegro website
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Functional Block Diagram
VDD
SW
SW
Internal VCC
Regulator
UVLO
VIN
VREF
1.235 V
Ref
Internal VCC
AGND
+
∑
FSET/SYNC
–
Oscillator
Diode
Open
+ Sense
Driver
Circuit
COMP
–
+
Current
Sense
ISS
–
Internal
Soft Start
+
PGND
–
VSENSE
Thermal
Shutdown
Input Current
Sense Amplifier
IADJ
Fault
+
PMOS
Driver
EN/PWM
OVP
Sense
GOFF
–
VGATE
OVP
VREF
Open/Short
LED Detect
Enable
PWM
100 kΩ
ISS
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
LED
Driver
APWM
Internal VCC
ISET
VREF
ISET
AGND
FAULT
PGND
PGND
AGND
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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3
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
22 OVP
23 SW
24 SW
25 VGATE
26 VSENSE
Pin-out Diagram
VIN
1
21 PGND
FAULT
2
20 PGND
NC
3
COMP
4
APWM
5
17 LED2
EN/PWM
6
16 LED3
FSET/SYNC
7
15 LED4
19 VDD
LED5 14
LED6 13
18 LED1
LED7 12
LED8 11
AGND 10
9
NC
ISET 8
PAD
Terminal List Table
Number
Name
1
VIN
Function
2
¯ĀŪ¯L̄¯T̄
¯
F̄
3, 9
NC
4
COMP
Output of the error amplifier and compensation node; connect a series RZCZ network from this pin to
GND for control loop compensation.
5
APWM
Analog trimming option or dimming; applying a digital PWM signal to this pin adjusts the internal ISET
current.
6
EN/PWM
PWM dimming pin used to control the LED intensity by using pulse width modulation, with the typical
PWM dimming frequency is in the range of 200 Hz to 1 kHz; also used to enable the A8510.
7
FSET/SYNC
8
ISET
10 to
18
LED8 to
LED1
Input power to the A8510 as well as the positive input used for the current sense resistor.
This pin is used to indicate a fault condition, it is an open drain type configuration that will be pulled
low when a fault occurs; connect a 100 kΩ resistor between this pin and the required logic level
voltage.
No connect.
Frequency/synchronization pin; connect a resistor RFSET from this pin to GND to set the switching
frequency. This pin can also be used to synchronize two or more converters in the system; the
maximum synchronization frequency is 2.3 MHz.
Connect the RISET resistor between this pin and GND to set the LED 100% current level.
Connect the cathode of each LED string to these pins.
19
VDD
20, 21
PGND
Output of internal LDO; connect a 0.1 μF decoupling capacitor between this pin and GND.
22
OVP
This pin is used to sense an overvoltage condition; connect the ROVP resistor from VOUT to this pin to
adjust the Overvoltage Protection (OVP) function.
23, 24
SW
The drain of the internal NMOS switch of the boost converter.
25
VGATE
Power ground for internal NMOS device.
Gate driver pin for external P-MOSFET disconnect switch.
26
VSENSE
Connect this pin to the negative sense side of the current sense resistor RSC; the threshold voltage
is measured as VIN – VSENSE.
–
PAD
Exposed pad of the package providing enhanced thermal dissipation; this pad must be connected to
the ground plane(s) of the PCB with at least 8 thermal vias, directly in the pad.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
ELECTRICAL CHARACTERISTICS1 Valid at VIN = 16 V, TA = 25°C,
indicates specifications guaranteed by design and
characterization over the full operating temperature range with TA = TJ = –40°C to 105°C; unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.2
Max.
Unit
5
–
40
V
Input Voltage Specifications
Operating Input Voltage Range3
VIN
UVLO Start Threshold
VUVLOrise
VIN rising
−
–
4.35
V
UVLO Stop Threshold
VUVLOfall
VIN falling
−
–
3.90
V
UVLO Hysteresis4
VUVLOhys
–
450
–
mV
EN/PWM = VIH ; SW = 2 MHz, no load
−
5.5
−
mA
VIN = 16 V, EN/PWM = SYNC = 0 V
−
2
10.0
μA
VIL
VIN throughout operating input voltage range
–
–
400
mV
Input Logic Level-High
VIH
VIN throughout operating input voltage range
1.5
–
–
V
EN/PWM Pin Pin Pull-Down Resistor
REN
EN/PWM = 5 V
–
100
–
kΩ
APWM = VIH
–
100
–
kΩ
fAPWM
20
−
1000
kHz
AVOL
−
48
−
dB
Input Currents
Input Quiescent Current
Input Sleep Supply Current
IQ
IQSLEEP
Input Logic Levels (EN/PWM, APWM)
Input Logic Level-Low
APWM Pin Pull-Down Resistor
RAPWM
APWM
APWM Frequency
Error Amplifier
Open Loop Voltage Gain
ΔICOMP = ±10 μA
−
990
−
μA/V
Source Current
IEA(SRC)
VCOMP = 1.5 V
−
–350
−
μA
Sink Current
IEA(SINK)
VCOMP = 1.5 V
−
350
−
μA
COMP Pin Pull-Down Resistor
RCOMP
−
2000
−
Ω
Transconductance
gm
Overvoltage Protection
Overvoltage Threshold
OVP Sense Current
VOVP(th)
OVP connected to VOUT
7.7
8.1
8.5
V
188
199
210
μA
−
0.1
1
μA
−
55
−
V
ISW = 0.750 A, VIN = 16 V
−
300
−
mΩ
VSW = 16 V, EN/PWM = VIL
−
0.1
1
μA
3.0
3.5
4.2
A
IOVPH
OVP Leakage Current
IOVPLKG
Secondary Overvoltage Protection
VOVP(sec)
ROVP = 40.2 kΩ, VIN = 16 V, EN/PWM = VIL
Boost Switch
Switch On-Resistance
RSW
Switch Leakage Current
ISWLKG
Switch Current Limit
ISW(LIM)
Secondary Switch Current Limit4
ISW(LIM2)
Higher than ISW(LIM)(max) for all conditions,
device latches when detected
−
7.0
−
A
Soft Start Boost Current Limit
ISWSS(LIM)
Initial soft start current for boost switch
−
700
−
mA
Minimum Switch On-Time
tSWONTIME
−
85
−
ns
Minimum Switch Off-Time
tSWOFFTIME
−
47
−
ns
Continued on the next page…
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
ELECTRICAL CHARACTERISTICS1 (continued) Valid at VIN = 16 V, TA = 25°C,
indicates specifications guaranteed by design
and characterization over the full operating temperature range with TA = TJ = –40°C to 105°C; unless otherwise noted
Min.
Typ.2
Max.
Unit
RFSET = 10 kΩ
1.8
2
2.2
MHz
fSW
RFSET = 20 kΩ
−
1
−
MHz
RFSET = 35.6 kΩ
−
580
−
kHz
FSET/SYNC Pin Voltage
VFSET
RFSET = 10 kΩ
−
1.00
−
V
FSET Frequency Range
fFSET
580
−
2500
kHz
Characteristics
Symbol
Test Conditions
Oscillator Frequency
Oscillator Frequency
Synchronization
Synchronized PWM Frequency
fSWSYNC
580
−
2300
kHz
Synchronization Input
Minimum Off-Time
tPWSYNCOFF
150
−
−
ns
Synchronization Input
Minimum On-Time
tPWSYNCON
150
−
−
ns
SYNC Input Logic Voltage
VSYNC(H)
FSET/SYNC pin, high level
−
−
0.4
V
VSYNC(L)
FSET/SYNC pin, low level
2.0
−
−
V
LED Current Sinks
LEDx Accuracy
ErrLED
ISET = 120 μA
−
−
3
%
LEDx Matching
ΔLEDx
ISET = 120 μA
−
−
3
%
−
680
−
mV
LEDx Regulation Voltage
VLED
VLED1 through VLED8 all equal, ISET = 120 μA
ISET to ILEDx Current Gain
AISET
ISET = 120 μA
317
327
337
A/A
ISET Pin Voltage
VISET
−
1.003
−
V
Allowable ISET Current
ISET
40
−
120
μA
4.6
−
−
V
VLED Short Detect
VLEDSC
While LED sinks are in regulation, sensed
from LEDx pin to GND
Soft Start LEDx Current
ILEDSS
Current through each enabled LEDx pin
during soft start, ISET = 120 μA
−
1.06
−
mA
Maximum PWM Dimming
Until Off-Time3
tPWML
Measured while EN/PWM = low, during
dimming control and internal references
are powered-on (exceeding tPWML results in
shutdown)
−
32750
−
fSW
cycles
Minimum EN/PWM On-Time
tPWMH
First cycle when powering-up device
−
0.75
2
μs
EN/PWM High to LED-On Delay
tdPWM(on)
Time between EN/PWM enable and LEDx
current reaching 90% of maximum
−
0.5
1
μs
EN/PWM Low to LED-Off Delay
tdPWM(off)
Time between EN/PWM enable going low
and LEDx current reaching 10% of maximum
−
−
500
ns
VGS = VIN
−
−104
−
μA
−
−
3
μs
−
–6.7
−
V
VGATE Pin
VGATE Pin Sink Current
IGSINK
VGATE Pin Fault Shutdown
tGFAULT
VGATE Pin Voltage
VGS
Gate to source voltage measured when gate
is on
Continued on the next page…
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
ELECTRICAL CHARACTERISTICS1 (continued) Valid at VIN = 16 V, TA = 25°C,
indicates specifications guaranteed by design
and characterization over the full operating temperature range with TA = TJ = –40°C to 105°C; unless otherwise noted
Characteristics
Min.
Typ.2
Max.
Unit
18.8
20.3
21.8
μA
Measured between VIN and VSENSE,
RADJ = 0 Ω
−
180
−
mV
IFAULT = 1 mA (400 Ω)
−
−
0.5
V
VFAULT = 5 V
−
−
1
μA
−
165
−
ºC
−
20
−
ºC
Symbol
Test Conditions
VSENSE Pin
VSENSE Pin Sink Current
VSENSE Trip Point
IADJ
VSENSEtrip
¯Ā¯Ū¯L̄
¯T̄
¯ Pin
F̄
¯ĀŪ¯L̄¯T̄
¯ Pin Pull-Down Voltage
F̄
¯ĀŪ¯L̄¯T̄
¯ Pin Leakage Current
F̄
VFAULT
IFAULTLKG
Thermal Protection (TSD)
Thermal Shutdown Threshold4
TSD
Thermal Shutdown Hysteresis4
TSDHYS
Temperature rising
1For
input and output current specifications, negative current is defined as coming out of the node or pin (sourcing); positive current is defined as
going into the node or pin (sinking).
2Typical specifications are at T = 25ºC.
A
3Minimum V = 5 V is only required at startup. After startup is completed, the IC is able to function down to V = 4 V.
IN
IN
4Ensured by design and characterization, not production tested.
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Typical Characteristic Performance
VIN Input Sleep Mode Current
versus Ambient Temperature
VIN UVLO Rising Threshold Voltage
versus Ambient Temperature
VUVLOrise (V)
IQSLEEP (μA)
5
4
3
2
1
0
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
4.40
4.35
4.30
4.25
4.20
4.15
4.10
4.05
4.00
-50 -40 -30 -20 -10 0
Temperature (°C)
Temperature (°C)
VIN UVLO Falling Threshold Voltage
versus Ambient Temperature
VUVLOfall (V)
fSW (MHz)
Switching Frequency
versus Ambient Temperature
2.20
2.15
2.10
2.05
2.00
1.95
1.90
1.85
1.80
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
3.70
3.69
3.68
3.67
3.66
3.65
3.64
3.63
3.62
3.61
3.60
-50 -40 -30 -20 -10 0
Temperature (°C)
OVP Pin Overvoltage Threshold
versus Ambient Temperature
8.4
8.3
VOVP(th) (V)
IOVPH (μA)
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
OVP Pin Sense Current
versus Ambient Temperature
210
208
206
204
202
200
198
196
194
192
190
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
8.2
8.1
8.0
7.9
7.8
7.7
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
7.6
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Input Disconnect Switch Gate to Source Voltage
330
329
328
327
326
325
324
323
322
321
320
-50 -40 -30 -20 -10 0
versus Ambient Temperature
-6.3
-6.4
VGS (V)
AISET
ISET to LED Current Gain
versus Ambient Temperature
-6.5
-6.6
-6.7
-6.8
-6.9
10 20 30 40 50 60 70 80 90 100 110
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
Temperature (°C)
LEDx Current versus Ambient Temperature
ISET = 120 μA
VSENSE Pin Sink Current
versus Ambient Temperature
LED Current, ILEDx (mA)
20.8
20.7
IADJ (μA)
20.6
20.5
20.4
20.3
20.2
20.1
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
LED to LED Matching Accuracy
versus Ambient Temperature
LED Set Point Accuracy
versus Ambient Temperature
LEDx Accuracy, ErrLED (%)
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
10.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50 -40 -30 -20 -10 0
Temperature (°C)
Efficiency, η (%)
88
fSW
800 kHz
1 MHz
84
7
9
11
13
15
17
Input Voltage, VIN (V)
90
85
fSW
800 kHz
1 MHz
75
92
80
Efficiency for 12 Series LEDs per Channel
ILED = 40 mA, LED Vf ≈ 3.2 V
95
90
86
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
Efficiency for 10 Series LEDs per Channel
ILED = 40 mA, LED Vf ≈ 3.2 V
92
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
10.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
Efficiency, η (%)
ΔLEDx (%)
20.0
40.0
39.8
39.6
39.4
39.2
39.0
38.8
38.6
38.4
38.2
38.0
-50 -40 -30 -20 -10 0
19
21
70
7
9
11
13
15
17
19
21
Input Voltage, VIN (V)
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Functional Description
The A8510 incorporates a current-mode boost controller with
internal DMOS switch, and eight LED current sinks. It can be
used to drive eight LED strings of up to 12 white LEDs in series,
with current up to 40 mA per string. For optimal efficiency,
the output of the boost stage is adaptively adjusted to the minimum voltage required to power all of the LED strings. This is
expressed by the following equation:
VOUT = max ( VLED1 ,..., VLED8 ) + VREG
(1)
where
VLEDx is the voltage drop across LED strings 1 through 8, and
VREG is the regulation voltage of the LED current sinks (typically 0.68 V at the maximum LED current).
Enabling the IC
The IC turns on when a logic high signal is applied on the
EN/PWM pin with a minimum duration of tPWMH for the first
clock cycle, and the input voltage present on the VIN pin is
greater than the 4.35 V necessary to clear the UVLO (VUVLOrise )
threshold. The power-up sequence is shown in figure 2. Before
the LEDs are enabled, the A8510 driver goes through a system
check to determine if there are any possible fault conditions that
might prevent the system from functioning correctly. Also, if the
FSET/SYNC pin is pulled low, the IC will not power-up. More
information on the FSET/SYNC pin can be found below, in the
Synchronization section of this document.
Powering up: LED pin short-to-GND check
The VIN pin has a UVLO function that prevents the A8510 from
powering-up until the UVLO threshold is reached. After the VIN
pin goes above UVLO, and a high signal is present on the EN/
PWM pin, the IC proceeds to power-up. As shown in figure 3, at
this point the A8510 enables the disconnect switch and checks if
any LED pins are shorted to GND and/or are not used. The LED
detect phase starts when the VGATE voltage of the disconnect
switch is equal to VIN – 4.5 V.
After the voltage threshold on the LEDx pins exceeds 120 mV, a
timer of 3000 to 4000 clock cycles is used to determine the status
of the pins. Thus, the LED detection duration varies with the
switching frequency, as shown in the following table:
Switching Frequency
(kHz)
Detection Time
(ms)
2000
1.5 to 2
1000
3 to 4
800
3.75 to 5
600
5 to 6.7
The LED pin detection voltage thresholds are as follows:
LED Pin Voltage
LED Pin Status
Action
<70 mV
Short-to-GND
Power-up is halted
150 mV
Not used
LED removed from operation
>325 mV
LED pin in use
None
VGATE = VIN – 4.5 V
VDD
VGATE
C1
FSET/SYNC
C1
LEDx
LED detection period
C2
C2
ISET
C3
ISET
EN/PWM
C3
C4
C4
EN/PWM
t
Figure 2. Power-up diagram at fSW = 2 MHz; shows VDD (ch1, 2 V/div.),
FSET/SYNC (ch2, 1 V/div.), ISET (ch3, 1 V/div.), and EN/PWM (ch4, 2 V/
div.) pins, t = 200 μs/div.
t
Figure 3. Power-up diagram; shows the relationship of an LEDx pin with
respect to the gate voltage of the disconnect switch (if used) during the
LED detect phase, as well as the duration of the LED detect phase for a
switching frequency of 800 kHz; shows VGATE (ch1, 5 V/div.), LEDx (ch2,
500 mV/div.), ISET (ch3, 1 V/div.), and EN/PWM (ch4, 5 V/div.) pins,
t = 1 ms/div.
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10
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
All unused pins should be connected with a 4.75 kΩ resistor to
GND, as shown in figure 5. The unused pin, with the pull-down
resistor, will be taken out of regulation at this point and will not
contribute to the boost regulation loop.
A8510
A8510
If an LEDx pin is shorted to ground the A8510 will not proceed
with soft start until the short is removed from the LEDx pin. This
prevents the A8510 from powering-up and putting an uncontrolled amount of current through the LEDs. The various detect
scenarios are presented in figures 4A and 4B.
LED1
LED1
LED2
LED2
LED3
LED3
LED4
LED4
LED5
LED5
LED6
LED6
LED7
GND
LED7
LED8
GND
LED8
4.75 kΩ
Figure 5. Channel select setup: (left) channel LED8 not used,
(right) using all channels.
LED1-7
LED detection period
C1
C2
LED8
C3
ISET
EN/PWM
C4
t
4A. Example with LED8 pin not being used; fSW is 2 MHz, the detect voltage
is about 150 mV; shows LED1-7 (ch1, 500 mV/div.), LED8 (ch2, 500 mV/div.),
ISET (ch3, 1 V/div.), and EN/PWM (ch4, 5 V/div.) pins, t = 500 μs/div.
Short removed
Pin shorted
LED1
C1
LED2
C2
ISET
C3
C4
EN/PWM
t
4B. Example with one LED shorted to GND. The IC will not proceed with powerup until the shorted LED pin is released, at which point the LED is checked to
see if it is being used; shows LED1 (ch1, 500 mV/div.), LED2 (ch2, 500 mV/div.),
ISET (ch3, 1 V/div.), and EN/PWM (ch4, 5 V/div.) pins, t = 1 ms/div.
.
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11
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Inrush current caused by
enabling the disconnect
switch (when used)
Soft start function
During soft start the LEDx pins are set to sink (ILEDSS) and the
boost switch current is reduced to the ISWSS(LIM) level to limit
the inrush current generated by charging the output capacitors.
When the converter senses that there is enough voltage on the
LEDx pins, the converter proceeds to increase the LED current
to the preset regulation current and the boost switch current limit
is switched to the ISW(LIM) level to allow the A8510 to deliver the
necessary output power to the LEDs. This is shown in figure 7.
Frequency selection
The switching frequency on the boost regulator is set by the
resistor connected to the FSET/SYNC pin, and the switching
frequency can be can be anywhere from 580 kHz to 2.3 MHz.
Figure 6 shows the typical switching frequencies for given resistor values.
If during operation a fault occurs that will increase the switching frequency, the FSET/SYNC pin is clamped to a maximum
switching frequency of no more than 3.5 MHz.
Synchronization
The A8510 can also be synchronized using an external clock on
the FSET/SYNC pin. Figure 8 shows the correspondence of a
SYNC signal and the SW pin, and figure 9 shows the result when
a SYNC signal is detected: the LED current does not show any
variation while the frequency synchronization occurs. At powerup if the FSET/SYNC pin is held low, the IC will not power-up.
Only when the FSET/SYNC pin is tri-stated to allow for the pin
to rise, to about 1 V, or when a sync clock is detected, will the
A8510 try to power-up.
Normal operation
ISW(lim)
C1
IOUT
IIN
Operation during
ISWSS(lim)
C2
VOUT
C3
C4
EN/PWM
t
Figure 7. Startup diagram showing the input current, output voltage, and
output current, fSW = 800 kHz; shows IOUT (ch1, 500 mA/div.), IIN (ch2, 1 A/
div.), VOUT (ch3, 20 V/div.), and EN/PWM (ch4, 5 V/div.), t = 1 ms/div.
VOUT
C1
ILED
C2
C3
FSET/SYNC
SW node
C4
t
Figure 8. Diagram showing a synchronized FSET/SYNC pin and switch
node; shows VOUT (ch1, 20 V/div.), ILED (ch2, 200 mA/div.), FSET/SYNC
(ch3, 2 V/div.), and SW node (ch4, 20 V/div.), t = 2 μs/div.
fSW (MHz)
VOUT
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
IOUT
C1
FSET/SYNC
C2
C3
800 kHz operation
10.0
12.5
15.0
17.5
20.0
22.5
25.0
30.0
32.5
SW node
1.5 MHz operation
35.0
Resistance for RSET (kΩ)
C4
t
Figure 6. Typical Switching Frequency versus value of RFSET resistor.
Figure 9. Transition of the SW waveform when the SYNC pulse is
detected. The A8510 switching at 800 kHz, applied SYNC pulse at
1.5 MHz; shows VOUT (ch1, 20 V/div.), IOUT (ch2, 500 mA/div.), FSET/
SYNC (ch3, 2 V/div.), and SW node (ch4, 20 V/div.), t = 2 μs/div.
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12
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
The basic requirement of the SYNC signal is 150 ns minimum
on-time and 150 ns minimum off time, as indicated by the specifications for tPWSYNCON and tPWSYNCOFF . Figure 10 shows the
timing for a synchronization clock into the A8510 at 800 kHz.
Thus any pulse with a duty cycle of 12% to 88% at 800 kHz can
be used to synchronize the IC.
LED current setting and LED dimming
The maximum LED current can be up to 40 mA per channel, and
is set through the ISET pin. To set the ILED current, connect a
resistor, RISET, between this pin and GND, according to the following formula:
(2)
RISET = (1.003 × 327) / ILED
The SYNC pulse duty cycle ranges for selected switching frequencies are:
where ILED is in mA and RISET is in Ω. This sets the maximum
current through the LEDs, referred to as the 100% current. Standard RISET values, at gain equals 327, are as follows:
SYNC Pulse Frequency
(kHz)
Duty Cycle Range
(%)
2200
33 to 66
2000
30 to 70
1000
15 to 85
10.5
30
800
12 to 88
13.0
25
600
9 to 91
16.2
20
If during operation a SYNC clock is lost, the IC will revert to the
preset switching frequency that is set by the resistor RFSET. During this period the IC will stop switching for a maximum period
of about 7 μs to allow the sync detection circuitry to switch over
to the externally preset switching frequency.
If the clock is held low for more than 7 μs, the A8510 will shut
down. In this shutdown mode the IC will stop switching, the
input disconnect switch is open, and the LEDs will stop sinking
current. To shutdown the IC into low power mode, the IC must be
disabled by keeping the EN/PWM pin low for a period of 32750
clock cycles. If the FSET/SYNC pin is released at any time after
7 μs, the A8510 will proceed to soft start.
t PWSYNCON
LED current per LED, ILED
(mA)
8.25
40
PWM dimming
The LED current can be reduced from the 100% current level
by PWM dimming using the EN/PWM pin. When the EN/PWM
pin is pulled high, the A8510 turns on and all enabled LEDs sink
100% current. When EN/PWM is pulled low, the boost converter
and LED sinks are turned off. The compensation (COMP) pin is
floated, and critical internal circuits are kept active. The typical
PWM dimming frequencies fall between 200 Hz and 1 kHz. Figures 12A to 12D provide examples of PWM switching behavior.
Another important feature of the A8510 is the PWM signal to
LED current delay. This delay is typically less than 500 ns, which
allows greater accuracy at low PWM dimming duty cycles, as
shown in figure 11.
10
950 ns
8
ErrLED (%)
150 ns
Standard Resistor Value
Closest to RISET
(kΩ)
Worst-case
6
Typical
4
2
150 ns
T = 1.25 μs
t PWSYNCOFF
Figure 10. SYNC pulse on and off time requirements, for an
800-kHz clock.
0
0.1
1
10
100
PWM Duty Cycle, D (%)
Figure 11. Percentage Error of the LED current versus PWM duty cycle
(at 200 Hz PWM frequency), for 500 ns delay.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
VOUT
VOUT
ILED
C2
C2
C1
C1
C3
C4
ILED
C3
COMP
COMP
C4
EN/PWM
EN/PWM
t
t
Figure 12A. Typical PWM diagram showing VOUT, ILED, and COMP pin as
well as the PWM signal. PWM dimming frequency is 200 Hz at 50% duty
cycle; shows VOUT (ch1, 10 V/div.), ILED (ch2, 50 mA/div.), COMP (ch3,
2 V/div.), EN/PWM (ch4, 5 V/div.), t = 1 ms/div.
Figure 12B. Typical PWM diagram showing VOUT, ILED, and COMP pin as
well as the PWM signal. PWM dimming frequency is 200 Hz at 1% duty
cycle ; shows VOUT (ch1, 10 V/div.), ILED (ch2, 50 mA/div.), COMP (ch3,
2 V/div.), EN/PWM (ch4, 5 V/div.), t = 2 ms/div.
EN/PWM
EN/PWM
C1
C1
ILED
ILED
C2
C2
t
Figure 12C. Delay from rising edge of PWM signal to LED current; shows
EN/PWM (ch1, 2 V/div.), and ILED (ch2, 20 mA/div.), t = 200 ns/div.
t
Figure 12D. Delay from falling edge of PWM signal to LED current turn off;
shows EN/PWM (ch1, 2 V/div.), and ILED (ch2, 50 mA/div.), t = 200 ns/div.
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14
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
APWM pin
The APWM pin is used in conjunction with the ISET pin. This is
a digital signal pin that internally adjusts the ISET current. The
typical input signal frequency is between 20 kHz and 1 MHz. The
duty cycle of this signal is inversely proportional to the percentage of current that is delivered to the LEDs (figure 14). As an
example, a system that delivers a full LED current of 40 mA per
LED would deliver 20 mA of current per LED when an APWM
signal is applied with a duty cycle of 50%. When this pin is not
used it should be tied to GND.
APWM
A8510
ISET
APWM ISET
Current
Adjust
ISET
Current
Mirror
RISET
EN/PWM
LED
Driver
Figure 13. Simplified block diagram of the APWM ISET block.
To use this pin for a trim function, the user should set the maximum output current to a value higher than the required current by
at least 5%. The LED ISET current is then trimmed down to the
25
20
5V
ErrLED (%)
40
ILED (mA)
30
15
1.5 V 200 kHz
1.5 V 50 kHz
10
20
5V
50 kHz
5
10
0
200 kHz
0
20
40
60
80
0
100
PWM Duty Cycle, D (%)
Figure 14. LED current versus PWM duty cycle; 200 kHz APWM frequency.
20
40
60
80
100
PWM Duty Cycle, D (%)
Figure 15. Percentage Error of the LED current versus APWM signals.
EN/PWM
EN/PWM
C1
0
C1
APWM
APWM
C2
C2
ILED
C3
ILED
C3
t
Figure 16. Diagram showing the transition of LED current from 40 mA
to 20 mA, when a 50% duty cycle signal is applied to the APWM pin;
EN/PWM = 1; shows EN/PWM (ch1, 5 V/div.), APWM (ch2, 5 V/div.), and
ILED (ch3, 20 mA/div.), t = 1 ms/div.
t
Figure 17. Diagram showing the transition of LED current from 20 mA
to 40 mA, when a 50% duty cycle signal is removed from the APWM pin.
EN/PWM = 1; shows EN/PWM (ch1, 5 V/div.), APWM (ch2, 5 V/div.), and
ILED (ch3, 20 mA/div.), t = 1 ms/div.
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15
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
appropriate value. In cases where the user-supplied APWM has
significant duty cycle limitations, it might be preferable to set the
maximum ISET current to be 25% to 50% higher, thus allowing
the APWM signal to have duty cycles that are between 50% and
75%.
is controlled by the following formula:
VISET – VDAC
ISET =
RISET – VDAC
Although the APWM dimming function has a wide frequency
range, if this function is used strictly as an analog dimming
function it is recommended to use frequency ranges between
50 and 500 kHz for best accuracy. The frequency range must be
considered only if the user is not using this function as a closed
loop trim function. There is a few millisecond propagation delay
between the APWM signal and ILED current. This effect is shown
in figures 16 through 18.
When the DAC voltage is equal to VISET , the internal reference,
there is no current through RISET . When the DAC voltage starts
to decrease, the ISET current starts to increase, thus increasing
the LED current. When the DAC voltage is 0 V, the LED current
will be at its maximum.
Analog dimming
The A8510 can also be dimmed by using an external DAC or
another voltage source applied either directly to the ground side
of the RISET resistor or through an external resistor to the ISET
pin (see figure 19).
• For a single resistor (upper panel of figure 19), the ISET current
Where VISET is the ISET pin voltage and VDAC is the DAC output voltage.
• For a dual-resistor configuration (lower panel of figure 19), the
ISET current is controlled by the following formula:
VISET
VDAC – VISET
–
ISET =
(4)
RISET
R1
The advantage of this circuit is that the DAC voltage can be
higher or lower, thus adjusting the LED current to a higher or
lower value of the preset LED current set by the RISET resistor:
▫ VDAC = 1.003 V; the output is strictly controlled by RISET
▫ VDAC > 1.003 V; the LED current is reduced
▫ VDAC < 1.003 V; the LED current is increased
DAC
EN/PWM
(3)
R ISET
VDAC
A8510
ISET
GND
GND
C1
APWM
C2
DAC
IOUT
R1
VDAC
GND
A8510
ISET
R ISET
GND
C3
t
Figure 18. Transition of output current level when a 50% duty cycle signal
is applied to the APWM pin, in conjunction with a 50% duty cycle PWM
dimming being applied to the EN/PWM pin; shows EN/PWM (ch1, 5 V/
div.), APWM (ch2, 5 V/div.), and ILED (ch3, 20 mA/div.), t = 1 ms/div.
Figure 19. Simplified diagrams of voltage control of ILED: typical
applications using a DAC to control ILED using a single resistor (upper),
and dual resistors (lower).
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
LED short detect
All of the LEDx pins are capable of handling the maximum VOUT
that the converter can deliver, thus providing protection from the
LED pin to VOUT in the event of a connector short.
Any LEDx pin that has a voltage exceeding VLEDSC will be
removed from operation (see figure 20). This is to prevent the IC
from dissipating too much power by having a large voltage present on the LEDx pin.
While the IC is being PWM-dimmed, the IC rechecks the disabled LEDx pin every time the PWM signal goes high, to prevent
false tripping of an LEDx short event. This also allows some selfcorrection if an intermittent LEDx pin short-to-VOUT is present.
Overvoltage protection
The A8510 has overvoltage protection (OVP) and open Schottky
diode (D1) protection. The OVP protection has a default level of
8 V and can be increased up to 55 V by connecting ROVP between
the OVP pin and VOUT . When the current into the OVP pin
exceeds 199 μA typical, the OVP comparator goes low and the
boost stops switching.
The following equation can be used to determine the resistance
for setting the OVP level:
where:
ROVP = ( VOUTovp – VOVP(th) ) / IOVPH
(4)
VOUTovp is the target overvoltage level,
ROVP is the value of the external resistor, in Ω,
VOVP(th) is the pin OVP trip point found in the Electrical Characteristics table, and
IOVPH is the current into the OVP pin.
There are several possibilities for why an OVP condition would
be encountered during operation, the two most common being: an
open LED string, and a disconnected output. Examples of these
are provided in figures 21 and 22.
Figure 21 illustrates when the output of the A8510 is disconnected from load during normal operation. The output voltage
instantly increases up to OVP voltage level and then the boost
stops switching to prevent damage to the IC. If the output is
drained off, eventually the boost might start switching for a short
duration until the OVP threshold is hit again.
VLED
C1
EN/PWM
C2
C3
ILED
t
Figure 20. Example of the disabling of an LED string when the LED pin
voltage is increased above 4.6 V; shows VLED (ch1, 5 V/div.), EN/PWM
(ch2, 5 V/div.), and ILED (ch3, 50 mA/div.), t = 20 μs/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Figure 22 displays a typical OVP event caused by an open LED
string. After the OVP condition is detected, the boost stops
switching, and the open LED string is removed from operation.
Afterwards VOUT is allowed to fall, and eventually the boost will
resume switching and the A8510 will resume normal operation.
A8510 also has built-in secondary overvoltage protection to protect the internal switch in the event of an open diode condition.
Open Schottky diode (D1) detection is implemented by detecting
overvoltage on the SW pins of the device. If voltage on the SW
pins exceeds the device safe operating voltage rating, the A8510
disables and remains latched. To clear this fault, the IC must be
Output disconnect
event detected
shut down either by using the PWM signal or by going below the
UVLO threshold on the VIN pin. Figure 23 illustrates this. As
soon as the switch node voltage (SW) exceeds VOVP(sec), the IC
shuts down. Due to small delays in the detection circuit, as well
as there being no load present, the switch node voltage will rise
above the trip point voltage.
Figure 24 illustrates when the A8510 is being enabled during an
open diode condition. The IC goes through all of its initial LED
detection and then tries to enable the boost, at which point the
open diode is detected.
LED string open
condition detected
VOUT
VOUT
SW node
SW node
C2
C2
EN/PWM
C1
C3
C1
C3
ILED
C4
EN/PWM
ILED
C4
t
t
Figure 21. OVP protection in an output disconnect from load event; shows
VOUT (ch1, 10 V/div.), SW node (ch2, 20 V/div.), EN/PWM (ch3, 5 V/div.),
and ILED (ch4, 50 mA/div.), t = 2 ms/div.
Figure 22. OVP protection in an open LED string event; shows VOUT
(ch1, 10 V/div.), SW node (ch2, 20 V/div.), EN/PWM (ch3, 5 V/div.), and
ILED (ch4, 200 mA/div.), t = 1 ms/div.
Open diode
condition detected
EN/PWM
SW node
C1
SW node
C1
C2
IOUT
Open diode
condition detected
C2
VOUT
FAULT
C3
C3
EN/PWM
ILED
C4
C4
t
Figure 23. OVP protection in an open Schottky diode D1 event, while the
IC is in normal operation; shows SW node (ch1, 50 V/div.), IOUT (ch2, 500
¯ĀŪ¯L̄¯T̄
¯ (ch3, 5 V/div.), and EN/PWM (ch4, 5 V/div.), t = 2 μs/div.
mA/div.), F̄
t
Figure 24. OVP protection when the IC is enabled during an open diode
condition; shows EN/PWM (ch1, 5 V/div.), SW node (ch2, 50 V/div.), VOUT
(ch3, 10 V/div.), and ILED (ch4, 200 mA/div.), t = 500 μs/div.
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18
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Boost switch overcurrent protection
in figures 25 through 27.
The boost switch is protected with cycle-by-cycle current
limiting set at a minimum of 3.0 A. There is also a secondary current limit that is sensed on the boost switch. When detected this
current limit immediately shuts down the A8510. The level of this
current limit is set above the cycle-by-cycle current limit to protect the switch from destructive currents when the boost inductor
is shorted. Various boost switch overcurrent conditions are shown
Input overcurrent protection and disconnect switch
The primary function of the input disconnect switch is to protect
the system and the device from catastrophic input currents during
a fault condition. The external circuit implementing the disconnect is shown in figure 28. If the input disconnect switch is not
used, the VSENSE pin must be tied to VIN and the VGATE pin
must be left open.
IL
IL
SW node
C1
C1
C2
SW node
C2
VOUT
VOUT
EN/PWM
C3
EN/PWM
C3
C3
C4
t
t
Figure 25. Normal operation of the switch node (SW); inductor current
(IL) and output voltage (VOUT) for 12 series LEDs in each of 8 strings
configuration; shows IL (ch1, 500 mA/div.), SW node (ch2, 20 V/div.), VOUT
(ch3, 20 V/div.), and EN/PWM (ch4, 5 V/div.), t = 1 μs/div.
Figure 26. Cycle-by-cycle current limiting; inductor current (IL), note
reduction in output voltage as compared to normal operation with the
same configuration (figure 25); shows IL (ch1, 1 A/div.), SW node (ch2, 20
V/div.), VOUT (ch3, 10 V/div.), and EN/PWM (ch4, 5 V/div.), t = 2 μs/div.
EN/PWM
C1
FAULT
C2
SW node
C3
IL
C4
t
Figure 27. Secondary boost switch current limit; when this limit is hit, the
¯ĀŪ¯L̄¯T̄
¯
A8510 immediately shuts down; shows EN/PWM (ch1, 5 V/div.), F̄
(ch2, 5 V/div.), SW node (ch3, 50 V/div.), and IL (ch4, 2 A/div.), t = 200 ns/div.
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19
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
When selecting the external PMOS, check for the following
parameters:
• Drain-source breakdown voltage V(BR)DSS > –40 V
• Gate threshold voltage (make sure it is fully conducting at
VGS = -4 V, and cut-off at –1 V)
If the input current level goes above the preset current limit
threshold, the A8510 will shut down in less than 3 μs regardless
of user input (figure 29). This is a latched condition. The Fault
flag is also set to indicate a fault. This feature is meant to prevent
catastrophic failure in the system due to a short of the inductor or
output voltage to GND.
• RDS(on): Make sure the on-resistance is rated at VGS = -4.5 V or
similar, not at -10 V; derate it for higher temperature
FAULT
C1
VIN
RSC
RADJ
Q1
To L1
C2
VGATE
A8510
IIN
VSENSE
VIN
A8510 shuts down
VGATE
C3
C4
EN/PWM
t
Figure 28. Typical circuit showing the implementation of the input
disconnect feature.
Figure 29. Diagram showing input disconnect current limit wave forms
¯ĀŪ¯L̄¯T̄
¯ (ch1, 5 V/div.), VGATE (ch2,
during fault condition; shows F̄
10 V/div.), IIN (ch3, 2 A/div.), and EN/PWM (ch4, 5 V/div.), t = 5 μs/div.
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A8510
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
Setting the current sense resistor
The typical threshold for the current sense circuit is 180 mV,
when RADJ is 0 Ω. This voltage can be trimmed by the RADJ
resistor. The typical trip point should be set at about 3 A, which
coincides with the cycle-by-cycle current limit minimum threshGiven: 2.85 A of input current, and the calculated maximum
value of the sense resistor, RSC = 0.063 Ω.
The RSC chosen is 0.056 Ω, a standard value.
Also:
(5)
The typical trip point voltage is calculated as:
VADJ = 2.85 A × 0.056 Ω = 0.160 V
RADJ = (0.180 – 0.160 V) / (20.3 μA) = 1.0 kΩ
Input UVLO
When VIN and VSENSE rise above the UVLO enable hysteresis
(VUVLOrise + VUVLOhys ), the A8510 is enabled. A8510 is disabled
when VIN falls below the VUVLOfall threshold for more than 50 μs.
This lag is to avoid shutting down because of momentary glitches
in the input power supply.
Shutdown
If the EN/PWM pin is pulled low for more than tPWML , the
device enters shutdown mode and clears all internal fault registers. As an example, at a 2-MHz clock frequency, the maximum
PWM low period, while avoiding shutdown, is 16 ms. In shut
down, the IC disables all current sources and waits until the
EN/PWM pin goes high to re-enable the IC and proceed with
power-up.
old. A sample calculation is done below:
RADJ = (VSENSETRIP – VADJ ) / IADJ
VDD
The VDD pin provides regulated bias supply for internal circuits.
Connect the capacitor CVDD with a value of 0.1 μF or greater to
this pin.
Fault protection during operation
The A8510 constantly monitors the state of the system to determine if any fault conditions occur during normal operation. The
response to a triggered fault condition is summarized in the Fault
Mode table, on the next page.
The possible fault conditions that the device can detect are: Open
LED pin, LED pin shorted to GND, shorted inductor, VOUT short
to GND, SW pin shorted to GND, ISET pin shorted to GND, and
input disconnect switch source shorted to GND.
Note the following:
• Some of the protection features might not be active during
startup, to prevent false triggering of fault conditions.
• Some of these faults will not be protected if the input
disconnect switch is not being used. An example of this is
VOUT short to ground.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Fault Mode Table
Fault Name
Type
Active
Fault
Flag
Set
Primary switch
overcurrent protection
(cycle-by-cycle
current limit)
Auto-restart
Always
No
This fault condition is triggered by the cycle-bycycle current limit, ISW(LIM).
Secondary switch
current limit
Input disconnect
current limit
Secondary OVP
LEDx pin short
protection
LEDx pin open
ISET short protection
Latched
Latched
Latched
Auto-restart
Auto-restart
Auto-restart
Always
Always
Always
Startup
Normal
Operation
Always
Boost
Disconnect
switch
Sink
driver
Off for
a single
cycle
On
On
Yes
When the current through the boost switch exceeds
secondary current SW limit (ISW(LIM2)) the device
immediately shuts down the disconnect switch,
LED drivers, and boost. The Fault flag is set. To reenable the device, the EN/PWM pin must be pulled
low for 32750 clock cycles.
Off
Off
Off
Yes
The device is immediately shut off if the voltage
across the input sense resistor is above the
VSENSEtrip threshold. The Fault flag is set. To reenable the part the EN/PWM pin must be pulled low
for 32750 clock cycles.
Off
Off
Off
Yes
Secondary overvoltage protection is used for open
diode detection. When diode D1 opens, the SW pin
voltage will increase until VOVP(SEC) is reached. This
fault latches the IC. The input disconnect switch is
disabled as well as the LED drivers, and the Fault
flag is set. To re-enable the part the EN/PWM pin
must be pulled low for 32750 clock cycles.
Off
Off
Off
No
This fault prevents the device from starting-up if
any of the LEDx pins are shorted. The device stops
soft-start from starting while any of the LED pins
are determined to be shorted. Once the short is
removed, soft-start is allowed to start.
Off
On
Off
No
When an LEDx pin is open the device will determine
which LEDx pin is open by increasing the output
voltage until OVP is reached. Any LED string not
in regulation will be turned off. The device will then
go back to normal operation by reducing the output
voltage to the appropriate voltage level.
On
On
Off for
open
pins.
On
for all
others.
No
This fault occurs when the ISET current goes above
150% of the maximum current. The boost will stop
switching and the IC will disable the LED sinks until
the fault is removed. When the fault is removed the
IC will try to regulate to the preset LED current.
Off
On
Off
Description
Continued on the next page…
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Fault Mode Table (continued)
Fault Name
FSET/SYNC short
protection
Overvoltage
protection
Type
Auto-restart
Auto-restart
Active
Always
Always
Fault
Flag
Set
Description
Boost
Disconnect
Switch
Sink
driver
Yes
Fault occurs when the FSET/SYNC current goes
above 150% of maximum current. The boost will
stop switching, the disconnect switch will turn off
and the IC will disable the LEDx sinks until the fault
is removed. When the fault is removed the IC will try
to restart with soft-start.
Off
Off
Off
No
Fault occurs when OVP pin exceeds VOVP(th)
threshold. The A8510 will immediately stop
switching to try to reduce the output voltage. If the
output voltage decreases then the A8510 will restart
switching to regulate the output voltage.
Stop
during
OVP
event.
On
On
On
On
Off for
shorted
pins.
On
for all
others.
LED short protection
Auto-restart
Always
No
Fault occurs when the LEDx pin voltage exceeds
5.1 V. When the LED short protection is detected
the LED string above the threshold will be removed
from operation.
Overtemperature
protection
Auto-restart
Always
No
Fault occurs when the die temperature exceeds the
overtemperature threshold, typically 165°C.
Off
Off
Off
VIN UVLO
Auto-restart
Always
No
Fault occurs when VIN drops below VUVLO , typically
3.90 V. This fault resets all latched faults.
Off
Off
Off
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Wide Input Voltage Range, High Efficiency
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A8510
Applications Information
Then the OVP resistor is:
Design Example for Boost Configuration
This section provides a method for selecting component values
when designing an application using the A8510. An example
schematic is provided in figure 30.
Assumptions: For the purposes of this example, the following are
given as the application requirements:
where both I OVPH and VOVP(th) are taken from the Electrical
Characteristics table.
Step 3b At this point a quick check must be done to see if the
conversion ratio is acceptable for the selected frequency.
Step 1 Connect LEDs to pins LED1 through LED8.
Dmaxofboost = 1 – tSWOFFTIME × fSW
(9)
= 1 – 1.5 × 47 ns × 800 kHz = 94.36%
where minimum off time (tSWOFFTIME) is found in the Electrical
Characteristics table.
The Theoretical Maximum VOUT is then calculated as:
Step 2 Determining the LED current setting resistor RISET:
(6)
= 327.981 / 40 mA = 8.20 kΩ
Choose a 8.25 kΩ resistor.
VOUTthe(max) =
VIN(min)
1 – Dmaxofboost
– Vd
(10)
10 V
– 0.4 = 177 V
1 – 0.9436
where Vd is the diode forward voltage.
=
Step 3 Determining the OVP resistor. The OVP resistor is
connected between the OVP pin and the output voltage of the
converter.
Step 3a The first step is determining the maximum voltage
based on the LED requirements. Then this value and the regulation voltage (VLED) should be added together, as well as another
750 mV to take noise and output ripple into consideration. The
regulation voltage, VLED , of the A8510 is 680 mV.
= 12 × 3.2 V+ 0.680 V + 2 V
= 41.08 V
= (41.08 V – 8.1 V) / 199 μA = 165.73 kΩ
VOUT(OVP) = 169 kΩ × 199 μA + 8.1 V = 41.7 V
Procedure: The procedure consists of selecting the appropriate
configuration and then the individual component values, in an
ordered sequence. It should be noted that in many calculations
the minimum and/or maximum specification values are used to
guarantee proper system operation.
VOUT(OVP) = #SERIESLEDS × Vf + VLED + 2
(8)
Chose a value of resistor that is higher value than the calculated
ROVP . In this case a value of 169 kΩ was selected. Below is the
actual value of the minimum OVP trip level with the selected
resistor:
• VBAT: 10 to 14 V
• Quantity of LED channels, #CHANNELS : 8
• Quantity of series LEDs per channel, #SERIESLEDS : 12
• LED current per channel, ILED : 40 mA
• Vf at 40 mA: 3.2 V
• fSW : 800 kHz
• TA(max): 65°C
• PWM dimming frequency: 200 Hz, 1% Duty cycle
RISET = 1.003 × 327 / ILED
ROVP = (VOUT(OVP) – VOVP(th) ) / IOVPH
(7)
The Theoretical Maximum VOUT value must be greater than the
value VOUT(OVP) . If this is not the case, the switching frequency
of the boost converter must be reduced to meet the maximum
duty cycle requirements.
Step 4 Selecting the inductor. The inductor must be chosen such
that it can handle the necessary input current. In most applications, due to stringent EMI requirements, the system must operate
in continuous conduction mode throughout the whole input voltage range.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Then:
Step 4a Determining the duty cycle, calculated as follows:
D(max) = 1 –
VIN(min)
VOUT(OVP) + Vd
(11)
=
10 V
=1–
= 76.3%
41.7 V + 0.4 V
The voltage drop of the diode can be approximated to be about
0.4 V.
Step 4b Determining the maximum and minimum input current
to the system. The minimum input current will dictate the inductor value. The maximum current rating will dictate the current
rating of the inductor. First, the maximum input current, given:
IOUT = #CHANNELS
= 8
ILED
(12)
0.040 A = 0.320 A
then:
IIN(max) =
VOUT(OVP) IOUT
VIN(min)
L=
(13)
H
VIN(min)
ΔIL fSW
10 V
0.444 A 800 kHz
1.059 A > 0.222 A
A good inductor value to use would be 22 μH, Lused .
Step 4e This step is used to verify that there is sufficient slope
compensation for the inductor chosen. The slope compensation
value is determined by the following formula:
4.5 fSW
Slope Compensation =
= 1.8 A /μs
(18)
2 10 6
Next insert the inductor value used in the design:
=
where η is efficiency.
(14)
Required
Slope (min) =
=
A good approximation of efficiency, η , can be taken from the
efficiency curves located in the diode datasheet. A value of 90%
is a good starting approximation.
Step 4c Determining the inductor value. To ensure that the
inductor operates in continuous conduction mode, the value of
the inductor must be set such that the ½ inductor ripple current is
not greater than the average minimum input current. A first past
assumes Iripple to be 30% of the maximum inductor current:
= 1.48 A × 0.3 = 0.444 A
(19)
10 V 0.763
= 0.434 A
22 μH 800 kHz
ΔILused 1 10 –6
1
(1 – D(max))
(20)
fSW
41.7 V 0.320 A
=
= 1.059 A
14 V 0.9
ΔIL = IIN(max) × 0.3
VIN(min) D(max)
Lused fSW
Calculate the minimum required slope:
Next, calculate minimum input current, as follows:
VOUT(OVP) IOUT
IIN(min) =
VIN(max) H
0.76 = 21.4 μH
Step 4d Double-check to make sure the ½ current ripple is less
than IIN(min):
IIN(min) > 1/2 ΔIL
(17)
ΔILused =
41.7 V 0.320 A
=
= 1.483 A
10 V 0.9
(16)
D(max)
(15)
0.434 A 1 10 –6
= 1.46 A/μs
1
(1 – 0.763)
800 kHz
If the minimum required slope is larger than the calculated slope
compensation, the inductor value must be increased.
Note: that the slope compensation value is in A/μs, and 1×10 –6 is
a constant multiplier.
Step 4f Determining the inductor current rating. The inductor
current rating must be greater than the IIN(max) value plus the
ripple current ΔIL, or about 1.7 A, calculated as follows:
IL(min) = IIN(max) + 1/2 ΔILused
(21)
= 1.483 A + 0.217 A = 1.70 A
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Wide Input Voltage Range, High Efficiency
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A8510
Step 5 Determining the resistor value for a particular switching
frequency. Use the RFSET values shown in figure 6. For example,
a 25.5 kΩ resistor will result in an 800 kHz switching frequency.
Step 6 Choosing the proper switching diode. The switching
diode must be chosen for three characteristics when it is used in
LED lighting circuitry. The most obvious two are: current rating
of the diode and reverse voltage rating.
The reverse voltage rating should be such that during operation
condition, the voltage rating of the device is larger than the maximum output voltage. In this case it is VOUT(OVP).
The peak current through the diode is calculated as:
Idp = IIN(max) + 1/2 ΔILused
Step 7 Choosing the output capacitors. The output capacitors
must be chosen such that they can provide filtering for both the
boost converter and for the PWM dimming function. The biggest factors that contribute to the size of the output capacitor are
PWM dimming frequency and PWM duty cycle. Another major
contributor is leakage current ( ILK ). This current is the combination of the OVP leakage current as well as the reverse current of
the switching diode. In this design the PWM dimming frequency
is 200 Hz and the minimum duty cycle is 1%. Typically the voltage variation on the output (VCOUT) during PWM dimming must
be less than 250 mV, so that no audible hum can be heard. The
capacitance can be calculated as follows:
1 – D(min)
fPWM(dimming)
= 200 μA
Vendor
Value
Part number
Murata
4.7 μF 50 V
GRM32ER71H475KA88L
Murata
2.2 μF 50 V
GRM31CR71H225KA88L
The rms current through the capacitor is given by:
∆ILused
IIN(max) 12
1 – D(max)
D(max) +
ICOUTrms = IOUT
(22)
= 1.483 A + 0.217 A = 1.70 A
The third major component in deciding the switching diode is the
reverse current, IR , characteristic of the diode. This characteristic
is especially important when PWM dimming is implemented.
During PWM off-time the boost converter is not switching. This
results in a slow bleeding off of the output voltage, due to leakage
currents. IR can be a large contributor, especially at high temperatures. On the diode that was selected in this design, the current
varies between 1 and 100 μA.
COUT = ILK
Corresponding capacitors include:
(23)
VCOUT
1 – 0.01
= 3.96 μF
200 Hz 0.250 V
A capacitor larger than 3.96 μF should be selected due to degradation of capacitance at high voltages on the capacitor. A ceramic
4.7 μF 50 V capacitor is a good choice to fulfill this requirement.
= 0.320 A
(24)
0.434 A
1.48 A 12 = 0.583 A
1 – 0.763
0.763 +
The output capacitor must have a current rating of at least
583 mA. The capacitors selected in this design have a combined
rms current rating of 3 A.
Step 8 Selecting input capacitor. The input capacitor must be
selected such that it provides a good filtering of the input voltage
waveform. A good rule of thumb is to set the input voltage ripple
ΔVIN to be 1% of the minimum input voltage. The minimum
input capacitor requirements are as follows:
CIN =
=
∆ILused
8
8
(25)
fSW
∆VIN
0.434 A
= 0.68 μF
800 kHz 0.1 V
The rms current through the capacitor is given by:
IINrms =
IOUT ×
(26)
∆ILused
IIN(max)
(1 – D(max)) 12
0.320 A × 0.434 A
1.48 A
=
(1 – 0.763) 12
= 0.11 A
A good ceramic input capacitor with ratings of 2.2 μF 50V or
4.7 μF 50 V will suffice for this application.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Corresponding capacitors include:
The RSC chosen is 0.056 Ω, a standard value.
The trip point voltage must be:
Vendor
Value
Part number
Murata
4.7 μF 50 V
GRM32ER71H475KA88L
Murata
2.2 μF 50 V
GRM31CR71H225KA88L
VADJ = 3.0 A × 0.056 Ω = 0.168 V
RADJ = (VSENSEtrip – VADJ ) / IADJ
= (0.180 V – 0.168 V) / 20.3 μA = 591 Ω
A value of 590 Ω was chosen for this design.
Step 9 Choosing the input disconnect switch components. Set
the input disconnect current limit to 3 A by choosing a corresponding sense resistor. The calculated maximum value of the
sense resistor is:
RSC(max) = VSENSEtrip/ 3.0 A
= 0.180 V / 3.0 A= 0.060 Ω
VIN
RSC
0.056 Ω
(27)
Q1
RADJ
590 Ω
CIN
4.7 μF/ 50 V
L1
22 μH
VGATE
VSENSE
VIN
VDD
VC
100 kΩ
CVDD
0.1 μF
D1
2 A / 60 V
SW SW
A8510
PAD
FAULT
EN/PWM
APWM
ISET
RISET
8.25 kΩ
(28)
RFSET
25.5 kΩ
FSET/SYNC
AGND
VOUT
ROVP
169 kΩ
OVP
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
COMP
PGND PGND
COUT
4.7 μF
50 V
12 LEDs
each string
CP
120 pF
RZ
120 Ω
CZ
0.47 μF
Figure 30. The schematic diagram showing calculated values from the design example above
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Wide Input Voltage Range, High Efficiency
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A8510
Design Example for SEPIC Configuration
This section provides a method for selecting component values
when designing an application using the A8510 in SEPIC (Single-Ended Primary-Inductor Converter) circuit. SEPIC topology
has the advantage that it can generate a positive output voltage
either higher or lower than the input voltage. The resulting design
is diagrammed in figure 31.
Assumptions: For the purposes of this example, the following are
given as the application requirements:
• VBAT: 6 to 14 V ( VIN(min): 5 V and VIN(max): 16 V )
• Quantity of LED channels, #CHANNELS : 8
VOUT(OVP) = #SERIESLEDS × Vf + VLED + 2 (V)
(30)
= 4 × 3.3 (V) + 0.680 (V) + 2 (V) = 15.9 V
Then the OVP resistor is:
ROVP = (VOUT(OVP) – VOVP(th) ) / IOVPH
(31)
= (15.9 (V) – 8.1 (V)) / 0.199 (mA) = 39.196 kΩ
where both I OVPH and VOVP(th) are taken from the Electrical
Characteristics table.
In this case a value of 39.2 kΩ was selected. Below is the actual
value of the minimum OVP trip level with the selected resistor:
• Quantity of series LEDs per channel, #SERIESLEDS : 4
• LED current per channel, ILED : 40 mA
VOUT(OVP) = 39.2 (kΩ) × 0.199 (mA) + 8.1 (V) = 15.9 V
• LED Vf at 60 mA: ≈ 3.3 V
Step 3b At this point a quick check must be done to determine if
the conversion ratio is acceptable for the selected frequency.
• fSW : 800 kHz
• TA(max): 65°C
Dmax = 1 – tSWOFFTIME × fSW
• PWM dimming frequency: 200 Hz, 1% duty cycle
(32)
= 1 – 1.5 × 47 (ns) × 800 (kHz) = 94.4%
Procedure: The procedure consists of selecting the appropriate
configuration and then the individual component values, in an
ordered sequence.
Step 1 Connecting LEDs to LEDx pins. If only some of the LED
channels are needed, the unused LEDx pins should be pulled to
ground using a 1.5 kΩ resistor.
Step 2 Determining the LED current setting resistor RISET:
RISET = (VISET × AISET) / ILED
of the A8510 is 720 mV. A constant term, 2 V, is added to give
margin to the design due to noise and output voltage ripple.
where the minimum off-time (tSWOFFTIME) is found in the Electrical Characteristics table.
The Theoretical Maximum VOUT is then calculated as:
VOUT(max) = VIN(min)
= 5 (V)
(29)
= (1.003 (V) × 327) / 0.40 (A) = 8.20 kΩ
Choose an 8.25 kΩ 1% resistor.
Dmax
1 – Dmax
– Vd
(33)
0.94
– 0.4 (V) = 77.9 V
1 – 0.94
where Vd is the diode forward voltage.
Step 3 Determining the OVP resistor. The OVP resistor is
connected between the OVP pin and the output voltage of the
converter.
The Theoretical Maximum VOUT value must be greater than
the value VOUT(OVP) . If this is not the case, it may be necessary
to reduce the frequency to allow the boost to convert the voltage ratios.
Step 3a The first step is determining the maximum voltage
based on the LED requirements. The regulation voltage, VLED ,
Step 4 Selecting the inductor. The inductor must be chosen such
that it can handle the necessary input current. In most applica-
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
tions, due to stringent EMI requirements, the system must operate
in continuous conduction mode throughout the whole input voltage range.
Step 4a Determining the duty cycle, calculated as follows:
D(max) =
VOUT(OVP) + Vd
VIN(min) + VOUT(OVP) + Vd
(34)
= 8
(39)
0.765 = 14.1 μH
than IIN(min):
Step 4b Determining the maximum and minimum input current
to the system. The minimum input current will dictate the inductor value. The maximum current rating will dictate the current
rating of the inductor. First, the maximum input current, given:
ILED
VIN(min)
D(max)
ΔIL fSW
5 (V)
=
0.339 (A) 800 (kHz)
L=
Step 4d Double-check to make sure the ½ current ripple is less
15.9 (V) + 0.4 (V)
=
= 76.5%
5 (V) + 15.9 (V) + 0.4 (V)
IOUT = #CHANNELS
then:
(35)
IIN(min) > 1/2 ΔIL
(40)
0.353 A > 0.170 A
A good inductor value to use would be 15 μH.
Step 4e Next insert the inductor value used in the design to
determine the actual inductor ripple current:
40 (mA) = 0.320 A
then:
IIN(max) =
=
VOUT(OVP) IOUT
VIN(min)
(36)
H
=
15.9 (V) 0.32 (A)
= 1.131 A
5 (V) 0.90
(41)
0.765
5 (V)
= 0.319 A
15 (μH) 800 (kHz)
current rating must be greater than the IIN(max) value plus half of
Next, calculate minimum input current, as follows:
VOUT(OVP) IOUT
IIN(min) =
VIN(max) H
15.9 (V)
16 (V)
VIN(min) D(max)
Lused fSW
Step 4f Determining the inductor current rating. The inductor
where η is efficiency.
=
ΔILused =
the ripple current ΔIL, calculated as follows:
(37)
0.32 (A)
= 0.353 A
0.90
= 1.131 × 0.30 = 0.339 A
(42)
= 1.131 (A) + 0.160 (A) = 1.291 A
Step 5 Determining the resistor value for a particular switching
Step 4c Determining the inductor value. To ensure that the
inductor operates in continuous conduction mode, the value of
the inductor must be set such that the ½ inductor ripple current
is not greater than the average minimum input current. As a first
pass assume Iripple to be 30% of the maximum inductor current:
ΔIL = IIN(max) × Iripple
L(min) = IIN(max) + 1/2 ΔILused
(38)
frequency. Use the RFSET values shown in figure 6. For example,
a 25.5 kΩ resistor will result in an 800 kHz switching frequency.
Step 6 Choosing the proper switching diode. The switching
diode must be chosen for three characteristics when it is used in
LED lighting circuitry. The most obvious two are: current rating
of the diode and reverse voltage rating.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
The reverse breakdown voltage rating for the output diode in a
SEPIC circuit should be:
VBD > VOUT(OVP)(max) + VIN(max)
(43)
> 15.9 (V) + 16 (V) = 31.9 V
because the maximum output voltage in this case is VOUT(OVP).
The peak current through the diode is calculated as:
Idp = IIN(max) + 1/2 ΔILused
Step 7 Choosing the output capacitors. The output capacitors
must be chosen such that they can provide filtering for both the
boost converter and for the PWM dimming function. The biggest
factors that contribute to the size of the output capacitor are:
PWM dimming frequency and PWM duty cycle. Another major
contributor is leakage current, ILK . This current is the combination of the OVP leakage current as well as the reverse current of
the switching diode. In this design the PWM dimming frequency
is 200 Hz and the minimum duty cycle is 1%. Typically, the voltage variation on the output, VCOUT , during PWM dimming must
be less than 250 mV, so that no audible hum can be heard. The
capacitance can be calculated as follows:
1 – D(min)
fPWM(dimming) V
COUT
= 200 (μA)
The rms current through the capacitor is given by:
ICOUTrms = IOUT
(44)
= 1.131 (A) + 0.160 (A) = 1.291 A
The third major component in deciding the switching diode is the
reverse current, IR , characteristic of the diode. This characteristic
is especially important when PWM dimming is implemented.
During PWM off-time the boost converter is not switching. This
results in a slow bleeding off of the output voltage, due to leakage
currents. IR can be a large contributor, especially at high temperatures. On the diode that was selected in this design, the current
varies between 1 and 100 μA. It is often advantageous to pick a
diode with a much higher breakdown voltage, just to reduce the
reverse current. Therefore for this example, pick a diode rated for
a VBD of 60 V, instead of just 40 V.
COUT = ILK
A capacitor larger than 3.96 μF should be selected due to degradation of capacitance at high voltages on the capacitor. Select a
4.7 μF capacitor for this application.
(45)
D(max)
1 – D(max)
= 0.320 (A)
(46)
0.765
= 0.577 A
1 – 0.765
The output capacitor must have a ripple current rating of at least
600 mA. The capacitor selected for this design is a 4.7 μF 50 V
capacitor with a 1.5 A current rating.
Step 8 Selecting input capacitor. The input capacitor must be
selected such that it provides a good filtering of the input voltage
waveform. A estimation rule is to set the input voltage ripple,
ΔVIN , to be 1% of the minimum input voltage. The minimum
input capacitor requirements are as follows:
CIN =
=
∆ILused
8
8
fSW
∆VIN
0.319 (A)
= 1.00 μF
800 (kHz) 0.05 (V)
The rms current through the capacitor is given by:
∆ILused
CINrms =
12
0.319 (A)
= 0.092 A
=
12
(47)
(48)
A good ceramic input capacitor with a rating of 2.2 μF 25 V will
suffice for this application.
1 – 0.01
= 3.96 μF
200 (Hz) 0.250 (V)
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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30
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
The rms current requirement of the coupling capacitor is given
by:
(50)
ICSWrms = IIN(max) 1 – D(max)
D(max)
Step 9 Selecting coupling capacitor CSW. The minimum capacitance of CSW is related to the maximum voltage ripple allowed
across it:
CSW =
IOUT
DMAX
fSW
(49)
∆VSW
0.32 (A) 0.765
=
= 0.627 μF
0.1 (V) 800 (kHz)
VIN
6 to 14 V
CIN
2.2 μF
25 V
RSC
0.056 Ω
VGATE
VSENSE
VIN
VDD
VC
CVDD
0.1 μF
CSW
3.3 μF / 25 V
SW SW
A8510
PAD
FAULT
EN/PWM
APWM
ISET
RISET
8.25 kΩ
FSET/SYNC
RFSET
25.5 kΩ
1 – 0.765
= 0.627 A
0.765
The voltage rating of the coupling capacitor must be greater than
VIN(max), or 16 V in this case. A ceramic capacitor rated for
2.2 μF 25 V will suffice for this application.
L1
15 μH
Q1
RADJ
590 Ω
R1
100 kΩ
= 1.131 (A)
AGND
OVP
LED1
LED2
LED3
LED4
LED5
LED6
LED7
LED8
COMP
PGND PGND
L2
15 μH
D1
2 A / 60 V
ROVP
39.2 kΩ
CP
120 pF
VOUT
COUT
4.7 μF
50 V
RZ
120 Ω
CZ
0.47 μF
Figure 31. Typical application showing SEPIC configuration, with accurate input current sense, and VSENSE
to GND protection.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
31
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Package EC, 26-Pin QFN with Exposed Thermal Pad
0.20
4.00 ±0.15
1
2
0.40
26
26
0.95
A
1
2
C
1.10
4.00
4.00 ±0.15
1.23
Top View
2.45
4.00
27X
D
SEATING
PLANE
0.08 C
0.20 ±0.05
C
PCB Layout Reference View
0.75 ±0.05
0.40 BSC
For Reference Only
(reference JEDEC MO-220WGGE)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
+0.15
0.40 –0.10
B
1.23
1.10
2
1
26
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C Reference land pattern layout (reference IPC7351
QFN40P400X400X80-29M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
D Coplanarity includes exposed thermal pad and terminals
2.45
Bottom View
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
32
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8510
Revision History
Revision
Revision Date
Rev. 2
December 15, 2011
Description of Revision
Update to application examples, add VSYNC
Copyright ©2010-2013, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
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use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
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115 Northeast Cutoff
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1.508.853.5000; www.allegromicro.com
33
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