A8515 Datasheet

A8515
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
Description
Features and Benefits
• Wide input voltage range: 5 to 40 V
• Maximum LED current of 120 mA
• TSSOP-16 (LP) package; exposed pad offers best-in-class
thermal performance
• Typical LED accuracy of 0.5%, and 0.5% for
LED-to-LED matching
• Internal bias supply for single-supply operation (typically
between VIN = 8 to 24 V)
• Integrated boost converter with 60 V DMOS switch with
overvoltage protection (OVP)
• Drives up to 12 series LEDs in 2 parallel strings
• Single EN/PWM pin interface for both PWM dimming
and enable function
• Sync function to synchronize boost converter switching
frequencies up to 2.3 MHz, this gives the designer the
ability minimize component size
• Provides driver for external PMOS input disconnect switch
• Protection features:
▫ Open or shorted VLED pin protection
▫ Open Schottky protection
▫ Cycle-by-cycle current limit
▫ Overtemperature protection (OTP)
▫ Output short circuit protection
The A8515 is a multi-output white LED (WLED) driver for LCD
backlighting in consumer and industrial displays. It integrates
a current-mode boost converter with an internal power DMOS
switch and two current sinks. The boost converter can drive
up to 24 LEDs: 12 LEDs per string at 120 mA. The LED sinks
can be paralleled together to achieve higher LED currents,
up to 240 mA. The A8515 can operate from a single power
supply, from 5 to 40 V.
PWM dimming is implemented with an external PWM input
signal. The EN/PWM dimming pin is used to control the LED
intensity by using pulse width modulation.
The low, 720 mV regulation voltage on the LED current
sources reduces power loss and improves efficiency.
The A8515 is provided in a 16-pin TSSOP package (suffix LP)
with an exposed thermal pad. It is lead (Pb) free, with 100%
matte tin leadframe plating.
Applications
• Desktop LCD flat panel displays (FPD)
• Flat panel video displays
• LCD TVs and monitors
Package: 16-pin TSSOP with exposed
thermal pad (suffix LP)
Not to scale
Typical Application Diagram
L1
10 μH
VIN 10 to 14 V
CIN
4.7 μF/ 50 V
VC
100 kΩ
CVDD
0.1 μF
NC GATE
VSENSE
VIN
VDD
D1
2 A / 60 V
SW
RISET
8.25 kΩ
A8515-DS, Rev. 2
RFSET
10 kΩ
OVP
PAD
ISET
FSET
AGND
COUT
4.7 μF
50 V
ROVP
158 kΩ
A8515
FAULT
EN/PWM
APWM
VOUT
10 LEDs
each string
LED1
LED2
COMP
PGND
CP
120 pF
RZ
150 Ω
CZ
0.47 μF
Figure 1. Typical Application Circuit;
12 V input, output to 20 LEDs
(10 series LEDs in each of two
strings) at 120 mA each.
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Selection Guide
Part Number
A8515GLPTR-T
Packing
4000 pieces per 13-in. reel
Absolute Maximum Ratings*
Characteristic
Symbol
Notes
LEDx Pin
OVP Pin
VIN, VSENSE, GATE Pins
SW Pin
Rating
Unit
–0.3 to 55
V
–0.3 to 60
V
VSENSE should not exceed VIN by more
than ±0.4 V. GATE cannot exceed VIN by
more than 0.4 .V
–0.3 to 40
V
Continuous
–0.6 to 62
V
–1.0
V
¯ĀŪ¯L̄¯T̄
¯ Pin
F̄
t < 50 ns
–0.3 to 40
V
ISET, FSET, APWM, COMP Pins
–0.3 to 5.5
V
–0.3 to 7
V
All other pins
Operating Ambient Temperature
TA
–40 to 105
ºC
Maximum Junction Temperature
TJ(max)
150
ºC
Tstg
–55 to 150
ºC
Storage Temperature
Range G
*Stresses beyond those listed in this table may cause permanent damage to the device. The Absolute Maximum ratings are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical
Characteristics table is not implied. Exposure to Absolute-Maximum-rated conditions for extended periods may affect device reliability.
Thermal Characteristics may require derating at maximum conditions
Characteristic
Package Thermal Resistance
Symbol
RθJA
Test Conditions*
Value
Unit
On 4-layer PCB based on JEDEC standard
34
ºC/W
On 2-layer PCB with 1 in.2 of copper area each side
52
ºC/W
*Additional thermal information available on the Allegro website
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Pin-out Diagram
VDD 1
16 LED2
PGND 2
15 LED1
14 AGND
OVP 3
SW 4
GATE 5
VSENSE 6
PAD
13 ISET
12 FSET/SYNC
11 EN/PWM
VIN 7
10 APWM
FAULT 8
9 COMP
Terminal List Table
Number
Name
Function
1
VDD
2
PGND
Output of internal LDO; connect a 0.1 μF decoupling capacitor between this pin and GND.
3
OVP
This pin is used to sense an overvoltage condition; connect the ROVP resistor from VOUT to this
pin to adjust the Overvoltage Protection function (OVP).
4
SW
The drain of the internal NMOS switch of the boost converter.
5
GATE
Power ground for internal NMOS device.
Output gate driver pin for external P-channel FET control.
Connect this pin to the negative sense side of the current sense resistor RSC; the threshold
voltage is measured as VIN – VSENSE.
6
VSENSE
7
VIN
8
¯ĀŪ¯L̄¯T̄
¯
F̄
This pin is used to indicate a fault condition, it is an open drain type configuration that will be
pulled low when a fault occurs; connect a 100 kΩ resistor between this pin and the required
logic level voltage.
9
COMP
Output of the error amplifier and compensation node; connect a series RZCZ network from this
pin to GND for control loop compensation.
10
APWM
Analog trimming option or dimming; applying a digital PWM signal to this pin adjusts the internal
ISET current.
11
EN/PWM
PWM dimming pin used to control the LED intensity by using pulse width modulation; the typical
PWM dimming frequency is in the range of 200 Hz to 1 kHz.
12
FSET/SYNC
Input power to the A8515 as well as the positive input used for the current sense resistor.
Frequency/synchronization pin; connect a resistor RFSET from this pin to GND to set the
switching frequency. This pin can also be used to synchronize two or more converters in the
system; the maximum synchronization frequency is 2.3 MHz.
13
ISET
14
AGND
LED signal ground.
Connect the RISET resistor between this pin and GND to set the LED 100% current level.
15
LED1
Connect the cathode of the LED string to this pin.
16
LED2
Connect the cathode of the LED string to this pin.
–
PAD
Exposed pad of the package providing enhanced thermal dissipation; this pad must be
connected to the ground plane(s) of the PCB with at least 8 thermal vias, directly in the pad.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Functional Block Diagram
VDD
SW
Internal VCC
Regulator
UVLO
VIN
VREF
1.235 V
Ref
Internal VCC
AGND
+
∑
FSET/SYNC
–
Oscillator
Diode
Open
Driver
Circuit
+ Sense
COMP
–
+
Current
Sense
ISS
–
Internal
Soft Start
+
PGND
–
VSENSE
Thermal
Shutdown
Input Current
Sense Amplifier
IADJ
Fault
+
PMOS
Driver
EN/PWM
OVP
Sense
GOFF
–
GATE
OVP
VREF
Open/Short
LED Detect
Enable
PWM
100 kΩ
ISS
LED1
LED
Driver
APWM
Internal VCC
ISET
VREF
LED2
ISET
FAULT
AGND
PGND
AGND
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115 Northeast Cutoff
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
ELECTRICAL CHARACTERISTICS1 Valid at VIN = 16 V, TA = 25°C,
indicates specifications guaranteed by design and
characterization over the full operating temperature range with TA = TJ = –40°C to 105°C; unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.2
Max.
Unit
5
–
40
V
Input Voltage Specifications
Operating Input Voltage Range3
VIN
UVLO Start Threshold
VUVLOrise
VIN rising
−
–
4.35
V
UVLO Stop Threshold
VUVLOfall
VIN falling
−
–
3.90
V
–
450
–
mV
EN/PWM = VIH ; SW = 2 MHz, no load
−
5.5
−
mA
VIN = 16 V, EN/PWM = SYNC = 0 V
−
2
10.0
μA
UVLO
Hysteresis4
VUVLOHYS
Input Currents
Input Quiescent Current
Input Sleep Supply Current
IQ
IQSLEEP
Input Logic Levels (EN/PWM, APWM)
Input Logic Level-Low
VIL
VIN throughout operating input voltage range
–
–
400
mV
Input Logic Level-High
VIH
VIN throughout operating input voltage range
1.5
–
–
V
–
100
–
kΩ
EN/PWM Pin Open Drain
Pull-down Resistor
RENPWM
APWM Pull-down Resistor
RAPWM
EN/PWM = VIH
–
100
–
kΩ
fAPWM
APWM, VIH = 1.5 V, VIL = 0.4 V
20
−
1000
kHz
APWM
APWM Frequency
Error Amplifier
Open Loop Voltage Gain
Transconductance
AVOL
gm
−
48
−
dB
ΔICOMP = ±10 μA
−
990
−
μA/V
Source Current
IEA(SRC)
VCOMP = 1.5 V
−
–350
−
μA
Sink Current
IEA(SINK)
VCOMP = 1.5 V
−
350
−
μA
RCOMP
¯ĀŪ¯L̄¯T̄
¯ =1
F̄
−
2000
−
Ω
VOVP(th)
OVP connected to VOUT
COMP Pin Pull-down Resistance
Overvoltage Protection
Overvoltage Threshold
OVP Sense Current
7.7
8.1
8.5
V
188
199
210
μA
−
0.1
1
μA
−
55
−
V
ISW = 0.750 A, VIN = 16 V
−
300
−
mΩ
VSW = 16 V, EN/PWM = VIL
−
0.1
1
μA
3.0
3.5
4.2
A
−
7
−
A
IOVPH
OVP Leakage Current
IOVPLKG
Secondary Overvoltage Protection
VOVP(sec)
ROVP = 40.2 kΩ, VIN = 16 V, EN/PWM = VIL
Boost Switch
Switch On-Resistance
RSW
Switch Leakage Current
ISWLKG
Switch Current Limit
ISW(LIM)
ISW(LIM2)
Higher than ISW(LIM)(max) for all conditions,
device latches when detected
Soft Start Boost Current Limit
ISWSS(LIM)
Initial soft start current for boost switch
−
700
−
mA
Minimum Switch On-Time
tSWONTIME
−
85
−
ns
Minimum Switch Off-Time
tSWOFFTIME
−
47
−
ns
Secondary Switch Current Limit4
Continued on the next page…
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
ELECTRICAL CHARACTERISTICS1 (continued) Valid at VIN = 16 V, TA = 25°C, indicates specifications guaranteed by design
and characterization over the full operating temperature range with TA = TJ = –40°C to 105°C; unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Typ.2
Max.
Unit
Oscillator Frequency
RFSET = 10 kΩ
1.8
2
2.2
MHz
fSW
RFSET = 20 kΩ
−
1
−
MHz
RFSET = 35.6 kΩ
−
580
−
kHz
FSET/SYNC Pin Voltage
VFSET
RFSET = 10 kΩ
−
1.00
−
V
FSET Frequency Range
fFSET
580
−
2500
kHz
Oscillator Frequency
Synchronization
Synchronized PWM Frequency
fSWSYNC
580
−
2300
kHz
Synchronization Input
Minimum Off-Time
tPWSYNCOFF
150
−
−
ns
Synchronization Input
Minimum On-Time
tPWSYNCON
150
−
−
ns
SYNC Input Logic Voltage
VSYNC(H)
FSET/SYNC pin, high level
−
−
0.4
V
VSYNC(L)
FSET/SYNC pin, low level
2.0
−
−
V
LED Current Sinks
LEDx Accuracy
ErrLED
ISET = 120 μA
−
0.5
2
%
LEDx Matching
ΔLEDx
ISET = 120 μA
−
0.5
1
%
−
720
−
mV
LEDx Regulation Voltage
VLED
VLED1 = VLED2 , ISET = 120 μA
ISET to ILEDx Current Gain
AISET
ISET = 120 μA
960
980
1000
A/A
ISET Pin Voltage
VISET
−
1.003
−
V
Allowable ISET Current
ISET
40
−
125
μA
4.6
−
−
V
VLED Short Detect
VLEDSC
While LED sinks are in regulation, sensed
from LEDx pin to GND
Soft Start LEDx Current
ILEDSS
Current through each enabled LEDx pin
during soft start
−
3.2
−
mA
Maximum PWM Dimming
Until Off-Time
tPWML
Measured while EN/PWM = low, during
dimming control and internal references
are powered-on (exceeding tPWML results in
shutdown)
−
32,750
−
fSW
cycles
Minimum PWM On-Time
tPWMH
First cycle when powering-up device
−
0.75
2
μs
−
0.5
1
μs
EN/PWM High to LED-On Delay
tdPWM(on)
Time between PWM enable and LED current
reaching 90% of maximum
EN/PWM Low to LED-Off Delay
tdPWM(off)
Time between PWM enable going low and
LED current reaching 10% of maximum
−
−
500
ns
VGS = 0 V with respect to VIN
−
−104
−
μA
−
−
3
μs
−
-6.7
−
V
GATE Pin
Gate Pin Sink Current
IGSINK
Gate Fault Shutdown
tGFAULT
Gate Voltage
VGS
Gate to source voltage measured when gate
is on
Continued on the next page…
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
ELECTRICAL CHARACTERISTICS1 (continued) Valid at VIN = 16 V, TA = 25°C, indicates specifications guaranteed by design
and characterization over the full operating temperature range with TA = TJ = –40°C to 105°C; unless otherwise noted
Characteristics
Min.
Typ.2
Max.
Unit
18.8
20.3
21.8
μA
Measured between VIN and VSENSE,
RADJ = 0 Ω
–
180
–
mV
IFAULT = 1 mA (400 Ω)
−
−
0.5
V
VFAULT = 5 V
−
−
1
μA
−
165
−
ºC
−
20
−
ºC
Symbol
Test Conditions
VSENSE Pin
VSENSE Pin Sink Current
VSENSE Trip Point
IADJ
VSENSEtrip
¯Ā¯Ū¯L̄
¯T̄
¯ Pin
F̄
¯ĀŪ¯L̄¯T̄
¯ Pull-Down Voltage
F̄
¯ĀŪ¯L̄¯T̄
¯ Pin Leakage Current
F̄
VFAULT
IFAULTLKG
Thermal Protection (TSD)
Thermal Shutdown Threshold4
TSD
Thermal Shutdown Hysteresis4
TSDHYS
Temperature rising
1For
input and output current specifications, negative current is defined as coming out of the node or pin (sourcing); positive current is defined as
going into the node or pin (sinking).
2Typical specifications are at T = 25ºC.
A
3Minimum V = 5 V is only required at startup. After startup is completed, the IC is able to function down to V = 4 V.
IN
IN
4Ensured by design and characterization, not production tested.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Characteristic Performance
10
9
8
7
6
5
4
3
2
1
0
-50 -40 -30 -20 -10 0
VIN UVLO Start Threshold Voltage
versus Ambient Temperature
VUVLOrise (V)
IQSLEEP (μA)
VIN Input Sleep Mode Current
versus Ambient Temperature
10 20 30 40 50 60 70 80 90 100 110
4.40
4.35
4.30
4.25
4.20
4.15
4.10
4.05
4.00
-50 -40 -30 -20 -10 0
Temperature (°C)
Temperature (°C)
VIN UVLO Stop Threshold Voltage
versus Ambient Temperature
VUVLOfall (V)
fSW (MHz)
Switching Frequency
versus Ambient Temperature
2.20
2.15
2.10
2.05
2.00
1.95
1.90
1.85
1.80
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
3.70
3.69
3.68
3.67
3.66
3.65
3.64
3.63
3.62
3.61
3.60
-50 -40 -30 -20 -10 0
Temperature (°C)
OVP Pin Overvoltage Threshold
versus Ambient Temperature
8.4
8.3
VOVP(th) (V)
IOVPH (μA)
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
OVP Pin Sense Current
versus Ambient Temperature
210
208
206
204
202
200
198
196
194
192
190
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
8.2
8.1
8.0
7.9
7.8
7.7
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
7.6
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
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115 Northeast Cutoff
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
1000
995
990
985
980
975
970
965
960
ISET to LED Current Gain
versus Ambient Temperature
LED to LED Matching Accuracy
-50 -40 -30 -20 -10 0
versus Ambient Temperature
0.5
$LEDx (%)
AISET
A8515
0.3
0.1
-0.1
-0.3
-0.5
10 20 30 40 50 60 70 80 90 100 110
-50 -40 -30 -20 -10 0
Temperature (°C)
Input Disconnect Switch Gate to Source Voltage
-6.3
120.0
-6.4
119.8
-6.5
VGS (V)
ILED (mA)
Temperature (°C)
LED Current versus Ambient Temperature
ISET = 120 μA
120.2
119.6
119.4
versus Ambient Temperature
-6.6
-6.7
-6.8
119.2
119.0
10 20 30 40 50 60 70 80 90 100 110
-50 -40 -30 -20 -10 0
-6.9
10 20 30 40 50 60 70 80 90 100 110
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
Temperature (°C)
LED Current Setpoint Accuracy
versus Ambient Temperature
VSENSE Pin Sink Current
versus Ambient Temperature
20.8
1.2
20.7
1.0
IADJ (μA)
ErrLED (%)
20.6
0.8
0.6
0.4
20.5
20.4
20.3
20.2
0.2
0
-50 -40 -30 -20 -10 0
20.1
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
20.0
-50 -40 -30 -20 -10 0
10 20 30 40 50 60 70 80 90 100 110
Temperature (°C)
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Efficiency for Various LED Configura ons
ILED = 80 mA, LED Vf ≈ 3.2 V
Efficiency (%)
100
95
90
85
2 strings, 6 series LEDs each
80
2 strings, 7 series LEDs each
75
2 strings, 8 series LEDs each
70
65
60
5.5
7.0
8.5
10.0 11.5 13.0 14.5 16.0
Input Voltage, VIN (V)
Efficiency for Various LED Configura ons
ILED = 100 mA, LED Vf ≈ 3.2 V
Efficiency (%)
100
95
90
85
2 strings, 6 series LEDs each
80
2 strings, 7 series LEDs each
75
2 strings, 8 series LEDs each
70
65
60
5.5
7.0
8.5
10.0 11.5 13.0 14.5 16.0
Input Voltage, VIN (V)
Efficiency for Various LED Configura ons
ILED = 120 mA, LED Vf ≈ 3.2 V
Efficiency (%)
100
95
90
85
2 strings, 6 series LEDs each
80
2 strings, 7 series LEDs each
75
2 strings, 8 series LEDs each
70
65
60
5.5
7.0
8.5
10.0 11.5 13.0 14.5 16.0
Input Voltage, VIN (V)
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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Functional Description
The A8515 incorporates a current-mode boost controller with
internal DMOS switch, and two LED current sinks. It can be
used to drive two LED strings of up to 12 white LEDs in series,
with current up to 120 mA per string. For optimal efficiency, the
output of the boost stage is adaptively adjusted to the minimum
voltage required by both LED strings. This is expressed by the
following equation:
VOUT = max ( VLED1 , VLED2 ) + VREG
(1)
where
VLEDx is the voltage drop across LED string 1 and 2, and
VREG is the regulation voltage of the LED current sinks (typically 0.72 V at the maximum LED current).
Enabling the IC
The IC turns on when a logic high signal is applied on the
EN/PWM pin with a minimum duration of tPWMH for the first
clock cycle, and the input voltage present on the VIN pin is
greater than the 4.35 V necessary to clear the UVLO (VUVLOrise )
threshold. The power-up sequence is shown in figure 2. Before
the LEDs are enabled, the A8515 driver goes through a system
check to determine if there are any possible fault conditions that
might prevent the system from functioning correctly. Also, if the
FSET pin is pulled low, the IC will not power-up. More information on the FSET pin can be found in the Sync section of this
datasheet.
Powering up: LED pin short-to-GND check
The VIN pin has a UVLO function that prevents the A8515 from
powering-up until the UVLO threshold is reached. After the
VIN pin goes above UVLO, and a high signal is present on the
EN/PWM pin, the IC proceeds to power-up. As shown in figure
3, at this point the A8515 enables the disconnect switch and
checks if any LED pins are shorted to GND and/or are not used.
If an LEDx pin is shorted to ground the A8515 will not proceed
with soft start until the short is removed from the LEDx pin. This
prevents the A8515 from powering-up and putting an uncontrolled amount of current through the LEDs. The various detect
scenarios are presented on the next page, in figures 4A to 4C.
The LED detect phase starts when the GATE voltage of the
disconnect switch is equal to VIN – 4.5 V. After the voltage
threshold on the LEDx pins exceeds 120 mV, a delay of between
3000 and 4000 clock cycles is used to determine the status of the
pins. Thus, the LED detection duration varies with the switching
frequency, as shown in the following table:
Switching Frequency
(MHz)
Detection Time
(ms)
2
1.5 to 2
1
3 to 4
0.800
3.75 to 5
0.600
5 to 6.7
GATE = VIN – 4.5 V
VDD
GATE
C1
FSET
C1
LEDx
LED detection period
C2
C2
ISET
C3
ISET
EN/PWM
C3
C4
C4
t
Figure 2. Power-up diagram; shows VDD (ch1, 2 V/div.), FSET (ch2,
1 V/div.), ISET (ch3, 1 V/div.), and EN/PWM (ch4, 2 V/div.) pins, 200 μs/div.
EN/PWM
t
Figure 3. Power-up diagram; shows the relationship of an LEDx pin with
respect to the gate voltage of the disconnect switch (if used) during the
LED detect phase, as well as the duration of the LED detect phase for a
switching frequency of 2 MHz; shows GATE (ch1, 5 V/div.), ILED (ch2,
500 mV/div.), ISET (ch3, 1 V/div.), and EN/PWM (ch4, 5 V/div.) pins,
500 μs/div.
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11
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
The LED pin detection voltage thresholds are as follows:
LED Pin Voltage
LED Pin Status
<70 mV
Short-to-GND
Power-up is halted
150 mV
Not used
LED removed from operation
>325 mV
LED pin in use
None
A8515
A8515
Action
LED1
GND
All unused pins should be connected with a 1.54 kΩ resistor to
GND, as shown in figure 5. The unused pin, with the pull-down
resistor, will be taken out of regulation at this point and will not
contribute to the boost regulation loop.
LED1
LED2
GND
Figure 5. Channel select setup: (left) using only channel LED1,
(right) using both channels.
LED1
LED1
LED detection period
C1
LED2
1.54 kΩ
LED detection period
C1
C2
LED2
LED2
C2
C3
ISET
ISET
C3
C4
EN/PWM
EN/PWM
C4
t
t
4A. An LED detect occurring when both LED pins are selected to be used;
shows LED1 (ch1, 500 mV/div.), LED2 (ch2, 500 mV/div.), ISET (ch3,
1 V/div.), and EN/PWM (ch4, 5 V/div.) pins, 500 μs/div.
4B. Example with LED2 pin not being used; the detect voltage is
about 150 mV; shows LED1 (ch1, 500 mV/div.), LED2 (ch2, 500 mV/div.),
ISET (ch3, 1 V/div.), and EN/PWM (ch4, 5 V/div.) pins, 500 μs/div.
Short removed
Pin shorted
LED1
C1
LED2
C2
ISET
C3
C4
EN/PWM
t
4C. Example with one LED shorted to GND. The IC will not proceed with powerup until the shorted LED pin is released, at which point the LED is checked to
see if it is being used; shows LED1 (ch1, 500 mV/div.), LED2 (ch2, 500 mV/div.),
ISET (ch3, 1 V/div.), and EN/PWM (ch4, 5 V/div.) pins, 1 ms/div.
.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Inrush current caused by
enabling the disconnect
switch (when used)
Soft start function
During soft start the LEDx pins are set to sink (ILEDSS) and the
boost switch current is reduced to the ISWSS(LIM) level to limit the
inrush current generated by charging the output capacitors. When
the converter senses that there is enough voltage on the LED pins
the converter proceeds to increase the LED current to the preset
regulation current and the boost switch current limit is switched
to the ISW(LIM) level to allow the A8515 to deliver the necessary
output power to the LEDs. This is shown in figure 7.
Frequency selection
The switching frequency on the boost regulator is set by the resistor connected to the FSET pin, and the switching frequency can
be can be anywhere from 580 kHz to 2.3 MHz. Figure 6 shows
the typical switching frequencies, in MHz, for given resistor
values, in kΩ.
If during operation a fault occurs that will increase the switching frequency, the FSET pin is clamped to a maximum switching
frequency of no more than 3.5 MHz. If the FSET pin is shorted
to GND the part will shut down. For more details see the Fault
Mode table later in this section.
Sync
The A8515 can also be synchronized using an external clock on
the SYNC pin. Figure 8 shows the correspondence of a sync signal and the FSET pin, and figure 9 shows the result when a sync
signal is detected: the LED current does not show any variation
while the frequency changeover occurs. At power-up if the FSET
pin is held low, the IC will not power-up. Only when the FSET
pin is tri-stated to allow for the pin to rise, to about 1 V, or when a
sync clock is detected, will the A8515 try to power-up.
Operation during
ISWSS(lim)
C1
IOUT
C2
IIN
Normal operation
ISW(lim)
C3
VOUT
C4
EN/PWM
t
Figure 7. Startup diagram showing the input current, output voltage, and
output current; shows IOUT (ch1, 200 mA/div.), IIN (ch2, 1 A/div.), VOUT
(ch3, 20 V/div.), and EN/PWM (ch4, 5 V/div.), 1 ms/div.
VOUT
C1
ILED
C2
C3
FSET
SW node
C4
t
Figure 8. Diagram showing a synchronized FSET pin and switch node;
shows VOUT (ch1, 20 V/div.), ILED (ch2, 200 mA/div.), FSET (ch3, 2 V/div.),
and SW node (ch4, 20 V/div.), 2 μs/div.
VOUT
fSW (MHz)
C1
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
ILED
C2
C3
FSET
2 MHz operation
1 MHz operation
SW node
10.0
12.5
15.0
17.5
20.0
22.5
25.0
30.0
32.5
35.0
Resistance for RSET (kΩ)
C4
t
Figure 6. Typical Switching Frequency versus value of RFSET resistor.
Figure 9. Transition of the SW waveform when the SYNC pulse is
detected. The A8515 switching at 2 MHz, applied SYNC pulse at 1 MHz;
shows VOUT (ch1, 20 V/div.), ILED (ch2, 200 mA/div.), FSET (ch3, 2 V/div.),
and SW node (ch4, 20 V/div.), 5 μs/div.
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13
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
The basic requirement of the sync signal is 150 ns minimum ontime and 150 ns minimum off time, as indicated by the specifications for tPWSYNCON and tPWSYNCOFF . Figure 9 shows the timing
for a synchronization clock into the A8515 at 2.2 MHz. Thus any
pulse with a duty cycle of 33% to 66% at 2.2 MHz can be used to
synchronize the IC. The rise and fall edges should be about 10 ns.
The SYNC pulse duty cycle ranges for selected switching frequencies are:
SYNC Pulse Frequency
(MHz)
Duty Cycle Range
(%)
2.2
2
LED current setting and LED dimming
The maximum LED current can be up to 120 mA per channel,
and is set through the ISET pin. To set the ILED current, connect
a resistor, RISET, between this pin and GND, according to the following formula:
(2)
RISET = 980 / ILED
where ILED is in A and RISET is in Ω. This sets the maximum current through the LEDs, referred to as the 100% current. Standard
RISET values, at gain equals 980, are as follows:
33 to 66
Standard Closest RISET
Resistor Value
(kΩ)
LED current per LED, ILED
(mA)
30 to 70
8.25
120
1
15 to 85
9.76
100
0.800
12 to 88
12.1
80
9 to 91
15.0
65
0.600
If during operation a sync clock is lost, the IC will revert to the
preset switching frequency that is set by the resistor RFSET. During this period the IC will stop switching for a maximum period
of about 7 μs to allow the sync detection circuitry to switch
over to the externally preset switching frequency. If the clock is
held low for more than 7 μs, the A8515 will shut down. In this
shutdown mode the IC will stop switching, the input disconnect
switch is open, and the LEDs will stop sinking current. To shutdown the IC into low power mode, the user needs to disable the
IC using the EN/PWM pin, by keeping the pin low for a period
of 65 ms. If the FSET pin is released at any time after 5 μs, the
A8515 will proceed to soft start.
t PWSYNCON
PWM dimming
The LED current can be reduced from the 100% current level
by PWM dimming using the EN/PWM pin. When the EN/PWM
pin is pulled high, the A8515 turns on and all enabled LEDs sink
100% current. When EN/PWM is pulled low, the boost converter
and LED sinks are turned off. The compensation (COMP) pin is
floated, and critical internal circuits are kept active. The typical
PWM dimming frequencies fall between 200 Hz and 1 kHz. Figures 12A to 12D provide examples of PWM switching behavior.
Another important feature of the A8515 is the PWM signal to
LED current delay. This delay is typically less than 500 ns, which
allows greater accuracy at low PWM dimming duty cycles, as
shown in figure 11.
10
154 ns
150 ns
t PWSYNCOFF
T = 454 ns
Figure 10. SYNC pulse on and off time requirements.
ErrLED (%)
8
150 ns
Worst-case
6
Typical
4
2
0
0.1
1
10
100
PWM Duty Cycle, D (%)
Figure 11. Percentage Error of the LED current versus PWM duty cycle
(at 200 Hz PWM frequency).
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
C2
VOUT
VOUT
COMP
COMP
EN/PWM
C1
C3
C2
EN/PWM
C1
C3
C4
C4
ILED
ILED
t
t
Figure 12A. Typical PWM diagram showing VOUT, ILED, and COMP pin as
well as the EN/PWM signal. PWM dimming frequency is 500 Hz at 50%
duty cycle; shows VOUT (ch1, 10 V/div.), COMP (ch2, 2 V/div.), EN/PWM
(ch3, 5 V/div.), and ILED (ch4, 100 mA/div.), 500 μs/div.
Figure 12B. Typical PWM diagram showing VOUT, ILED, and COMP pin as
well as the EN/PWM signal. PWM dimming frequency is 500 Hz at 1%
duty cycle ; shows VOUT (ch1, 10 V/div.), COMP (ch2, 2 V/div.), EN/PWM
(ch3, 5 V/div.), and ILED (ch4, 100 mA/div.), 500 μs/div.
EN/PWM
C1
EN/PWM
C1
ILED
ILED
C2
C2
t
Figure 12C. Delay from rising edge of EN/PWM signal to LED current;
shows EN/PWM (ch1, 2 V/div.), and ILED (ch2, 50 mA/div.), 200 ns/div.
t
Figure 12D. Delay from falling edge of EN/PWM signal to LED current turn
off; shows EN/PWM (ch1, 2 V/div.), and ILED (ch2, 50 mA/div.), 200 ns/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
APWM pin
The APWM pin is used in conjunction with the ISET pin. This is
a digital signal pin that internally adjusts the ISET current. The
typical input signal frequency is between 20 kHz and 1 MHz. The
duty cycle of this signal is inversely proportional to the percentage of current that is delivered to the LEDs (figure 14). As an
example, a system that delivers a full LED current of 120 mA per
LED would deliver 90 mA of current per LED when an APWM
signal is applied with a duty cycle of 25%. When this pin is not
used it should be tied to GND.
A8515
ISET
ISET
Current
Mirror
Current
Adjust
EN/PWM
LED
Driver
Figure 13. Simplified block diagram of the APWM ISET block.
150
–15
100
–10
ErrLED (%)
IOUT (mA)
To use this pin for a trim function, the user should set the maximum output current to a value higher than the required current by
at least 5%. The LED ISET current is then trimmed down to the
APWM
50
–5
0
0
0
20
40
60
80
0
100
Figure 14. Output current versus duty cycle; 200 kHz APWM signal.
20
40
60
80
100
PWM Duty Cycle, D (%)
PWM Duty Cycle, D (%)
Figure 15. Percentage Error of the LED current versus PWM duty cycle;
200 kHz APWM signal.
ILED
ILED
C1
C1
APWM
APWM
C2
C3
C2
EN/PWM
t
Figure 16. Diagram showing the transition of LED current from 120 mA
to 90 mA, when a 25% duty cycle signal is applied to the APWM pin;
EN/PWM = 1; shows ILED (ch1, 50 mA/div.), APWM (ch2, 5 V/div.), and
EN/PWM (ch3, 5 V/div.), 500 μs/div.
C3
EN/PWM
t
Figure 17. Diagram showing the transition of LED current from 90 mA
to 120 mA, when a 25% duty cycle signal is removed from the APWM pin.
EN/PWM = 1; shows ILED (ch1, 50 mA/div.), APWM (ch2, 5 V/div.), and
EN/PWM (ch3, 5 V/div.), 500 μs/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
appropriate value. Another consideration that also is important is
the limitation of the user APWM signal duty cycle. In some cases
it might be preferable to set the maximum ISET current to be
25% to 50% higher, thus allowing the APWM signal to have duty
cycles that are between 25% and 50%.
is controlled by the following formula:
Although the APWM dimming function has a wide frequency
range, if this function is used strictly as an analog dimming
function it is recommended to use frequency ranges between
50 and 500 kHz for best accuracy. The frequency range must be
considered only if the user is not using this function as a closed
loop trim function. Another limitation is that the propagation
delay between this APWM signal and IOUT takes several milliseconds to change the actual LED current. This effect is shown in
figures 16 through 18.
When the DAC voltage is equal to VISET , the internal reference,
there is no current through RISET . When the DAC voltage starts
to decrease, the ISET current starts to increase, thus increasing
the LED current. When the DAC voltage is 0 V, the LED current
will be at its maximum.
Analog dimming
The A8515 can also be dimmed by using an external DAC or
another voltage source applied either directly to the ground side
of the RISET resistor or through an external resistor to the ISET
pin (see figure 19).
• For a single resistor (upper panel of figure 19), the ISET current
ISET =
VISET – VDAC
RISET – VDAC
(3)
Where VISET is the ISET pin voltage and VDAC is the DAC output voltage.
• For a dual-resistor configuration (lower panel of figure 19), the
ISET current is controlled by the following formula:
ISET =
VISET
VDAC – VISET
–
RISET
R1
(4)
The advantage of this circuit is that the DAC voltage can be
higher or lower, thus adjusting the LED current to a higher or
lower value of the preset LED current set by the RISET resistor:
▫ VDAC = 1.003 V; the output is strictly controlled by RISET
▫ VDAC > 1.003 V; the LED current is reduced
▫ VDAC < 1.003 V; the LED current is increased
DAC
R ISET
VDAC
A8515
ISET
GND
GND
C1
IOUT
APWM
DAC
C2
R1
VDAC
GND
C3
A8515
ISET
R ISET
GND
EN/PWM
t
Figure 18. Transition of output current level when a 50% duty cycle signal
is applied to the APWM pin, in conjunction with a 50% duty cycle PWM
dimming being applied to the EN/PWM pin; shows IOUT (ch1, 100 mA/div.),
APWM (ch2, 5 V/div.), and EN/PWM (ch3, 5 V/div.), 1 ms/div.
Figure 19. Simplified diagrams of voltage control of ILED: typical
applications using a DAC to control ILED using a single resistor (upper),
and dual resistors (lower).
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
LED short detect
Both LEDx pins are capable of handling the maximum VOUT that
the converter can deliver, thus providing protection from the LED
pin to VOUT in the event of a connector short.
An LED pin that has a voltage exceeding VLEDSC will be
removed from operation (see figure 20). This is to prevent the IC
from dissipating too much power by having a large voltage present on an LEDx pin.
199 μA typical, the OVP comparator goes low and the boost stops
switching.
The following equation can be used to determine the resistance
for setting the OVP level:
where:
ROVP = ( VOUTovp – VOVP(th) ) / IOVPH
(5)
VOUTovp is the target overvoltage level,
ROVP is the value of the external resistor, in Ω,
While the IC is being PWM-dimmed, the IC rechecks the disabled LED every time the EN/PWM signal goes high, to prevent
false tripping of an LED short event. This also allows some selfcorrection if an intermittent LED pin short-to-VOUT is present.
VOVP(th) is the pin OVP trip point found in the Electrical Characteristics table, and
IOVPH is the current into the OVP pin.
Overvoltage protection
The A8515 has overvoltage protection (OVP) and open Schottky
diode protection. The OVP protection has a default level of 8 V
and can be increased up to 55 V by connecting ROVP between the
OVP pin and VOUT . When the current into the OVP pin exceeds
There are several possibilities for why an OVP condition would
be encountered during operation, the two most common being: a
disconnected output, and an open LED string. Examples of these
are provided in figures 21 and 22.
IOUT
C1
LED1
C2
EN/PWM
C3
t
Figure 20. Example of the disabling of an LED string when the LED pin
voltage is increased above 4.6 V; shows IOUT (ch1, 200 mA/div.), LED1
(ch2, 5 V/div.), and EN/PWM (ch3, 5 V/div.), 10 μs/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Figure 21 illustrates when the output of the A8515 is disconnected from load during normal operation. The output voltage
instantly increases up to OVP voltage level and then the boost
stops switching to prevent damage to the IC. If the output is
drained off, eventually the boost might start switching for a short
duration until the OVP threshold is hit again.
Figure 22 displays a typical OVP event caused by an open LED
string. After the OVP condition is detected, the boost stops
switching, and the open LED string is removed from operation.
Afterwards VOUT is allowed to fall, and eventually the boost will
resume switching and the A8515 will resume normal operation.
A8515 also has built-in secondary overvoltage protection to
protect the internal switch in the event of an open diode condi-
Output disconnect
event detected
tion. Open Schottky diode detection is implemented by detecting
overvoltage on the SW pin of the device. If voltage on the SW
pin exceeds the device safe operating voltage rating, the A8515
disables and remains latched. To clear this fault, the IC must be
shut down either by using the EN/PWM signal or by going below
the UVLO threshold on the VIN pin. Figure 23 illustrates this.
As soon as the switch node voltage (SW) exceeds 60 V, the IC
shuts down. Due to small delays in the detection circuit, as well
as there being no load present, the switch node voltage will rise
above the trip point voltage.
Figure 24 illustrates when the A8515 is being enabled during an
open diode condition. The IC goes through all of its initial LED
detection and then tries to enable the boost, at which point the
open diode is detected.
LED string open
condition detected
VOUT
VOUT
SW node
C2
SW node
C2
C3
C3
EN/PWM
C1
EN/PWM
C1
ILED
C4
ILED
C4
t
t
Figure 21. OVP protection in an output disconnect event; shows VOUT
(ch1, 10 V/div.), SW node (ch2, 50 V/div.), EN/PWM (ch3, 5 V/div.), and
ILED (ch4, 200 mA/div.), 1 ms/div.
Figure 22. OVP protection in an open LED string event; shows VOUT
(ch1, 10 V/div.), SW node (ch2, 50 V/div.), EN/PWM (ch3, 5 V/div.), and
ILED (ch4, 200 mA/div.), 500 μs/div.
Open diode
condition detected
EN/PWM
C1
Open diode
condition detected
EN/PWM
C1
SW node
SW node
C2
C2
VOUT
VOUT
C3
ILED
C3
C4
ILED
C4
t
Figure 23. OVP protection in an open Schottky diode event, while the IC is
in normal operation; shows EN/PWM (ch1, 5 V/div.), SW node (ch2, 50 V/
div.), VOUT (ch3, 20 V/div.), and ILED (ch4, 200 mA/div.), 1 μs/div.
t
Figure 24. OVP protection when the IC is enabled during an open diode
condition; shows EN/PWM (ch1, 5 V/div.), SW node (ch2, 50 V/div.), VOUT
(ch3, 10 V/div.), and ILED (ch4, 200 mA/div.), 500 μs/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Boost switch overcurrent protection
The boost switch is protected with cycle-by-cycle current limiting
set at a minimum of 3.0 A. There is also a secondary current limit
that is sensed on the boost switch. When detected this current
limit immediately shuts down the A8515. The level of this cur-
rent limit is set above the cycle-by-cycle current limit to protect
the switch from destructive currents when the boost inductor is
shorted. Various boost switch overcurrent conditions are shown in
figures 25 through 27.
SW node
C1
C1
SW node
C2
IL
IL
VOUT
VOUT
C2
EN/PWM
C3
C4
EN/PWM
C3
C4
t
t
Figure 25. Normal operation of the switch node (SW); inductor current
(IL) and output voltage (VOUT) for 9 series LEDs in each of 2 strings
configuration; shows SW node (ch1, 20 V/div.), IL (ch2, 1 A/div.), VOUT
(ch3, 10 V/div.), and EN/PWM (ch4, 5 V/div.), 2 μs/div.
Figure 26. Cycle-by-cycle current limiting; inductor current (yellow trace,
IL), note reduction in output voltage as compared to normal operation with
the same configuration (figure 25); shows SW node (ch1, 20 V/div.), IL
(ch2, 1 A/div.), VOUT (ch3, 10 V/div.), and EN/PWM (ch4, 5 V/div.), 2 μs/div.
EN/PWM
C1
FAULT
C2
C3
SW node
IL
C4
t
Figure 27. Secondary boost switch current limit; when this limit is hit, the
A8515 immediately shuts down; shows EN/PWM (ch1, 5 V/div.), VOUT
(ch2, 5 V/div.), SW node (ch3, 50 V/div.), and IL (ch4, 2 A/div.), 100 ns/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Input overcurrent protection and disconnect switch
The primary function of the input disconnect switch is to protect
the system and the device from catastrophic input currents during
a fault condition. The external circuit implementing the disconnect is shown in figure 28. If the input disconnect switch is not
used, the VSENSE pin must be tied to VIN and the GATE pin
must be left open.
When selecting the external PMOS, check for the following
parameters:
• Drain-source breakdown voltage V(BR)DSS > –40 V
• Gate threshold voltage (make sure it is fully conducting at
VGS = -4 V, and cut-off at –1 V)
• RDS(on): Make sure the on-resistance is rated at VGS = -4.5 V or
similar, not at -10 V; derate it for higher temperature
If the input current level goes above VSENSETRIP of the preset current limit threshold, the A8515 will shut down in less than 3 μs
regardless of user input (see figure 29). This is a latched condition. The Fault flag is also set to indicate a fault. This feature is
VIN
meant to prevent catastrophic failure in the system due to a short
of the inductor to GND.
Setting the current sense resistor
The typical threshold for the current sense circuit is 180 mV,
when RADJ is 0 Ω. This voltage can be trimmed by the RADJ
resistor. The typical trip point should be set at about 3 A, which
coincides with the cycle-by-cycle current limit minimum threshold. A sample calculation is done below:
Given: 2.85 A of input current, and the calculated maximum
value of the sense resistor, RSC = 0.063 Ω.
The RSC chosen is 0.056 Ω, a standard.
Also:
RADJ = (VSENSETRIP – VADJ ) / IADJ
(6)
The trip point voltage is calculated as:
VADJ = 2.85 A × 0.056 Ω = 0.160 V
RADJ = (0.180 – 0.160 V) / (20.3 μA) = 1.0 kΩ
FAULT
RSC
Q1
C1
RADJ
GATE
VSENSE
VIN
A8515
C2
A8515 shuts down
GATE
IIN
Figure 28. Typical circuit showing the implementation of the input
disconnect feature.
C3
C4
EN/PWM
t
Figure 29. Typical secondary overcurrent fault condition. IIN is the input
current through the switch. When the current limit is reached the A8515
¯ĀŪ¯L̄¯T̄
¯ (ch1,
disables the gate of the disconnect switch (GATE); shows F̄
5 V/div.), GATE (ch2, 10 V/div.), IIN (ch3, 2 A/div.), and EN/PWM (ch4, 5 V/
div.), 5 ms/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Input UVLO
When VIN and VSENSE rise above the VUVLOrise threshold, the
A8515 is enabled. A8515 is disabled when VIN falls below the
VUVLOfall threshold for more than 50 μs. This small delay is used
to avoid shutting down because of momentary glitches in the
input power supply. When VIN falls below 4.35 V, the IC will
shut down (see figure 30).
VDD
The VDD pin provides regulated bias supply for internal circuits.
Connect the capacitor CVDD with a value of 0.1 μF or greater to
this pin. The internal LDO can deliver no more than 2 mA of current with a typical VDD of about 3.5 V, enabling this pin to serve
¯T̄
¯ pin.
as the pull-up voltage for the F̄¯Ā¯Ū¯L̄
Shutdown
If the EN/PWM pin is pulled low for more than tPWML , the
device enters shutdown mode and clears all internal fault registers. As an example, at a 2 MHz clock frequency, it will take
approximately 16.3 ms to shut down the IC into the low power
mode (figure 31). When the A8515 is shut down, the IC will dis-
able all current sources and wait until the EN/PWM signal goes
high to re-enable the IC. If faster shut down is required the FSET
pin can be used.
Fault protection during operation
The A8515 constantly monitors the state of the system to determine if any fault conditions occur during normal operation. The
response to a triggered fault condition is summarized in the Fault
Mode table, on the next page.
The possible fault conditions that the device can detect are: Open
LED pin, LED pin shorted to GND, shorted inductor, VOUT short
to GND, SW pin shorted to GND, ISET pin shorted to GND, and
input disconnect switch source shorted to GND.
Note the following:
• Some of the protection features might not be active during
startup, to prevent false triggering of fault conditions.
• Some of these faults will not be protected if the input
disconnect switch is not being used. An example of this is
VOUT short to ground.
GATE
C1
VIN
C2
IOUT
C1
C2
IOUT
VDD
C3
VDD
C3
EN/PWM
C4
EN/PWM
C4
t
Figure 30. Shutdown showing a falling input voltage (VIN); shows VIN
(ch1, 2 V/div.), IOUT (ch2, 200 mA/div.), VDD (ch3, 5 V/div.), and EN/PWM
(ch4, 2 V/div.), 5 ms/div.
t
Figure 31. Shutdown using the enable function, showing the 16 ms
delay between the EN/PWM signal and when the VDD and GATE of
the disconnect switch turns off; shows GATE (ch1, 10 V/div.), IOUT (ch2,
200 mA/div.), VDD (ch3, 5 V/div.), and EN/PWM (ch4, 2 V/div.), 5 ms/div.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Fault Mode Table
Fault Name
Type
Active
Fault
Flag
Set
Primary switch
overcurrent protection
(cycle-by-cycle
current limit)
Auto-restart
Always
No
This fault condition is triggered by the cycle-bycycle current limit, ISW(LIM). Prevents current in
inductor from exceeding ISW(LIM) 3.38 A (Typical).
Secondary switch
current limit
Input disconnect
current limit
Secondary OVP
LED Pin Short
Protection
LED Pin open
ISET Short Protection
Latched
Latched
Latched
Auto-restart
Auto-restart
Auto-restart
Always
Always
Always
Startup
Normal
Operation
Always
Boost
Disconnect
switch
Sink
driver
Off for
a single
cycle
On
On
Yes
When the current through the boost switch exceeds
secondary current SW limit (ISW(LIM2)) the device
immediately shuts down the disconnect switch,
LED drivers, and boost. The Fault flag is set. To reenable the device, the EN/PWM pin must be pulled
low for 32750 clock cycles.
Off
Off
Off
Yes
The device is immediately shut off if the voltage
across the input sense resistor goes above
VSENSETRIP . The Fault flag is set. To re-enable the
device the EN/PWM pin must be pulled low for
32750 clock cycles.
Off
Off
Off
Yes
Secondary overvoltage protection is used for open
diode detection. When diode D1 opens, the SW pin
voltage will increase until VOVP(SEC) is reached. This
fault latches the IC. The input disconnect switch is
disabled as well as the LED drivers, and the Fault
flag is set. To re-enable the part the EN/PWM pin
must be pulled low for 32750 clock cycles.
Off
Off
Off
No
This fault prevents the device from starting-up if
any of the LEDx pins are shorted. The device stops
soft-start from starting while any of the LED pins
are determined to be shorted. Once the short is
removed, soft-start is allowed to start.
Off
On
Off
No
When an LED pin is open the device will determine
which LED pin is open by increasing the output
voltage until OVP is reached. Any LED string not
in regulation will be turned off. The device will then
go back to normal operation by reducing the output
voltage to the appropriate voltage level.
On
On
Off for
open
pins.
On
for all
others.
No
This fault occurs when the ISET current goes above
150% of the maximum current. The boost will stop
switching and the IC will disable the LED sinks until
the fault is removed. When the fault is removed the
IC will try to regulate to the preset LED current.
Off
On
Off
Description
Continued on the next page…
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Fault Mode Table (continued)
Fault Name
FSET Short Protection
Overvoltage
Protection
Type
Auto-restart
Auto-restart
Active
Always
Always
Fault
Flag
Set
Description
Boost
Disconnect
Switch
Sink
driver
Off
Off
Off
Stop
during
OVP
event.
On
On
Yes
Fault occurs when the FSET current goes above
150% of maximum current. The boost will stop
switching, the disconnect switch will turn off and
the IC will disable the LED sinks until the fault is
removed. When the fault is removed the IC will try
to restart with soft-start.
No
Fault occurs when OVP pin exceeds VOVP(th)
threshold. The A8515 will immediately stop
switching to try to reduce the output voltage. If the
output voltage decreases then the A8515 will restart
switching to regulate the output voltage.
On
On
Off for
shorted
pins.
On
for all
others.
LED Short Protection
Auto-restart
Always
No
Fault occurs when the LED pin voltage exceeds
5.1 V. When the LED short protection is detected
the LED string above the threshold will be removed
from operation.
Overtemperature
Protection
Auto-restart
Always
No
Fault occurs when the die temperature exceeds the
overtemperature threshold, typically 165°C.
Off
Off
Off
VIN UVLO
Auto-restart
Always
No
Fault occurs when VIN drops below VUVLO , typically
3.90 V. This fault resets all latched faults.
Off
Off
Off
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Applications Information
Then the OVP resistor is:
Design Example for Boost Configuration
This section provides a method for selecting component values
when designing an application using the A8515. The resulting
design is diagramed in figure 32.
Assumptions: For the purposes of this example, the following are
given as the application requirements:
• VBAT: 10 to 14 V
• Quantity of LED channels, #CHANNELS : 2
• Quantity of series LEDs per channel, #SERIESLEDS : 10
ROVP = (VOUT(OVP) – VOVP(th) ) / IOVPH
= (38.72 V – 8.1 V) / 199 μA = 154 kΩ
where both IOVPH and VOVP(th) are taken from the Electrical
Characteristics table.
Chose a value of resistor that is higher value than the calculated
ROVP . In this case a value of 158 kΩ was selected. Below is the
actual value of the minimum OVP trip level with the selected
resistor:
VOUT(OVP) = 158 kΩ × 199 μA + 8.1 V = 39.5 V
• LED current per channel, ILED : 120 mA
• Vf at 120 mA: 3 to 3.6 V
Step 3b At this point a quick check must be done to see if the
conversion ratio is acceptable for the selected frequency.
• fSW : 2 MHz
• TA(max): 65°C
Dmaxofboost = 1 – tSWOFFTIME × fSW
• PWM dimming frequency: 200 Hz, 1% Duty cycle
(10)
= 1 – 1.5 × 47 ns × 2 MHz = 85.9%
where minimum off time (tSWOFFTIME) is found in the Electrical
Characteristics table.
Procedure: The procedure consists of selecting the appropriate
configuration and then the individual component values, in an
ordered sequence.
The Theoretical Maximum VOUT is then calculated as:
Step 1 Connect LEDs to pins LED1 and LED2.
VOUTthe(max) =
Step 2 Determining the LED current setting resistor RISET:
RISET = 1.003 × 980 / ILED
(9)
(7)
= 983 / 120 mA = 8.19 kΩ
=
Choose a 8.25 kΩ resistor.
VIN(min)
1 – Dmaxofboost
– Vd
(11)
10 V
– 0.4 = 70.5 V
1 – 0.859
Step 3 Determining the OVP resistor. The OVP resistor is
connected between the OVP pin and the output voltage of the
converter.
where Vd is the diode forward voltage. A good approximation of
efficiency η can be taken from the efficiency curves located in
this datasheet. A value of 90% is a good starting approximation.
Step 3a The first step is determining the maximum voltage
based on the LED requirements. Then this value and the regulation voltage (VLED) should be added together, as well as another
2 V to take noise and output ripple into consideration. The VLED
of the A8515 is 720 mV.
The Theoretical Maximum VOUT value must be greater than the
value VOUT(OVP) . If this is not the case, the switching frequency
of the boost converter must be reduced to meet the maximum
duty cycle requirements.
VOUT(OVP) = #SERIESLEDS × Vf + VLED + 2
= 10 × 3.6 V+ 2.0 V + 0.720 V
= 38.72 V
(8)
Step 4 Selecting the inductor. The inductor must be chosen such
that it can handle the necessary input current. In most applications, due to stringent EMI requirements, the system must operate
in continuous conduction mode throughout the whole input voltage range.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Step 4a Determining the duty cycle, calculated as follows:
D(max) = 1 –
VIN(min)
(12)
VOUT(OVP) + Vd
0.75 A > 0.21 A
A good inductor value to use would be 10 μH.
10 V
=1–
= 74.9%
39.5 + 0.4
Step 4b Determining the maximum and minimum input current
to the system. The minimum input current will dictate the inductor value. The maximum current rating will dictate the current
rating of the inductor. First, the maximum input current, given:
IOUT = #CHANNELS
= 2
(13)
ILED
Step 4d Double-check to make sure the ½ current ripple is less
than IIN(min):
IIN(min) > 1/2 ΔIL
(18)
Step 4e This step is used to verify that there is sufficient slope
compensation for the inductor chosen. The slope compensation
value is determined by the following formula:
3.6 fSW
Slope Compensation =
= 3.6 A /μs
(19)
2 10 6
Next insert the inductor value used in the design:
0.120 A = 0.240 A
ΔILused =
then:
IIN(max) =
IOUT
VOUT(OVP)
VIN(min)
(14)
H
39.5 V 240 mA
= 1.053 A
10 V 0.9
where η is efficiency.
=
Next, calculate minimum input current, as follows:
VOUT(OVP) IOUT
IIN(min) =
VIN(max) H
Required Slope (min) =
(16)
then:
=
(17)
D(max)
10 V
2 MHz
0.42 A
ΔILused 1 10 –6
1
(1 – D(max))
(21)
=
0.37 (A) 1 10 –6
1
(1 – 0.75)
2.0 (MHz)
= 2.97 A/μs
If the minimum required slope is greater than the calculated slope
compensation, the inductor value must be increased.
Note: The slope compensation value is in A/μs, and 1×10 –6 is a
constant multiplier.
Step 4f Determining the inductor current rating. The inductor
current rating must be greater than the IIN(max) value plus the
ripple current ΔIL, calculated as follows:
IL(max) = IIN(max) + 1/2 ΔILused
= 1.05 A × 0.4 = 0.42 A
VIN(min)
ΔIL fSW
10 (V) 0.75
= 0.37 A
10 (μH) 2.0 (MHz)
fSW
(15)
Step 4c Determining the inductor value. To ensure that the
inductor operates in continuous conduction mode, the value of
the inductor must be set such that the ½ inductor ripple current is
not greater than the average minimum input current. A first past
assumes Iripple to be 40% of the maximum inductor current:
L=
(20)
Calculate the minimum required slope:
39.5 V 240 mA
=
= 0.752 A
14 V 0.9
A good approximation of efficiency, η , can be taken from the
efficiency curves located in the diode datasheet. A value of 90%
is a good starting approximation.
ΔIL = IIN(max) × 0.4
=
VIN(min) D(max)
Lused fSW
0.749 = 8.9 μH
(22)
= 1.05 A + 0.37 A / 2 = 1.24 A
Step 5 Determining the resistor value for a particular switching
frequency. Use the RFSET values shown in figure 7. For example,
a 10 kΩ resistor will result in a 2 MHz switching frequency.
Step 6 Choosing the proper switching diode. The switching
diode must be chosen for three characteristics when it is used in
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
LED lighting circuitry. The most obvious two are: current rating
of the diode and reverse voltage rating.
The reverse voltage rating should be such that during operation
condition, the voltage rating of the device is larger than the maximum output voltage. In this case it is VOUT(OVP).
The peak current through the diode is calculated as:
Idp = IIN(max) + 1/2 ΔILused
Step 7 Choosing the output capacitors. The output capacitors
must be chosen such that they can provide filtering for both the
boost converter and for the PWM dimming function. The biggest
factors that contribute to the size of the output capacitor are:
PWM dimming frequency, and PWM duty cycle. Another major
contributor is leakage current ( ILK ). This current is the combination of the OVP leakage current as well as the reverse current of
the switching diode. In this design the PWM dimming frequency
is 200 Hz and the minimum duty cycle is 1%. Typically the voltage variation on the output (VCOUT) during PWM dimming must
be less than 250 mV, so that no audible hum can be heard. The
capacitance can be calculated as follows:
1 – D(min)
fPWM(dimming) V
COUT
= 200 μA
Corresponding capacitors include:
Vendor
Value
Part number
Murata
4.7 μF 50 V
GRM32ER71H475KA88L
Murata
2.2 μF 50 V
GRM31CR71H225KA88L
(23)
= 1.05 A + 0.37 A / 2 = 1.24 A
The third major component in deciding the switching diode is the
reverse current, IR , characteristic of the diode. This characteristic
is especially important when PWM dimming is implemented.
During PWM off-time the boost converter is not switching. This
results in a slow bleeding off of the output voltage, due to leakage
currents. IR can be a large contributor, especially at high temperatures. On the diode that was selected in this design, the current
varies between 1 and 100 μA.
COUT = ILK
4.7 μF 50 V capacitor is a good choice to fulfill this requirement.
The rms current through the capacitor is given by:
ICOUTrms = IOUT
= 0.240 A
0.37
12
1.05
1 – 0.75
0.75 +
(25)
= 0.42 A
The output capacitor must have a current rating of at least
420 mA. The capacitor selected in this design was a 4.7 μF 50 V
capacitor with a 1.5 A current rating.
Step 8 Selecting input capacitor. The input capacitor must be
selected such that it provides a good filtering of the input voltage
waveform. A good rule of thumb is to set the input voltage ripple
ΔVIN to be 1% of the minimum input voltage. The minimum
input capacitor requirements are as follows:
(24)
1 – 0.01
= 3.96 μF
200 Hz 0.250 V
∆ILused
IIN(max) 12
1 – D(max)
D(max) +
CIN =
=
∆ILused
8
8
(26)
fSW
∆VIN
0.37 A
= 0.23 μF
2 MHz 0.1 V
A capacitor larger than 3.96 μF should be selected due to degradation of capacitance at high voltages on the capacitor. A ceramic
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
The rms current through the capacitor is given by:
IINrms =
IOUT ×
Step 9 Choosing the input disconnect switch components. Set
the input disconnect current limit to 3 A by choosing a sense
∆ILused
IIN(max)
resistor. The calculated maximum value of the sense resistor is:
(27)
(1 – D(max)) 12
RSC(max) = VSENSEtrip / 3.0 A
0.37
0.240 ×
1.05
= 0.10 A
=
(1 – 0.75) 12
(28)
= 0.180 V / 3.0 A= 0.060 Ω
The RSC chosen is 0.056 Ω, a standard value.
A good ceramic input capacitor with ratings of 2.2 μF 50V or
4.7 μF 50 V will suffice for this application. Corresponding
capacitors include:
The trip point voltage must be:
VADJ = 3.0 A × 0.056 Ω = 0.168 V
RADJ = (VSENSEtrip – VADJ ) / IADJ
Vendor
Value
Part number
Murata
4.7 μF 50 V
GRM32ER71H475KA88L
Murata
2.2 μF 50 V
GRM31CR71H225KA88L
(29)
RADJ = (0.180 V – 0.168 V) / 20.3 μA = 591 Ω
A value of 590 Ω was selected for this design.
RSC
0.056 Ω
VIN 10 to 14 V
Q1
RADJ
590 Ω
CIN
2.2 μF / 50 V
VC
100 kΩ
CVDD
0.1 μF
D1
2 A / 60 V
L1
10 μH
GATE
VSENSE
VIN
VDD
PAD
ISET
RISET
8.25 kΩ
RFSET
10 kΩ
OVP
A8515
AGND
10 LEDs
each string
LED1
LED2
COMP
FSET
4.7 μF
50 V
ROVP
158 kΩ
SW
FAULT
EN/PWM
APWM
VOUT
PGND
CP
120 pF
RZ
150 Ω
CZ
0.47 μF
Figure 32. The schematic diagram showing calculated values from the design example above
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Wide Input Voltage Range, High Efficiency
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A8515
Design Example for SEPIC Configuration
This section provides a method for selecting component values
when designing an application using the A8515 in SEPIC (Single-Ended Primary-Inductor Converter) circuit. SEPIC topology
has the advantage that it can generate a positive output voltage
either higher or lower than the input voltage. The resulting design
is diagrammed in figure 33.
Assumptions: For the purposes of this example, the following are
given as the application requirements:
• VBAT: 6 to 14 V ( VIN(min): 5 V and VIN(max): 16 V )
• Quantity of LED channels, #CHANNELS : 2
of the A8515 is 720 mV. A constant term, 2 V, is added to give
margin to the design due to noise and output voltage ripple.
VOUT(OVP) = #SERIESLEDS × Vf + VLED + 2 (V)
(31)
= 4 × 3.3 (V) + 0.72 (V) + 2 (V) = 15.9 V
Then the OVP resistor is:
ROVP = (VOUT(OVP) – VOVP(th) ) / IOVPH
(32)
= (15.9 (V) – 8.1 (V)) / 0.199 (mA) = 39.196 kΩ
where both I OVPH and VOVP(th) are taken from the Electrical
Characteristics table.
In this case a value of 39.2 kΩ was selected. Below is the actual
value of the minimum OVP trip level with the selected resistor:
• Quantity of series LEDs per channel, #SERIESLEDS : 4
• LED current per channel, ILED : 120 mA
VOUT(OVP) = 39.2 (kΩ) × 0.199 (mA) + 8.1 (V) = 15.9 V
• LED Vf at 120 mA: ≈ 3.3 V
Step 3b At this point a quick check must be done to determine if
the conversion ratio is acceptable for the selected frequency.
• fSW : 2 MHz
• TA(max): 65°C
Dmax = 1 – tSWOFFTIME × fSW
• PWM dimming frequency: 200 Hz, 1% duty cycle
(33)
= 1 – 1.5 × 47 (ns) × 2 (MHz) = 85.9%
Procedure: The procedure consists of selecting the appropriate
configuration and then the individual component values, in an
ordered sequence.
Step 1 Connect LEDs to pins LED1 and LED2. If only one of
the LED channels is needed, the unused LEDx pin should be
pulled to ground using a 1.5 kΩ resistor.
where the minimum off-time (tSWOFFTIME) is found in the Electrical Characteristics table.
The Theoretical Maximum VOUT is then calculated as:
VOUT(max) = VIN(min)
Step 2 Determining the LED current setting resistor RISET:
RISET = (VISET × AISET) / ILED
(30)
= 5 (V)
Dmax
1 – Dmax
– Vd
(34)
0.86
– 0.4 (V) = 30.3 V
1 – 0.86
= (1.003 (V) × 980) / 0.120 (A) = 8.19 kΩ
Choose an 8.25 kΩ 1% resistor (or 16.2 kΩ if LED current is
60 mA/channel).
where Vd is the diode forward voltage.
Step 3 Determining the OVP resistor. The OVP resistor is
connected between the OVP pin and the output voltage of the
converter.
The Theoretical Maximum VOUT value must be greater than
the value VOUT(OVP) . If this is not the case, it may be necessary
to reduce the frequency to allow the boost to convert the voltage ratios.
Step 3a The first step is determining the maximum voltage
based on the LED requirements. The regulation voltage, VLED ,
Step 4 Selecting the inductor. The inductor must be chosen such
that it can handle the necessary input current. In most applica-
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Wide Input Voltage Range, High Efficiency
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A8515
tions, due to stringent EMI requirements, the system must operate
in continuous conduction mode throughout the whole input voltage range.
Step 4a Determining the duty cycle, calculated as follows:
D(max) =
=
VOUT(OVP) + Vd
VIN(min) + VOUT(OVP) + Vd
(35)
= 2
(40)
0.765 = 7.53 μH
than IIN(min):
Step 4b Determining the maximum and minimum input current
to the system. The minimum input current will dictate the inductor value. The maximum current rating will dictate the current
rating of the inductor. First, the maximum input current, given:
ILED
VIN(min)
D(max)
ΔIL fSW
5 (V)
=
0.254 (A) 2 (MHz)
L=
Step 4d Double-check to make sure the ½ current ripple is less
15.9 (V) + 0.4 (V)
= 76.5%
5 (V) + 15.9 (V) + 0.4 (V)
IOUT = #CHANNELS
then:
(36)
IIN(min) > 1/2 ΔIL
(41)
0.265 A > 0.127 A
A good inductor value to use would be 10 μH.
Step 4e Next insert the inductor value used in the design to
determine the actual inductor ripple current:
120 (mA) = 0.240 A
then:
IIN(max) =
=
VOUT(OVP) IOUT
VIN(min)
(37)
15.9 (V) 0.24 (A)
= 0.848 A
5 (V) 0.90
=
0.765
5 (V)
10 (μH) 2 (MHz)
(42)
= 0.191 A
Step 4f Determining the inductor current rating. The inductor
current rating must be greater than the IIN(max) value plus half of
Next, calculate minimum input current, as follows:
VOUT(OVP) IOUT
IIN(min) =
VIN(max) H
15.9 (V)
16 (V)
VIN(min) D(max)
Lused fSW
H
where η is efficiency.
=
ΔILused =
the ripple current ΔIL, calculated as follows:
(38)
0.24 (A)
= 0.265 A
0.90
= 0.848 × 0.30 = 0.254 A
(43)
= 0.848 (A) + 0.096 (A) = 0.944 A
Step 5 Determining the resistor value for a particular switching
Step 4c Determining the inductor value. To ensure that the
inductor operates in continuous conduction mode, the value of
the inductor must be set such that the ½ inductor ripple current
is not greater than the average minimum input current. As a first
pass assume Iripple to be 30% of the maximum inductor current:
ΔIL = IIN(max) × Iripple
L(min) = IIN(max) + 1/2 ΔILused
(39)
frequency. Use the RFSET values shown in figure 6. For example,
a 10 kΩ resistor will result in an 2 MHz switching frequency.
Step 6 Choosing the proper switching diode. The switching
diode must be chosen for three characteristics when it is used in
LED lighting circuitry. The most obvious two are: current rating
of the diode and reverse voltage rating.
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Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
The reverse breakdown voltage rating for the output diode in a
SEPIC circuit should be:
VBD > VOUT(OVP)(max) + VIN(max)
(44)
> 15.9 (V) + 16 (V) = 31.9 V
because the maximum output voltage in this case is VOUT(OVP).
The peak current through the diode is calculated as:
Idp = IIN(max) + 1/2 ΔILused
(45)
= 0.848 (A) + 0.096 (A) = 0.944 A
The third major component in deciding the switching diode is the
reverse current, IR , characteristic of the diode. This characteristic
is especially important when PWM dimming is implemented.
During PWM off-time the boost converter is not switching. This
results in a slow bleeding off of the output voltage, due to leakage
currents. IR can be a large contributor, especially at high temperatures. On the diode that was selected in this design, the current
varies between 1 and 100 μA. It is often advantageous to pick a
diode with a much higher breakdown voltage, just to reduce the
reverse current. Therefore for this example, pick a diode rated for
a VBD of 60 V, instead of just 40 V.
Step 7 Choosing the output capacitors. The output capacitors
must be chosen such that they can provide filtering for both the
boost converter and for the PWM dimming function. The biggest
factors that contribute to the size of the output capacitor are:
PWM dimming frequency and PWM duty cycle. Another major
contributor is leakage current, ILK . This current is the combination of the OVP leakage current as well as the reverse current of
the switching diode. In this design the PWM dimming frequency
is 200 Hz and the minimum duty cycle is 1%. Typically, the voltage variation on the output, VCOUT , during PWM dimming must
be less than 250 mV, so that no audible hum can be heard. The
capacitance can be calculated as follows:
COUT = ILK
1 – D(min)
fPWM(dimming)
= 200 (μA)
VCOUT
1 – 0.01
= 3.96 μF
200 (Hz) 0.250 (V)
(46)
A capacitor larger than 3.96 μF should be selected due to degradation of capacitance at high voltages on the capacitor. Select a
4.7 μF capacitor for this application.
The rms current through the capacitor is given by:
ICOUTrms = IOUT
(47)
D(max)
1 – D(max)
= 0.240 (A)
0.765
= 0.433 A
1 – 0.765
The output capacitor must have a ripple current rating of at least
500 mA. The capacitor selected for this design is a 4.7 μF 50 V
capacitor with a 1.5 A current rating.
Step 8 Selecting input capacitor. The input capacitor must be
selected such that it provides a good filtering of the input voltage
waveform. A estimation rule is to set the input voltage ripple,
ΔVIN , to be 1% of the minimum input voltage. The minimum
input capacitor requirements are as follows:
CIN =
=
∆ILused
8
fSW
8
∆VIN
0.191 (A)
= 0.24 μF
2 (MHz) 0.05 (V)
(48)
The rms current through the capacitor is given by:
CINrms =
=
∆ILused
12
0.191 (A)
12
(49)
= 0.055 A
A good ceramic input capacitor with a rating of 2.2 μF 25 V will
suffice for this application.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
31
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
The rms current requirement of the coupling capacitor is given
by:
(51)
ICSWrms = IIN(max) 1 – D(max)
D(max)
Step 9 Selecting coupling capacitor CSW. The minimum capacitance of CSW is related to the maximum voltage ripple allowed
across it:
CSW =
IOUT
DMAX
fSW
∆VSW
0.24 (A) 0.765
=
0.1 (V) 2 (MHz)
(50)
= 0.848 (A)
= 0.92 μF
1 – 0.765
= 0.47 A
0.765
The voltage rating of the coupling capacitor must be greater than
VIN(max), or 16 V in this case. A ceramic capacitor rated for
2.2 μF 25 V will suffice for this application.
L2
10 μH
RSC
0.056 Ω
VIN 6 to 14 V
CIN
2.2 μF / 25 V
Q1
RADJ
590 Ω
VC
R1
100 kΩ
CVDD
0.1 μF
CSW
2.2 μF / 25 V
L1
10 μH
GATE
VSENSE
VIN
VDD
VOUT
COUT
4.7 μF
50 V
OVP
A8515
PAD
ISET
RFSET
10 kΩ
ROVP
39.2 kΩ
SW
FAULT
EN/PWM
APWM
RISET
8.25 kΩ
D1
2 A / 60 V
LED1
LED2
COMP
FSET
AGND
PGND
CP
120 pF
RZ
150 Ω
CZ
0.47 μF
Figure 33. Typical application showing SEPIC configuration, with accurate input current sense, and VSENSE
to GND protection
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
32
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Package LP, 16-Pin TSSOP with Exposed Thermal Pad
0.45
5.00±0.10
16
0.65
16
8º
0º
0.20
0.09
1.70
B
3 NOM
4.40±0.10
3.00
6.40±0.20
6.10
0.60 ±0.15
A
1
1.00 REF
2
3 NOM
0.25 BSC
Branded Face
16X
SEATING
PLANE
0.10 C
0.30
0.19
C
3.00
C
PCB Layout Reference View
For Reference Only; not for tooling use (reference MO-153 ABT)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
1.20 MAX
0.65 BSC
1 2
SEATING PLANE
GAUGE PLANE
0.15
0.00
A Terminal #1 mark area
B
Exposed thermal pad (bottom surface); dimensions may vary with device
C Reference land pattern layout (reference IPC7351
SOP65P640X110-17M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
33
Wide Input Voltage Range, High Efficiency
Fault Tolerant LED Driver
A8515
Revision History
Revision
Revision Date
Rev. 2
December 15, 2011
Description of Revision
Update to application examples, add VSYNC
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Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
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use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
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Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
34
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