CD54AC112/3A CD54ACT112/3A S E M I C O N D U C T O R June 1997 COMPLETE DATA SHEET COMING SOON! Dual “J-K” Flip-Flop with Set and Reset Description Functional Diagram The CD54AC112/3A and CD54ACT112/3A are dual “J-K” flip-flops with set and reset that utilize the Harris Advanced CMOS Logic technology. These flip-flops have independent J, K, Set, Reset and Clock inputs and Q and Q outputs. The CD54AC112/3A and CD54ACT112/3A changes state on the negative-going transition of the clock. Set and Reset are accomplished asynchronously by low-level inputs. 1S 1J 1K 1CP The CD54AC112/3A and CD54ACT112/3A are supplied in 16 lead dual-in-line ceramic packages (F suffix). 1R 2S ACT INPUT LOAD TABLE 2J INPUT UNIT LOAD (NOTE 1) J, CP, CP 1 2K 0.53 2R S, R 3 5 1Q 2 FF 1 6 1Q 1 15 10 11 9 2Q 12 FF 2 7 2Q 2CP K 4 13 14 0.58 GND = 8 VCC = 16 NOTE: 1. Unit load is ∆ICC limit specified in DC Electrical Specifications Table, e.g., 2.4mA Max at +25oC. Absolute Maximum Ratings DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . .±50mA DC Output Source or Sink Current, Per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . . .±50mA DC VCC or GND Current, ICC or IGND For Up to 4 Outputs Per Device, Add ±25mA For Each Additional Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±100mA Power Dissipation Per Package, PD TA = -55oC to +100oC (Package F) . . . . . . . . . . . . . . . . . . 500mW TA = +100oC to +125oC (Package F) . . . . . . . . Derate Linearly at 8mW/ oC to 300mW Operating Temperature Range, TA Package Type F . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC Storage Temperature, TSTG . . . . . . . . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) At Distance 1/16in. ± 1/32in. (1.59mm ± 0.79mm) From Case For 10s Max . . . . . . . . . . . . . . . . . . . . . . . . . . +265oC Unit Inserted Into a PC Board (Min Thickness 1/16in., 1.59mm) With Solder Contacting Lead Tips Only. . . . . . . . . . . . . . . +300oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Recommended Operating Conditions Operating Temperature, TA . . . . . . . . . . . . . . . . . . . -55oC to +125oC Input Rise and Fall Slew Rate, dt/dv at 1.5V to 3V (AC Types) . . . . . . . . . . . . . . . . . . . 0ns/V to 50ns/V at 3.6V to 5.5V (AC Types) . . . . . . . . . . . . . . . . . 0ns/V to 20ns/V at 4.5V to 5.5V (AC Types) . . . . . . . . . . . . . . . . . 0ns/V to 10ns/V Supply Voltage Range, VCC Unless Otherwise Specified, All Voltages Referenced to GND TA = Full Package Temperature Range CD54AC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V CD54ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . . 0V to VCC CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright © Harris Corporation 1994 1 File Number 3886