Data Sheet

PEMB14; PUMB14
PNP/PNP resistor-equipped transistors;
R1 = 47 kΩ, R2 = open
Rev. 02 — 31 August 2009
Product data sheet
1. Product profile
1.1 General description
PNP/PNP resistor-equipped transistors
Table 1.
Product overview
Type number
Package
NXP
JEITA
NPN/PNP
complement
NPN/NPN
complement
PEMB14
SOT666
-
PEMD14
PEMH14
PUMB14
SOT363
SC-88
PUMD14
PUMH14
1.2 Features
n
n
n
n
Built-in bias resistors
Simplifies circuit design
Reduces component count
Reduces pick and place cost
1.3 Applications
n Low current peripheral driver
n Control of IC inputs
n Replacement of general-purpose transistors in digital applications
1.4 Quick reference data
Table 2.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCEO
collector-emitter voltage
open base
IO
output current (DC)
-
-
−50
V
-
-
−100
mA
R1
bias resistor 1 (input)
33
47
61
kΩ
PEMB14; PUMB14
NXP Semiconductors
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = open
2. Pinning information
Table 3.
Pinning
Pin
Description
Simplified outline
1
GND (emitter) TR1
2
input (base) TR1
3
output (collector) TR2
4
GND (emitter) TR2
5
input (base) TR2
6
output (collector) TR1
6
5
4
Symbol
6
5
4
R1
TR2
TR1
1
2
3
R1
001aab555
1
2
3
006aaa268
3. Ordering information
Table 4.
Ordering information
Type number
Package
Name
Description
Version
PEMB14
-
plastic surface mounted package; 6 leads
SOT666
PUMB14
SC-88
plastic surface mounted package; 6 leads
SOT363
4. Marking
Table 5.
Marking codes
Type number
Marking code[1]
PEMB14
5A
PUMB14
T1*
[1]
* = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
PEMB14_PUMB14_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 31 August 2009
2 of 10
PEMB14; PUMB14
NXP Semiconductors
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = open
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor
VCBO
collector-base voltage
open emitter
-
−50
V
VCEO
collector-emitter voltage
open base
-
−50
V
VEBO
emitter-base voltage
open collector
-
−5
V
IO
output current (DC)
-
−100
mA
ICM
peak collector current
-
−100
mA
Ptot
total power dissipation
Tamb ≤ 25 °C
SOT363
[1]
-
200
mW
SOT666
[1] [2]
-
200
mW
Tstg
storage temperature
−65
+150
°C
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
−65
+150
°C
Per device
total power dissipation
Ptot
Tamb ≤ 25 °C
SOT363
[1]
-
300
mW
SOT666
[1] [2]
-
300
mW
[1]
Device mounted on a FR4 printed-circuit board, single-sided copper, tin-plated and standard footprint.
[2]
Reflow soldering is the only recommended soldering method.
6. Thermal characteristics
Table 7.
Symbol
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
Rth(j-a)
thermal resistance from
junction to ambient
Tamb ≤ 25 °C
SOT363
[1]
-
-
625
K/W
SOT666
[1] [2]
-
-
625
K/W
SOT363
[1]
-
-
416
K/W
SOT666
[1] [2]
-
-
416
K/W
Per device
Rth(j-a)
thermal resistance from
junction to ambient
Tamb ≤ 25 °C
[1]
Device mounted on a FR4 printed-circuit board, single-sided copper, tin-plated and standard footprint.
[2]
Reflow soldering is the only recommended soldering method.
PEMB14_PUMB14_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 31 August 2009
3 of 10
PEMB14; PUMB14
NXP Semiconductors
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = open
7. Characteristics
Table 8.
Characteristics
Tamb = 25 °C unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
ICBO
collector-base cut-off
current
VCB = −50 V; IE = 0 A
-
-
−100
nA
ICEO
collector-emitter
cut-off current
VCE = −30 V; IB = 0 A
-
-
−1
µA
VCE = −30 V; IB = 0 A;
Tj = 150 °C
-
-
−50
µA
nA
IEBO
emitter-base cut-off
current
VEB = −5 V; IC = 0 A
-
-
−100
hFE
DC current gain
VCE = −5 V; IC = −1 mA
100
-
-
VCEsat
collector-emitter
saturation voltage
IC = −10 mA; IB = −0.5 mA
-
-
−150
mV
R1
bias resistor 1 (input)
33
47
61
kΩ
Cc
collector capacitance
-
-
2.5
pF
VCB = −10 V; IE = ie = 0 A;
f = 1 MHz
006aaa206
1000
(1)
hFE
006aaa207
−1
VCEsat
(V)
(2)
(3)
−10−1
100
(1)
(2)
(3)
10
−10−1
−1
−10
−102
−10−2
−10−1
IC (mA)
−102
IC/IB = 20
(1) Tamb = 100 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
(3) Tamb = −40 °C
DC current gain as a function of collector
current; typical values
Fig 2.
Collector-emitter saturation voltage as a
function of collector current; typical values
PEMB14_PUMB14_2
Product data sheet
−10
IC (mA)
VCE = −5 V
Fig 1.
−1
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 31 August 2009
4 of 10
PEMB14; PUMB14
NXP Semiconductors
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = open
8. Package outline
Plastic surface-mounted package; 6 leads
SOT363
D
E
B
y
X
A
HE
6
5
v M A
4
Q
pin 1
index
A
A1
1
2
e1
3
bp
c
Lp
w M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.30
0.20
0.25
0.10
2.2
1.8
1.35
1.15
1.3
0.65
2.2
2.0
0.45
0.15
0.25
0.15
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
SOT363
Fig 3.
JEITA
SC-88
EUROPEAN
PROJECTION
ISSUE DATE
04-11-08
06-03-16
Package outline SOT363 (SC-88)
PEMB14_PUMB14_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 31 August 2009
5 of 10
PEMB14; PUMB14
NXP Semiconductors
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = open
Plastic surface-mounted package; 6 leads
SOT666
D
E
A
X
Y S
S
HE
6
5
4
pin 1 index
A
1
2
e1
c
3
bp
w M A
Lp
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
bp
c
D
E
e
e1
HE
Lp
w
y
mm
0.6
0.5
0.27
0.17
0.18
0.08
1.7
1.5
1.3
1.1
1.0
0.5
1.7
1.5
0.3
0.1
0.1
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
ISSUE DATE
04-11-08
06-03-16
SOT666
Fig 4.
EUROPEAN
PROJECTION
Package outline SOT666
PEMB14_PUMB14_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 31 August 2009
6 of 10
PEMB14; PUMB14
NXP Semiconductors
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = open
9. Packing information
Table 9.
Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code. [1]
Type number
Package
Description
Packing quantity
3000
4000
10000
PEMB14
SOT666
4 mm pitch, 8 mm tape and reel;
-
-115
-
PUMB14
SOT363
4 mm pitch, 8 mm tape and reel; T1
[2]
-115
-
-135
PUMB14
SOT363
4 mm pitch, 8 mm tape and reel; T2
[3]
-125
-
-165
[1]
For further information and the availability of packing methods, see Section 12.
[2]
T1: normal taping
[3]
T2: reverse taping
PEMB14_PUMB14_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 31 August 2009
7 of 10
PEMB14; PUMB14
NXP Semiconductors
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = open
10. Revision history
Table 10.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PEMB14_PUMB14_2
20090831
Product data sheet
-
PEMB14_PUMB14_1
Modifications:
PEMB14_PUMB14_1
•
This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
•
•
Figure 3 “Package outline SOT363 (SC-88)”: updated
Figure 4 “Package outline SOT666”: updated
20050217
Product data sheet
PEMB14_PUMB14_2
Product data sheet
-
-
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 31 August 2009
8 of 10
PEMB14; PUMB14
NXP Semiconductors
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = open
11. Legal information
11.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
11.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
11.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
11.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
12. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
PEMB14_PUMB14_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 31 August 2009
9 of 10
PEMB14; PUMB14
NXP Semiconductors
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = open
13. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
10
11
11.1
11.2
11.3
11.4
12
13
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics. . . . . . . . . . . . . . . . . . . 3
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 5
Packing information. . . . . . . . . . . . . . . . . . . . . . 7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 8
Legal information. . . . . . . . . . . . . . . . . . . . . . . . 9
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 9
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Contact information. . . . . . . . . . . . . . . . . . . . . . 9
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 31 August 2009
Document identifier: PEMB14_PUMB14_2