INTERSIL 5962R9568901TEC

HS-26C32RH-T
TM
Data Sheet
July 1999
Radiation Hardened
Quad Differential Line Receiver
Features
Intersil’s Satellite Applications Flow™ (SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
The Intersil HS-26C32RH-T is a Quad Differential Line
Receiver designed for digital data transmission over
balanced lines and meets the requirements of EIA Standard
RS-422. Radiation Hardened CMOS processing assures low
power consumption, high speed, and reliable operation in
the most severe radiation environments.
The HS-26C32RH-T has an input sensitivity of 200mV (typ).
over the common mode input voltage range of ±7V. The
receivers are also equipped with input fail safe circuitry,
which causes the outputs to go to a logic “1” when the inputs
are open. Enable and Disable functions are common to all
four receivers.
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
- Gamma Dose . . . . . . . . . . . . . . . . . . . . 1 x 105 RAD(Si)
- SEU and SEL . . . . . . . . . . Immune to 100MeV/mg/cm2
• EIA RS-422 Compatible Inputs
• CMOS Compatible Enable Inputs
• Input Fail Safe Circuitry
• High Impedance Inputs when Disabled or Powered Down
• Low Power Dissipation 138mW Standby (Max)
• Single 5V Supply
• Full -55oC to 125oC Military Temperature Range
Pinouts
HS1-26C32RH-T (SBDIP), CDIP2-T16
TOP VIEW
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Ordering Information
5962R9568901TEC
HS1-26C32RH-T
16 VDD
AIN 2
15 BIN
AOUT 3
14 BIN
13 BOUT
COUT 5
12 ENABLE
CIN 6
11 DOUT
CIN 7
10 DIN
GND 8
9 DIN
HS9-26C32RH-T (FLATPACK), CDFP4-F16
TOP VIEW
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
PART
NUMBER
AIN 1
ENABLE 4
Detailed Electrical Specifications for the HS-26C32RH-T
are contained in SMD 5962-95689. A “hot-link” is provided
from our website for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
ORDERING
NUMBER
FN4592.1
TEMP.
RANGE
(oC)
-55 to 125
HS1-26C32RH/Proto
HS1-26C32RH/Proto
-55 to 125
5962R9568901TXC
HS9-26C32RH-T
-55 to 125
HS9-26C32RH/Proto
HS9-26C32RH/Proto
-55 to 125
AIN
1
16
VDD
AIN
2
15
BIN
AOUT
3
14
BIN
ENABLE
4
13
BOUT
COUT
5
12
ENABLE
CIN
6
11
DOUT
CIN
7
10
DIN
GND
8
9
DIN
NOTE: Minimum order quantity for -T is 150 units through
distribution, or 450 units direct.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.
HS-26C32RH-T
Functional Diagram
ENABLE
ENABLE DIN DIN
+
-
CIN CIN
BIN BIN
AIN AIN
+
+
+
DOUT
-
COUT
-
BOUT
-
AOUT
TRUTH TABLE
INPUTS
2
OUTPUT
DEVICE POWER
ON/OFF
ENABLE
ENABLE
INPUT
OUT
ON
0
1
X
HI-Z
ON
1
X
VID ≥ VTH (Max)
1
ON
1
X
VID ≤ VTH (Min)
0
ON
X
0
VID ≥ VTH (Max)
1
ON
X
0
VID ≤ VTH (Min)
0
ON
1
X
Open
1
ON
X
0
Open
1
HS-26C32RH-T
Die Characteristics
DIE DIMENSIONS:
BACKSIDE FINISH:
2140µm x 3290µm x 533µm ±25.4µm
Silicon
(85 x 130 x 21mils ±1mil)
PASSIVATION:
METALLIZATION:
Type: SiO2
Thickness: 8kÅ ±1kÅ
M1: Mo/Tiw
Thickness: 5800Å
WORST CASE CURRENT DENSITY:
M2: Al/Si/Cu
< 2.0e5 A/cm 2
Thickness: 10kÅ ±1kÅ
TRANSISTOR COUNT:
SUBSTRATE POTENTIAL:
315
Internally connected to VDD . May be left floating.
PROCESS:
Radiation Hardened CMOS, AVLSI
Metallization Mask Layout
HS-26C32RH
AIN
(1)
VDD
(16)
BIN
(15)
(14) BIN
AIN (2)
(13) BOUT
AOUT (3)
ENAB (4)
(12) ENAB
COUT (5)
(11) DOUT
(10) DIN
CIN (6)
(7)
CIN
(8)
GND
(9)
DIN
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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