JANSR2N7294 Formerly FRF250R4 23A, 200V, 0.115 Ohm, Rad Hard, N-Channel Power MOSFET June 1998 Features Description • 23A, 200V, rDS(ON) = 0.115Ω The Intersil Corporation has designed a series of SECOND GENERATION hardened power MOSFETs of both N-Channel and P-Channel enhancement types with ratings from 100V to 500V, 1A to 60A, and on resistance as low as 25mΩ. Total dose hardness is offered at 100K RAD (Si) and 1000K RAD (Si) with neutron hardness ranging from 1E13 for 500V product to 1E14 for 100V product. Dose rate hardness (GAMMA DOT) exists for rates to 1E9 without current limiting and 2E12 with current limiting. • Total Dose - Meets Pre-RAD Specifications to 100K RAD (Si) • Dose Rate - Typically Survives 3E9 RAD (Si)/s at 80% BVDSS - Typically Survives 2E12 if Current Limited to IDM • Photo Current This MOSFET is an enhancement-mode silicon-gate power field effect transistor of the vertical DMOS (VDMOS) structure. It is specially designed and processed to exhibit minimal characteristic changes to total dose (GAMMA) and neutron (no) exposures. Design and processing efforts are also directed to enhance survival to dose rate (GAMMA DOT) exposure. - 12nA Per-RAD(Si)/s Typically • Neutron - Maintain Pre-RAD Specifications for 1E13 Neutrons/cm2 - Usable to 1E14 Neutrons/cm2 Ordering Information PART NUMBER JANSR2N7294 PACKAGE TO-254AA BRAND JANSR2N7294 Also available at other radiation and screening levels. See us on the web, Intersil’ home page: http://www.intersil.com. Contact your local Intersil Sales Office for additional information. Symbol Die family TA17652. D MIL-PRF-19500/605. G S Package TO-254AA G S D CAUTION: Beryllia Warning per MIL-S-19500 refer to package specifications. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000. 2-23 File Number 4292.1 JANSR2N7294 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulsed Avalanche Current, L = 100µH, (See Test Figure). . . . . . . . . . . . . . . . . . . . . . IAS Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ , TSTG Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL (Distance >0.063in (1.6mm) from Case, 10s Max) Weight (Typical) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . JANSR2N7294 200 200 UNITS V V 23 15 69 ±20 A A A V 125 50 1.00 69 23 69 -55 to 150 300 W W W/oC A A A oC oC 9.3 g CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL Drain to Source Breakdown Voltage TEST CONDITIONS ID = 1mA, VGS = 0V BVDSS Gate Threshold Voltage VGS = VDS, ID = 1mA VGS(TH) Zero Gate Voltage Drain Current IDSS Gate to Source Leakage Current VDS = 160V, VGS = 0V VGS = ±20V IGSS Drain to Source On-State Voltage VDS(ON) VGS = 10V, ID = 23A Drain to Source On Resistance rDS(ON) ID = 15A, VGS = 10V Turn-On Delay Time tr Turn-Off Delay Time td(OFF) Fall Time Qg(TOT) VGS = 0V to 20V Gate Charge at 10V Qg(10) VGS = 0V to 10V Threshold Gate Charge (Not on slash sheet) Qg(TH) VGS = 0V to 2V MAX UNITS - - V - - 5.0 V 2.0 - 4.0 V 1.0 - - V - - 25 µA - - 250 µA - - 100 nA - - 200 nA - - 2.78 V - - 0.115 Ω TC = 125oC - - 0.253 Ω tf Total Gate Charge (Not on slash sheet) TYP 200 TC = 25oC VDD = 100V, ID = 23A, RL = 4.35Ω, VGS = 10V, RGS = 25Ω td(ON) Rise Time TC = -55oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC MIN VDD = 100V, ID = 23A - - 156 ns - - 510 ns - - 574 ns - - 280 ns - - 558 nC - - 298 nC - - 20 nC Gate Charge Source Qgs - - 66 nC Gate Charge Drain Qgd - - 144 nC Thermal Resistance Junction to Case RθJC - - 1.0 oC/W Thermal Resistance Junction to Ambient RθJA - - 48 oC/W Source to Drain Diode Specifications PARAMETER Forward Voltage Reverse Recovery Time SYMBOL VSD trr TEST CONDITIONS ISD = 25A ISD = 25A, dISD/dt = 100A/µs 2-24 MIN TYP MAX UNITS 0.6 - 1.8 V - - 1700 ns JANSR2N7294 Electrical Specifications up to 100K RAD PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN MAX UNITS Drain to Source Breakdown Volts (Note 3) BVDSS VGS = 0, ID = 1mA 200 - V Gate to Source Threshold Volts (Note 3) VGS(TH) VGS = VDS, ID = 1mA 2.0 4.0 V Gate to Body Leakage (Notes 2, 3) IGSS VGS = ±20V, VDS = 0V - 100 nA Zero Gate Leakage (Note 3) IDSS VGS = 0, VDS = 160V - 25 µA Drain to Source On-State Volts (Notes 1, 3) VDS(ON) VGS = 10V, ID = 23A - 2.78 V Drain to Source On Resistance (Notes 1, 3) rDS(ON) VGS = 10V, ID = 15A - 0.115 Ω NOTES: 1. Pulse test, 300µs Max. 2. Absolute value. 3. Insitu Gamma bias must be sampled for both VGS = 10V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS . Typical Performance Curves Unless Otherwise Specified 28 TC = 25oC 100 ID , DRAIN CURRENT (A) 24 ID , DRAIN (A) 20 16 12 8 100µs 10 1ms 10ms 1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 4 0 -50 0 50 100 0.1 150 TC , CASE TEMPERATURE (oC) FIGURE 1. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1 100ms 10 100 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 2. FORWARD BIAS SAFE OPERATING AREA 2-25 JANSR2N7294 Typical Performance Curves Unless Otherwise Specified (Continued) NORMALIZED THERMAL RESPONSE (ZθJC) 10 1 0.5 0.2 0.1 0.05 0.02 0.01 0.1 PDM t1 t2 SINGLE PULSE 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC 0.001 10-5 10-4 10-3 10-2 10-1 100 101 t, RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE Test Circuits and Waveforms ELECTRONIC SWITCH OPENS WHEN IAS IS REACHED VDS L BVDSS + CURRENT I TRANSFORMER AS tP - VARY tP TO OBTAIN REQUIRED PEAK IAS VDD DUT tP VDD + 50Ω VGS ≤ 20V 0V VDS IAS 50V-150V 50Ω tAV FIGURE 4. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 5. UNCLAMPED ENERGY WAVEFORMS 2-26 JANSR2N7294 Test Circuits and Waveforms tON VDD tOFF td(ON) td(OFF) tr RL VDS tf 90% 90% VDS VGS = 10V 10% DUT 10% 0V 90% RGS 50% VGS 50% PULSE WIDTH 10% FIGURE 6. RESISTIVE SWITCHING TEST CIRCUIT FIGURE 7. RESISTIVE SWITCHING WAVEFORMS QG 10V QGS QGD VG CHARGE FIGURE 8. BASIC GATE CHARGE WAVEFORM 2-27 JANSR2N7294 Screening Information Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table). Delta Tests and Limits (JANS) TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MAX UNITS Gate to Source Leakage Current IGSS VGS = ±20V ±20 (Note 4) nA Zero Gate Voltage Drain Current IDSS VDS = 80% Rated Value Drain to Source On Resistance rDS(ON) TC = 25oC at Rated ID Gate Threshold Voltage VGS(TH) ID = 1.0mA ±25 (Note 4) µA ±20% (Note 5) Ω ±20% (Note 5) V NOTES: 4. Or 100% of Initial Reading (whichever is greater). 5. Of Initial Reading. Screening Information TEST JANS Gate Stress VGS = 30V, t = 250µs Pind Required Pre Burn-In Tests (Note 6) MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) Steady State Gate Bias (Gate Stress) MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours Interim Electrical Tests (Note 6) All Delta Parameters Listed in the Delta Tests and Limits Table Steady State Reverse Bias (Drain Stress) MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 240 hours PDA 5% Final Electrical Tests (Note 6) MIL-S-19500, Group A, Subgroups 2 and 3 NOTE: 6. Test limits are identical pre and post burn-in. Additional Screening Tests PARAMETER Safe Operating Area Unclamped Inductive Switching SYMBOL SOA IAS TEST CONDITIONS MAX UNITS VDS = 160V, t = 10ms 1.6 A VGS(PEAK) = 15V, L = 0.1mH 69 A Thermal Response ∆VSD tH = 100ms; VH = 25V; IH = 4A 136 mV Thermal Impedance ∆VSD tH = 500ms; VH = 25V; IH = 4A 187 mV Rad Hard Data Packages - Intersil Power Transistors 1. JANS Rad Hard - Standard Data Package A. Certificate of Compliance B. Serialization Records C. Assembly Flow Chart D. SEM Photos and Report 2-28 JANSR2N7294 TO-254AA 3 LEAD JEDEC TO-254AA HERMETIC METAL PACKAGE INCHES A ØP E A1 Q H1 D MIN MAX MIN MAX NOTES A 0.249 0.260 6.33 6.60 - A1 0.040 0.050 1.02 1.27 - Øb 0.035 0.045 0.89 1.14 2, 3 D 0.790 0.800 20.07 20.32 - E 0.535 0.545 13.59 13.84 e e1 H1 0.065 R MAX. TYP. L Øb 1 2 0.150 TYP 0.300 BSC 0.245 0.265 - 3.81 TYP 4 7.62 BSC 4 6.23 6.73 - J1 0.140 0.160 3.56 4.06 4 L 0.520 0.560 13.21 14.22 - ØP 0.139 0.149 3.54 3.78 - Q 0.110 0.130 2.80 3.30 - NOTES: 1. These dimensions are within allowable dimensions of Rev. A of JEDEC outline TO-254AA dated 11-86. 2. Add typically 0.002 inches (0.05mm) for solder coating. 3. Lead dimension (without solder). 4. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 5. Die to base BeO isolated, terminals to case ceramic isolated. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93. 3 e MILLIMETERS SYMBOL J1 e1 WARNING! BERYLLIA WARNING PER MIL-S-19500 Packages containing beryllium oxide (BeO) shall not be ground, machined, sandblasted, or subject to any mechanical operation which will produce dust containing any beryllium compound. Packages containing any beryllium compound shall not be subjected to any chemical process (etching, etc.) which will produce fumes containing beryllium or its’ compounds. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 2-29 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029