INTERSIL EL8186

EL8186
®
Data Sheet
August 23, 2005
Micropower Single Supply Rail-to-Rail
Input-Output Op Amp
The EL8186 is a micropower operational amplifier optimized
for single supply operation at 5V and can operate down to
2.4V.
The EL8186 draws minimal supply current while meeting
excellent DC-accuracy noise and output drive specifications.
Competing devices seriously degrade these parameters to
achieve micropower supply current. Offset current, voltage
and current noise, slew rate, and gain-bandwidth product are
all two to ten times better than on previous micropower op
amps.
The EL8186 can be operated from one lithium cell or two
Ni-Cd batteries. The input range includes both positive and
negative rail. The output swings to both rails.
Ordering Information
PART NUMBER
(BRAND)
FN7455.4
Features
• 55µA supply current
• 400µV typical offset voltage
• 500pA input bias current
• 400kHz gain-bandwidth product
• 1MHz -3dB bandwidth
• 0.13V/µs slew rate
• Single supply operation down to 2.4V
• Rail-to-rail input and output
• Output sources and sinks 26mA load current
• Pb-Free plus anneal available (RoHS compliant)
Applications
• Battery- or solar-powered systems
PACKAGE
TAPE &
REEL
PKG. DWG. #
EL8186IW-T7
(BBJA)
6-Pin SOT-23
7” (3K pcs)
MDP0038
EL8186IW-T7A
(BBJA)
6-Pin SOT-23
7” (250 pcs)
MDP0038
EL8186IWZ-T7
(BBJA) (Note)
6-Pin SOT-23
(Pb-free)
7” (3K pcs)
MDP0038
EL8186IWZ-T7A
(BBJA) (Note)
6-Pin SOT-23
(Pb-free)
7” (250 pcs)
MDP0038
EL8186ISZ
(Note)
8-Pin SO
(Pb-free)
-
MDP0027
EL8186ISZ-T7
(Note)
8-Pin SO
(Pb-free)
7”
MDP0027
EL8186ISZ-T13
(Note)
8-Pin SO
(Pb-free)
13”
MDP0027
• 4mA to 25mA current loops
• Handheld consumer products
• Medical devices
• Thermocouple amplifiers
• Photodiode pre amps
• pH probe amplifiers
Pinouts
EL8186
(6-PIN SOT-23)
TOP VIEW
OUT 1
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
VS- 2
6 VS+
+ -
IN+ 3
4 IN-
EL8186
(8-PIN SO)
TOP VIEW
NC 1
IN- 2
IN+ 3
VS- 4
1
5 ENABLE
8 ENABLE
+
7 VS+
6 VOUT
5 NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
EL8186
Absolute Maximum Ratings (TA = 25°C)
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VS + 0.5V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS = 5V, 0V, VCM = 0.1V, VO = 1.4V, TA = 25°C unless otherwise specified.
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
0.4
1
mV
VOS
Input Offset Voltage
∆V OS
--------------∆T
Input Offset Drift vs Temperature
IOS
Input Offset Current
0.4
2
nA
IB
Input Bias Current
0.5
3
nA
eN
Input Noise Voltage Density
fO = 1kHz
25
nV/√Hz
iN
Input Noise Current Density
fO = 1kHz
0.1
pA/√Hz
CMIR
Input Voltage Range
Guaranteed by CMRR test
0
CMRR
Common-Mode Rejection Ratio
VCM = 0V to 5V
90
110
dB
PSRR
Power Supply Rejection Ratio
VS = 2.4V to 5V
90
110
dB
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4.5V, RL = 100kΩ
200
500
V/mV
VO = 0.5V to 4.5V, RL = 1kΩ
25
V/mV
Output low, RL = 100kΩ
3
6
mV
130
200
mV
VOUT
Maximum Output Voltage Swing
1
Output low, RL = 1kΩ
Output high, RL = 100kΩ
Output high, RL = 1kΩ
µV/°C
5
V
4.994
4.997
V
4.8
4.88
V
0.09
0.13
SR
Slew Rate
GBW
Gain Bandwidth Product
fO = 100kHz
BW
-3dB Bandwidth
Unity gain, CLOAD = 27pF, RF = 100
IS,ON
Supply Current, Enabled
IS,OFF
Supply Current, Disabled
IO+
Short Circuit Output Current
RL = 10Ω
18
31
mA
IO-
Short Circuit Output Current
RL = 10Ω
17
26
mA
VS
Minimum Supply Voltage
VINH
Enable Pin High Level
VINL
Enable Pin Low Level
IENH
Enable Pin Input Current
VEN = 5V
0.25
0.7
2
µA
IENL
Enable Pin Input Current
VEN = 0V
-0.5
0
+0.5
µA
2
40
0.17
V/µs
400
kHz
1
MHz
55
75
µA
3
10
µA
2.2
2.4
V
2
V
0.8
V
FN7455.4
August 23, 2005
EL8186
Typical Performance Curves
45
6
40
VS=±1.25V
3
35
GAIN (dB)
GAIN (dB)
30
0
VS=±2.5V
-3
-6
VS=±1.0V
AV=1
CL=27pF
RF=100Ω
RG=OPEN
-9
1K
10K
100K
1M
FREQUENCY (Hz)
10M
VS=±1.0V
10K
100K
1M
50
40
30
20
10
VCM=VDD/2
150 AV=-1
100
50
2.5
3
3.5
4
4.5
5
5.5
VDD=2.5V
-50
-100
-150
-200
2
VDD=5V
0
0
1
2
FIGURE 3. SUPPLY CURRENT vs SUPPLY VOLTAGE
VOS, µV
-40
-60
-80
0
1
2
3
4
5
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 5. INPUT OFFSET VOLTAGE vs COMMON-MODE
INPUT VOLTAGE
3
4
5
FIGURE 4. INPUT OFFSET VOLTAGE vs OUTPUT VOLTAGE
INPUT BIAS, OFFSET CURRENTS (pA)
0
-20
3
OUTPUT VOLTAGE (V)
SUPPLY VOLTAGE (V)
INPUT OFFSET VOLTAGE (µV)
VS=±1.25V
200
INPUT OFFSET VOLTAGE (µV)
SUPPLY CURRENT (µA)
AV=100
15 RL=10kΩ
CL=2.7pF
10 R /R =99.02
F G
RF=221kΩ
5
RG=2.23kΩ
0
100
1K
FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
60
-100
VS=±2.5V
20
FREQUENCY (Hz)
FIGURE 1. UNITY GAIN FREQUENCY RESPONSE vs
SUPPLY VOLTAGE
0
25
10K
1K
IB+
100
IOS
IB-
10
1
0
1
2
3
4
5
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 6. INPUT BIAS + OFFSET CURRENTS vs COMMONMODE INPUT VOLTAGE
FN7455.4
August 23, 2005
EL8186
Typical Performance Curves
(Continued)
200
100
150
80
PHASE
-100
1K
10K
40
40
0
0
-40
-40
-80
-50
0
100
80
100K
-80
-150
1M
1
10
FIGURE 7. AVOL vs FREQUENCY @ 1kΩ LOAD
1M
-120
10M
100
PSRR+
90
90
CMRR (dB)
80
PSRR (dB)
100K
120
110
100
70
60
50
PSRR-
40
80
70
60
50
40
30
30
20
20
10
10
10
100
1K
10K
100K
0
1
1M
10
FREQUENCY (Hz)
100
1K
10K
100K
1M
FREQUENCY (Hz)
FIGURE 9. PSRR vs FREQUENCY
FIGURE 10. CMRR vs FREQUENCY
1K
10.00
CURRENT NOISE (pA/√Hz)
VOLTAGE NOISE (nV/√Hz)
10K
FIGURE 8. AVOL vs FREQUENCY @ 100kΩ LOAD
120
110
100
10
1
10
1K
100
FREQUENCY (Hz)
FREQUENCY (Hz)
0
1
PHASE (°)
GAIN (dB)
0
GAIN
PHASE (°)
GAIN (dB)
50
40
-20
10
80
100
60
20
120
100
1K
10K
100K
FREQUENCY (Hz)
FIGURE 11. VOLTAGE NOISE vs FREQUENCY
4
1.00
0.10
0.01
1
10
100
1K
10K
100K
FREQUENCY (Hz)
FIGURE 12. CURRENT NOISE vs FREQUENCY
FN7455.4
August 23, 2005
EL8186
Typical Performance Curves
(Continued)
500
130
SOT23-6 PACKAGE
10 SAMPLES
INPUT OFFSET VOLTAGE (µV)
400
SOT23-6
PACKAGE
125
300
120
PSRR (dB)
200
100
0
-100
115
110
105
-200
100
-300
95
-400
-500
-50
0
50
90
-50
100
0
50
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 13. VOS vs TEMPERATURE
FIGURE 14. PSRR vs TEMPERATURE
120
130
SOT23-6
PACKAGE
SOT23-6
PACKAGE
125
OPEN LOOP GAIN (dB)
CMRR (dB)
115
110
105
100
95
120
115
110
105
90
-60
-40
-20
0
20
40
60
80
100
-60
100
-40
-20
TEMPERATURE (°C)
20
40
60
80
100
FIGURE 16. AVOL vs TEMPERATURE
70
2000
SOT23-6
PACKAGE
65
SOT23-6
PACKAGE
60
1000
55
500
IS (mA)
IB (pA)
0
TEMPERATURE (°C)
FIGURE 15. CMRR vs TEMPERATURE
1500
100
0
50
45
-500
40
-1000
-1500
-60
35
30
-40
-20
0
20
40
60
80
TEMPERATURE (°C)
FIGURE 17. IB vs TEMPERATURE
5
100
-60
-40
-20
0
20
40
60
TEMPERATURE (°C)
80
100
FIGURE 18. IS vs TEMPERATURE
FN7455.4
August 23, 2005
EL8186
Typical Performance Curves
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.7
0.4
θJ
SO
A =2
T2
3
30
0.2
0
0
25
50
°C
-6
/W
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
6
0.5
8
/W
SO 0 ° C
6
=1
435mW
0.6 625mW
A
A
8
/W
S O 0° C
1
=1
0.6
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
θJ
POWER DISSIPATION (W)
909mW
0.8
θJ
POWER DISSIPATION (W)
1
(Continued)
0.4
391mW
θ
0.3
SO
T2
36
25
6°
C/
W
JA =
0.2
0.1
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN7455.4
August 23, 2005
EL8186
Applications Information
Introduction
The EL8186 is a rail-to-rail input and output micro-power
single supply operational amplifier with an enable feature.
The device achieves rail-to-rail input and output operation
and eliminates the concerns introduced by a conventional
rail-to-rail input and output operational amplifier.
Rail-to-Rail Input
The input common-mode voltage range of the EL8186 goes
from negative supply to positive supply without introducing
offset errors or degrading performance associated with a
conventional rail-to-rail input operational amplifier. Many railto-rail input stages use two differential input pairs, a long-tail
PNP (or PFET) and an NPN (or NFET). Severe penalties
have to be paid for this topology. As the input signal moves
from one supply rail to another, the operational amplifier
switches from one input pair to the other causing drastic
changes in input offset voltage and an undesired change in
magnitude and polarity of input offset current.
The EL8186 achieves input rail-to-rail performance without
sacrificing important precision specifications and without
degrading distortion performance. The EL8186's input offset
voltage exhibits a smooth behavior throughout the entire
common-mode input range. The input bias current versus
the common-mode voltage range for the EL8186 gives
consistent behavior from typically 10mV above the negative
rail all the way up to the positive rail.
Input Bias Current Compensation
The input bias currents of the EL8186 are reduced to a
typical 500pA while maintaining excellent bandwidth for a
micro-power operational amplifier. Inside the EL8186 is an
input bias cancelling circuit. The input stage transistors are
still biased with an adequate amount of current for speed but
the cancelling circuit sinks most of the base current, leaving
a small fraction as input bias current. The input bias current
compensation/cancellation operates from typically 10mV
above the negative rail to the positive supply rail.
7
Rail-to-Rail Output
A pair of complementary MOSFET devices achieves rail-torail output swing. The NMOS sinks current to swing the
output in the negative direction. The PMOS sources current
to swing the output in the positive direction. The EL8186 with
a 100kΩ load will swing to within 3mV of the supply rails.
Enable/Disable Feature
The EL8186 offers an EN pin. The active low enable pin
disables the device when pulled up to at least 2.2V. Upon
disable the part consumes typically 3µA, while the output is
in a high impedance state. The EN also has an internal pull
down. If left open, the EN pin will pull to negative rail and the
device will be enabled by default. The high impedance at
output during disable allows multiple EL8186s to be
connected together as a MUX. The outputs are tied together
in parallel and a channel can be selected by the EN pin.
Typical Applications
R4
100kΩ
R3
10kΩ
R2
10kΩ
K TYPE
THERMOCOUPLE
V+
+
EL8186
V-
410µV/°C
+
5V
R1
100kΩ
FIGURE 21. THERMOCOUPLE AMPLIFIER
Thermocouples are the most popular temperature-sensing
device because of their low cost, interchangeability, and
ability to measure a wide range of temperatures. The
EL8186 is used to convert the differential thermocouple
voltage into single-ended signal with 10X gain. The
EL8186's rail-to-rail input characteristic allows the
thermocouple to be biased at ground and the converter to
run from a single 5V supply.
FN7455.4
August 23, 2005
EL8186
SO Package Outline Drawing
8
FN7455.4
August 23, 2005
EL8186
SOT-23 Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at
http://www.intersil.com/design/packages/index.asp
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
9
FN7455.4
August 23, 2005