1ED EiceDRIVER™ Compact - A new high performance, cost efficient, high voltage gate driver IC family

PCIM Europe 2014, 20 – 22 May 2014, Nuremberg, Germany
1ED Compact – A new high performance, cost efficient,
high voltage gate driver IC family
Heiko Rettinger, Infineon Technologies AG, Am Campeon 1-12, 85579 Neubiberg, Germany,
[email protected]
Abstract
This paper describes the new Infineon EiceDRIVER™ family 1EDI Compact and its benefits
for achieving higher power density in a continuously demanding market for cost efficient
solutions. This new general purpose high voltage gate driver IC family includes four output
current variants optimized for IGBTs, one variant optimized for MOSFETs and three
additional variants with an active miller clamp feature for IGBTs. The new optimized coreless
transformer technology ensures undisturbed operation at offset voltages up to +/- 1200V and
a common mode transient immunity (CMTI) of output to input of 100kV/µs. It later shows
performance aspects of the different variants and their benefits on a PCB.
1 Introduction
It is generally known, that the market of power electronics is driven by shrinking footprints,
form factors and higher power density all the time. This statement is also valid for isolated
high voltage gate driver products and companies in the solar inverter market start to ask for
optimized driver products to reduce complexity.
With the development of the new 1200V EiceDRIVER™ Compact family, Infineon is able to
close this gap and provide a high performance but cost efficient and compact driver IC.
2 Features
2.1
Coreless Transformer
The optimized coreless transformer design requires less space on the chip. It enables higher
output currents compared to previous designs and therefore higher power density within the
same compact SO8 package. The robust design of this new coreless transformer also
ensures a high CMTI at a dV/dt operation of up to 100kV/µs as tested in an application circuit
with Infineon’s CoolMOS™ transistors. The principle of the measurement setup with a silicon
carbide diode complementing the CoolMOS™ can be seen in Fig 1. It also shows a detailed
oscilloscope diagram of a turn off transition reaching a dV/dt of 99.55kV/µs at a HV supply
voltage of VDC=400V and a load current of IL=13A. These rapid transitions have normally a
huge impact on the isolated gate driver supply propagating even to the primary supply which
are visible as ringing on the logic input signal without interrupting the drivers normal
operation. It is easy to see that the ringing is minor according to Fig 1. Anyway, the noise
filter of the Input pulse suppression will cancel any crosstalk or EMI up to a pulse duration of
TMININ+/-=40ns for MOSFET and TMININ+/-=240ns for IGBT variants. At this evaluation there was
no need for an additional input RC-Filter, however an external filter can further improve
signal quality.
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3.3V
400V
12V
2x1.2Ω
VPWM
IL
1EDI60N12AF
DC
Load
VS,GND
Fig 1
2.2
Detail of Buck converter dV/dt measurement at 400V
ch1: PWM input signal VPWM; ch2: Current at inductor IL; ch4: Voltage at Source VS,GND
Output configuration
The 1EDI Compact family targets a broad application range. Different variants where needed
to support their individual demand. The variants with separate output for sourceing and
sinking support a voltage supply of up to VCC2=35V as needed in applications with bipolar
gate voltages. The customer can reference the supply voltage externally to the gate to
achieve a user defined gate supply. The separate outputs according to Fig 2 also enable the
customer to select individual gate resistors for tuning turn on and turn off behavior while
saving the space for a bypass diode. This method simplifies the gate circuit layout and
minimizes parasitics in the gate loop.
The second output configuration as seen on the right in Fig 2 hosts an active miller clamping
feature for gate supply voltages up to VCC2=20V. Typical applications use the clamp function
to avoid parasitic turn on of the power switch due to displacement currents of output dV/dt.
Bipolar supply concepts as with the above driver configuration can also compensate for this
however it requires a more advanced power supply. To further reduce circuit complexity and
PCB space in half-bridge configurations the unipolar supply for 1EDI Clamp variants is often
implemented with a bootstrap circuit. The low quiescent current consumption of the output
chip makes it possible to operate this driver with a high modulation index without the need to
have a huge bootstrap capacitor. An additional benefit of the CLAMP variant is the integrated
diode which clamps the pin CLAMP to VCC2. Since this pin is directly connected to the gate
of the power switch there is no additional resistive path compared to the body diode of the
general gate output and gate resistor path as in a usual configuration. It therefore saves the
space for another external diode on the PCB. The CLAMP function itself has the same
current capability as the output. The 1EDI30I12MF has here a minimum peak current of
IOUT=3A. The Clamp circuit becomes active at turn off when the voltage at the CLAMP pin
drops below VGATE=2V for the first time. At the next turn on it will be shut off again.
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PCIM Europe 2014, 20 – 22 May 2014, Nuremberg, Germany
VCC2
5
UVLO
5
VCC2
Cgc
dvCE
dt
OUT
&
RX
6
VCC2
OUT+
6
RG
Cge
Shoot
through
protection
7
OUT-
To
logic
2V
GND2
From logic
8
Fig 2
2.3
GND2
vGATE
CLAMP
7
8
1EDI-MF
Output block diagram (left: separate output variant; right: Clamp variant)
Wide input voltage range
The input logic was designed for a wide operating range while the input threshold voltage
levels are always linked to the positive input supply voltage. The integrated under voltage
lockout circuit will activate the chip at 3V and from this level onward the input high threshold
voltage will always be at VIN,H=0.7*VVCC1. The input low threshold voltage is set at
VIN,L=0.3*VVCC1 accordingly. This linear scaling enables operation directly from a 3.3V digital
signal processor but is also capable of accepting output signals from a 12V PFC controller to
boost its signal. See Fig 3 on how this linear behavior also increases hysteresis for improved
noise immunity at higher input levels. The maximum input voltage rating is VVCC1,max=17V.
VIN,L
VIN,H
in
a
olt
VIN,H,15V
np
10
, IN
N+
-
hI
Hig
V
ut
,m
ge
I
5
VVCC1,max
UVLO
No driver
operation
, ma
tage
t Vol
VIN,L,15V
VIN,H,5V
IN- L
IN+,
x
pu
ow In
VIN,L,5V
10
5
Fig 3
2.4
15
VCC1
Linear increasing input threshold voltages starting at 3V over the whole operating range
Inverting and non-inverting input
The new 1EDI Compact family members provide the option to use two input signals, one
inverting and one non-inverting. These inputs can be used in various combinations
depending on the application needs. Apart from using a single PWM input and tying the other
one to GND or VCC for permanent activation of the driver, Fig 4 shows further application
usage including (A) Input with low voltage differential signals for increased noise immunity,
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(B & C) Enable or Shutdown functionality and (D) a simple interlocking function for halfbridge operation.
The IN+ terminal is internally pulled down to favor off state and the IN- terminal is pulled up
respectively. This setup also ensures off state in all other configurations where an input
signal might be connected to a high impedance output, a weak solder joint or a wire break.
A
B
VCC1
IN - LVDS
IN+
EN
IN-
/IN
IN+
GND1
C
VCC1
IN+
IN HS
IN-
IN-
GND1
GND1
VCC1
VCC1
IN
IN+
SD
Fig 4
D
VCC1
IN+
IN LS
IN-
IN-
GND1
GND1
Application usage of logic input
3 Performance
3.1
Thermal performance
The dual chip design of this family creates two independent sections of power loss within the
package. The input section has been evaluated on its own to exclude effects from the output
chip. In the second step of the evaluation input and output operation have been combined as
described in Fig 5.
VCC1
VCC1
+15V
VCC2
2x4µ7
100n
SGND
IN
OUT+
GND1
2x1.2Ω
IN+
OUT-
IN-
GND2
CLOAD
In and In/Out Evaluation
Fig 5
In/Out Evaluation only
Application usage of logic input
The temperature increase of a 1EDI60N12AF as a function of input switching frequency up to
f=5MHz and the supply voltage up to VCC1=17V can be seen in Fig 6. It clearly shows a
temperature increase in the area of the input chip. It is located in the lower right corner of the
black rectangular which estimates the body of the SO8 package.
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Fig 6
Input only temperature evaluation over frequency at various input voltages
At the evaluation of the output section, the input was supplied with a constant voltage of
VCC1=5V. However this influence is minor compared to the power loss in the output chip at
VCC2=15V and 50% duty cycle. The thermal effects of capacitive load (CLOAD) variation and
different switching frequencies are recorded in Fig 7. The power loss was shared between
the driver output stage and the two external gate resistors of 1.2Ω each.
120
100
dT [°C]
80
f = 500kHz
60
f = 250kHz
f = 100kHz
40
f = 20kHz
20
0
0
Fig 7
3.2
20
40
60
CLOAD [nF]
80
100
Overall temperature evaluation over capacitive load at various switching frequencies
Output current capability
The strongest drivers of the family 1EDI60I12AF and 1EDI60N12AF are rated with a
minimum peak current of Igate=6A at VDS=15V across the output device as hinted in the
diagramm in Fig 8. This rating is valid over the whole temperature range so typical values
nearly double during a short circuit test without external gate resistors.
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Fig 8
3.3
Output current capability of 1EDI60I12AF for source and sink with measurement setup
CoolMOS™ C7 switching
The CoolMOS™ IPZ65R095C7 has been evaluated in a boost circuit running at 50% duty
cycle and fsw=1MHz while driven by the 1EDI60N12AF. At this operation the maximum
temperature at the CoolMOS™ was registered with TCM=81°C and at the Driver with
TDrv=64°C. At this operation it can be stated that the 1EDI Compact strength is more than
sufficient to drive the CoolMOS™ C7 to its full potential.
Fig 9
Boost operation at 1MHz
ch1 (yellow): Vgs 10V/div; ch2 (magenta): Load current 5A/div; ch4 (green): Vds 100V/div
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4 Conclusion
The performance evaluation of the Infineon single channel EiceDRIVER™ Compact family
shows its capabilities for applications in a cost-driven, high performance and high power
density markets. Wide input supply range and flexible input signal configurations minimize
external circuit requirements, complexity and PCB space. The strong driver output and high
switching frequency capability eliminates the need for booster stages which again saves
PCB space and increases overall power density.
References
[1]
J. Hancock, F. Stückler, E. Vecino, ”C7 CoolMOS: Mastering the Art of Quickness”,
Application Note AN 2012-11 V1.0, Infineon Technologies
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