20W 5V SMPS Evaluation board with ICE3AR2280VJZ

AN - EVAL IC E3AR228 0 VJZ
2 0 W 5 V SMPS Eva lua ti on Board wi th
IC E3AR2280VJZ
Application Note
About this document
Scope and purpose
This document is an engineering report that describes universal input 20 W 5 V off-line flyback converter
using Infineon CoolSET™ F3R80 family, ICE3AR2280VJZ. The converter is operated in Discontinuous
Conduction Mode, 100 kHz fixed frequency, very low standby power and various mode of protections for a
high reliable system. This evaluation board is designed to evaluate the performance of ICE3AR2280VJZ in
ease of use.
Intended audience
This document is intended for users of the ICE3AR2280VJZ who wish to design low cost and high reliable
systems of off-line SMPS for enclosed adapter or open frame auxiliary power supply of white goods, PC,
server, DVD, TV, Set-top box, etc.
Table of Contents
About this document ................................................................................................................... 1
Table of Contents ........................................................................................................................ 1
1
Abstract ..................................................................................................................... 3
2
Evaluation board ........................................................................................................ 3
3
Specifications of evaluation board ................................................................................ 4
4
Features of ICE3AR2280VJZ .......................................................................................... 4
5
5.1
5.2
5.3
5.4
5.5
5.6
Circuit description....................................................................................................... 5
Introduction ............................................................................................................................................... 5
Line input ................................................................................................................................................... 5
Line input over voltage protection .......................................................................................................... 5
Start up ....................................................................................................................................................... 5
Operation mode ........................................................................................................................................ 5
Soft start ..................................................................................................................................................... 5
1
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Abstract
5.7
5.8
5.9
RCD clamper circuit................................................................................................................................... 5
Peak current control of primary current................................................................................................. 6
Output stage .............................................................................................................................................. 6
6
Circuit diagram ........................................................................................................... 7
7
7.1
7.2
PCB layout ................................................................................................................. 8
Top side ...................................................................................................................................................... 8
Bottom side................................................................................................................................................ 8
8
Bill of material (BOM) .................................................................................................. 9
9
Transformer construction .......................................................................................... 11
10
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
10.9
Test results .............................................................................................................. 12
Efficiency, regulation and output ripple ...............................................................................................12
Standby power ........................................................................................................................................13
Line regulation.........................................................................................................................................14
Load regulation .......................................................................................................................................14
Maximum power......................................................................................................................................15
ESD immunity (EN61000-4-2) .................................................................................................................15
Surge immunity (EN61000-4-5)..............................................................................................................15
Conducted emissions (EN55022 class B) ..............................................................................................16
Thermal measurement ...........................................................................................................................18
11
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
11.9
11.10
11.11
11.12
Waveforms and scope plots ........................................................................................ 19
Startup at low/high AC line input voltage with maximum load .........................................................19
Soft start ...................................................................................................................................................19
Frequency jittering ..................................................................................................................................20
Drain and current sense voltage at maximum load ............................................................................20
Load transient response (Dynamic load from 10% to 100%) .............................................................21
Output ripple voltage at maximum load ..............................................................................................21
Output ripple voltage during burst mode at 1 W load ........................................................................22
Active Burst mode operation .................................................................................................................22
VCC over voltage protection (Odd skip auto restart mode) .................................................................23
Over load protection (Auto restart mode) ............................................................................................23
VCC under voltage/Short optocoupler protection (Normal auto restart mode) ................................24
AC Line input OVP mode .........................................................................................................................24
12
References ............................................................................................................... 25
Revision History........................................................................................................................ 25
Application Note
2
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Abstract
1
Abstract
This document is an engineering report of a universal input 20 W 5 V off-line flyback converter power supply
utilizing F3R80 CoolSET™ ICE3AR2280VJZ. The application evaluation board is operated in Discontinuous
Conduction Mode (DCM) and is running at 100 kHz switching frequency. It has a single output voltage with
secondary side control regulation. It is especially suitable for small power supply such as DVD player, set-top
box, game console, charger and auxiliary power of white goods, server, PC and high power system, etc. The
ICE3AR2280VJZ is the latest version of the CoolSET™. Besides having the basic features of the F3R CoolSET™
such as Active Burst Mode, propagation delay compensation, soft gate drive, auto restart protection for
major fault (VCC over voltage, VCC under voltage, adjustable input OVP, over temperature, over-load, open
loop and short opto-coupler), it also has the BiCMOS technology design, selectable entry and exit burst
mode level, adjustable AC line input over voltage protection feature, built-in soft start time, built-in and
extendable blanking time and frequency jitter feature, etc. The particular features are the Best-in-Class low
standby power and the good EMI performance.
2
Evaluation board
This document contains the list of features, the power supply specification, schematic, bill of material and
the transformer construction documentation. Typical operating characteristics such as performance curve
and scope waveforms are showed at the rear of the report.
Figure 1
EVAL ICE3AR2280VJZ
Application Note
3
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Specifications of evaluation board
3
Table 1
Specifications of evaluation board
Specifications of EVAL ICE3AR2280VJZ
Input voltage
85 VAC~265 VAC
Input frequency
50~60 Hz
Output voltage
5V
Output current
4A
Output power
20 W
Steady state output ripple voltage
(±1% of norminal output voltage)
Vripple_P_P< 50 mV
Dynamic load response undershoot and overshoot
(±3% of norminal output voltage)
Vripple_P_P< 200 mV
Active mode four point average efficiency
(25%,50%,75% and 100%load) (EU CoC Version 5, Tier 1)
Active mode at 10% load efficiency (EU CoC Version 5,
Tier 1)
>82% at 115 VAC and 230 VAC
>74%
No-load power consumption
(EU CoC Version 5, Tier 2)
< 75 mW
Maximum input power(Peak Power) for universal input
range (<±5% of average maximum input power)
<±3% of average maximum input power
Form factor case size (L x W x H)
90 mm x 60 mm x 35 mm (3.54" x 2.36" x
1.37")
4
Table 2
Features of ICE3AR2280VJZ
Features of ICE3AR2280VJZ
800 V avalanche rugged CoolSET™ with startup cell
Active Burst Mode for lowest standby power
Selectable entry and exit burst mode level
100kHz internally fixed switching frequency with jittering feature
Auto restart protection for over load, open Loop, VCC under voltage and over voltage and over
temperature
Over temperature protection with 50 °C hysteresis
Built-in 10 ms soft start
Built-in 20 ms and extendable blanking time for short duration peak power
Propagation delay compensation for both maximum load and burst mode
Adjustable input OVP
Overall tolerance of current limiting < ±5%
BiCMOS technology for low power consumption and wide VCC voltage range
Soft gate drive with 50 Ω turn-on resistor
Application Note
4
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Circuit description
5
Circuit description
5.1
Introduction
The EVAL ICE3AR2280VJZ evaluation board is a low cost off-line flyback switch mode power supply (SMPS)
using the ICE3AR2280VJZ integrated power IC from the CoolSET™-F3R80 family. The circuit shown in Figure
2 details a 5 V, 20 W power supply that operates from an AC line input voltage range of 85 VAC to 265 VAC and
line input OVP detect/reset voltage is 300/282 VAC, suitable for applications in enclosed adapter or open
frame auxiliary power supply for different system such as white goods, PC, server, DVD, LED TV, Set-top box,
etc.
5.2
Line input
The AC line input side comprises the input fuse F1 as over-current protection. The choke L1, X-capacitors C1,
C2 and Y-capacitor C16 act as EMI suppressors. Optional spark gap device SG1, SG2 and varistor VAR can
absorb high voltage stress during lightning surge test. After the bridge rectifier BR1 and the input bulk
capacitor C3, a voltage of 90 to 424 VDC is present which depends on input line voltage.
5.3
Line input over voltage protection
The AC line input OVP mode is detected by sensing the voltage level at BV pin through the resistors divider
from the bulk capacitor. Once the voltage level at BV pin hits above 1.98V, the controller stops switching and
enters into input OVP mode. When the BV voltage drops to 1.91V and the Vcc hits 17V, the input OVP mode is
released.
5.4
Start up
Since there is a built-in startup cell in the ICE3AR2280VJZ, no external start up resistor is required. The
startup cell is connecting the drain pin of the IC. Once the voltage is built up at the Drain pin of the
ICE3AR2280VJZ, the startup cell will charge up the VCC capacitor C11 and C7. When the VCC voltage exceeds
the UVLO at 17 V, the IC starts up. Then the VCC voltage is bootstrapped by the auxiliary winding to sustain
the operation.
5.5
Operation mode
During operation, the VCC pin is supplied via a separate transformer winding with associated rectification D5
and buffering C11 and C7.In order not to exceed the maximum voltage at VCC pin due to poor coupling of
transformer winding, an external zener diode ZD1 and resistor R8 can be added.
5.6
Soft start
The soft start is a built-in function and is set at 10ms.
5.7
RCD clamper circuit
While turns off the CoolMOS™, the clamper circuit R21, C14 ,R16 and D1 absorbs the current caused by
transformer leakage inductance once the voltage exceeds clamp capacitor voltage. Finally drain to source
voltage of CoolMOS™ is lower than maximum break down voltage (V(BR)DSS = 800 V) of CoolMOS™.
Application Note
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Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Circuit description
5.8
Peak current control of primary current
The CoolMOS™ drain source current is sensed via external shunt resistors R1 and R2 which determine the
tolerance of the current limit control. Since ICE3AR2280VJZ is a current mode controller, it would have a
cycle-by-cycle primary current and feedback voltage control which can make sure the maximum power of
the converter is controlled in every switching cycle. Besides, the patented propagation delay compensation
is implemented to ensure the maximum input power can be controlled in an even tighter manner. The
evaluation board shows approximately +/-2.43% of average maximum input power (refer to Figure 11).
5.9
Output stage
On the secondary side the power is coupled out by a schottky diode D3. The capacitor C8, C9, C21 provides
energy buffering following with the LC filter L2 and C18 to reduce the output voltage ripple considerably.
Storage capacitors C8, C9, C21 are selected to have a very small internal resistance (ESR) to minimize the
output voltage ripple.
Application Note
6
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Circuit diagram
6
Circuit diagram
Figure 2
Schematic of EVAL ICE3AR2280VJZ
Application Note
7
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
PCB layout
Note: In order to get the optimized performance of the CoolSET™, the grounding of the PCB layout must be
connected very carefully. From the circuit diagram above, it indicates that the grounding for the
CoolSET™ can be split into several groups; signal ground, VCC ground, Current sense resistor ground and
EMI return ground. All the split grounds should be connected to the bulk capacitor ground separately.
Signal ground includes all small signal grounds connecting to the CoolSET™ GND pin such as filter
capacitor ground C7, C6, C5 and opto-coupler ground.
VCC ground includes the VCC capacitor ground C11 and the auxiliary winding ground, pin 2 of the power
transformer.
Current Sense resistor ground includes current sense resistor R1 and R2.
EMI return ground includes Y capacitor C16.
7
PCB layout
7.1
Top side
Figure 3
Top side component legend
7.2
Bottom side
Figure 4
Bottom side copper and component legend
Application Note
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Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Bill of material (BOM)
8
Bill of material (BOM)
Table 3
Bill of materials
No.
Designator
Component
Description
Footprint
Part Number
Manufacturer
1
JP1,JP2
5V Test point
Connector
691101710002
Wurth
Electronics
2
2
BR1
600V/2A
KBPM
3N257-M4
Vishay
1
3
C1
MKT/220nF/3
05V
L*W*H:
12.5*7*18P15mm
B32922C3224M
Epcos
1
4
C2
MKT
/100nF/305V
L*W*H:
12.5*5*18P15mm
B32921C3104M
Epcos
1
5
C3
82uF/450V
Φ*H :18*30P7.5mm
450TXW82MEF
R18x30
Rubycon
1
6
C5
220nF/25V
0603
1
7
C6
1nF/25V
0603
1
8
C7
100nF/50V
0603
1
9
C11
22uF/35V
Φ*H :5*11P2.5mm
35PX22MEFC5x
11
Rubycon
1
10
C14
MKT
/2.2nF/630V
L*W*H:
12.5*7.3*6.5P5mm
B32529C8222J
000
Epcos
1
11
C16
Y1/2.2nF/400
V
L*W*H: 9*5*10P10mm
1
12
C19
1nF/1KV
1206
1
13
C8 ,C9,C21
1000uF/16V
Φ*H :10*20P5mm
14
C10
1000uF/16V
Φ*H :8*11.5P3.5mm
1
15
C17,C18,C2
0
100nF/16V
1206
3
16
C12
470pF
0805
1
17
C13
100nF /16V
0805
1
18
R3
3M/ 1/4W
DIP-P10mm
1
19
R4,R5
3.1M
1206
2
20
R6
43.2K
1206
1
21
R1
1.5R
1206
1
22
R2
2R
1206
1
23
R21
4.7R
1206
1
24
R7
2R
0805
1
Application Note
16ZL1000MEFC
10x20
9
Rubycon
Quantity
3
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Bill of material (BOM)
25
R8
4.99R
0805
1
26
R16
92K/1W
DIP-P10mm
1
27
R18
20.1R
1206
1
28
R9
20K
0805
1
29
R10
0R
0805
1
30
R12
20K
0805
1
31
R15
40.2K
0805
1
32
R14
1.1K
0805
1
33
R13
221R
0805
1
34
F1
2A/250V
Φ*H:8.5*7.5P5mm
1
35
VAR1
VR /S07K460
L*W*H:
9*5.7*11.5P5mm
B72207S461K1
01
Epcos
1
36
L1
CM_Choke2*
18mH/1a
L*W*H:
21.46*17*22.6
750342630
Wurth
Electronics
1
37
IC1
ICE3AR2280V
JZ
DIP-8
ICE3AR2280VJ
Z
Infineon
1
38
ZD1
20V Zener
Diode
SOD-123
39
IC2
SFH617-3
DIP-4
SFH617-3
1
40
IC3
AZ431
SOT-23
AZ431
1
41
TR1
410uH(54:4:1
1)
TR_EF20/10/6_H
_10Pin
750342625
42
D1
UF4007
DO-41
UF4007
43
D5
1N485B
0.2A/200V
DO-35
44
D3
SG30SC4M
TO-220FB
SG30SC4M
Shindengen
1
45
L2
Sleeve Choke
DIP-P5
742700221
Wurth
Electronics
1
46
J1,J3
Jumper
DIP-P10mm
2
47
J2
Jumper
DIP-P15mm
1
48
J4
0R
1206
1
49
HS1
50
NTC
Application Note
1
Wurth
Electronics
1
1
1
1
Jumper
DIP-P5mm
1
10
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Transformer construction
9
Transformer construction
Core and material: EE20/10/6(EF20), TP4A (TDG)
Bobbin: 070-4989 (10-Pins, TH-H, Horizontal version)
Primary Inductance, LP=410 µH (±5%), measured between pin 4 and pin 5
Manufacturer and part number: Wurth Electronics Midcom (750342625)
The bottom side of
the core above the
secondary side pins
should be taped with
3 layers isolation
tapes.
Figure 5
Start
Stop
No. of turns Wire size
Layer
4
6, 7
1
3
9, 10
2
26
4
11
1 X TIW Ø0.25mm
4 X TIW Ø0.4mm
1 X TIW Ø0.2mm
½ Primary
Secondary
Auxiliary
3
5
28
1 X TIW Ø0.25mm
½ Primary
Transformer structure
Application Note
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Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Test results
10
Test results
10.1
Efficiency, regulation and output ripple
Table 4
Vin
(VAC)
85
115
230
265
Figure 6
Efficiency, regulation and output ripple
Pin
(W)
Vout
(VDC)
Iout
(A)
Vout_ripple_pk_pk
(mV)
Pout
(W)
η
(%)
0.0230
5.01
0.00
24.30
2.5100
5.01
0.40
6.0360
5.01
1.00
10.90
2.00
79.78
10.20
5.01
12.1800
5.00
82.92
2.00
17.30
10.01
82.21
18.4200
24.9800
5.00
3.00
30.00
15.01
81.51
5.00
4.00
34.00
20.02
80.15
0.0260
5.01
0.00
25.00
2.5200
5.01
0.40
13.40
2.00
79.46
6.0300
5.01
1.00
12.80
5.01
83.00
12.0300
5.00
2.00
14.70
10.01
83.23
18.1200
5.00
3.00
28.00
15.01
82.86
24.4500
5.00
4.00
32.00
20.02
81.87
0.0470
5.01
0.00
26.20
2.6800
5.01
0.40
12.20
2.00
74.72
6.1670
5.01
1.00
13.40
5.01
81.24
12.0260
5.00
2.00
16.30
10.01
83.26
17.9200
5.00
3.00
22.80
15.01
83.78
24.0120
5.00
4.00
30.40
20.02
83.36
0.0560
5.01
0.00
26.20
2.7600
5.01
0.40
11.50
2.00
72.55
6.2440
5.01
1.00
13.50
5.01
80.24
12.1130
5.00
2.00
16.01
10.01
82.66
17.9940
5.00
3.00
20.03
15.01
83.44
24.0220
5.00
4.00
30.00
20.02
83.33
Average η
(%)
OLP Pin
(W)
OLP Iout
(A)
32.57
5.12
33.10
5.34
34.00
5.62
34.19
5.67
81.70
82.74
82.91
82.42
Efficiency vs AC line input voltage
Application Note
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Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Test results
Figure 7
Efficiency vs output power @ 115 VAC and 230 VAC line
10.2
Standby power
Figure 8
Standby power @ no load vs AC line input voltage (measured by Yokogawa WT210 power
meter - integration mode)
Application Note
13
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Test results
10.3
Line regulation
Figure 9
Line regulation Vout @ full load vs AC line input voltage
10.4
Load regulation
Figure 10
Load regulation Vout vs output power
Application Note
14
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Test results
10.5
Maximum power
Figure 11
Maximum input power (before over-load protection) vs AC line input voltage
10.6
ESD immunity (EN61000-4-2)
Pass [level 3 (±6 kV) for contact discharge].
Pass [special level (±12 kV) for contact discharge by adding SG1 and SG2 (RLS302-301M)].
10.7
Surge immunity (EN61000-4-5)
Pass [Installation class 3, 2 kV (line to earth) and 1 kV (line to line)].
Pass [Installation class 4, 4 kV (line to earth) and 2 kV (line to line) by adding SG1 and SG2 (RLS302-301M)].
Application Note
15
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Test results
10.8
Conducted emissions (EN55022 class B)
The conducted EMI was measured by Schaffner (SMR25503) and followed the test standard of EN55022
(CISPR 22) class B. The evaluation board was set up at maximum load (20 W) with input voltage of 115 VAC
and 230 VAC.
Figure 12
Conducted emissions(Line) at 115 VAC and maximum Load
Figure 13
Conducted emissions(Neutral) at 115 VAC and maximum Load
Application Note
16
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Test results
Figure 14
Conducted emissions(line) at 230 VAC and maximum Load
Figure 15
Conducted emissions(Neutral) at 230 VAC and maximum Load
Pass conducted EMI EN55022 (CISPR 22) class B with > 6 dB margin for QP.
Application Note
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Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
10.9
Thermal measurement
The thermal test of open frame evaluation board was done using an infrared thermography camera (TVS500EX) at ambient temperature 25 ⁰C. The measurements were taken after two hours running at full load.
Table 5
Hottest temperature of evaluation board
No. Item
Temperature @ Temperature @
85 VAC and FL(°C) 115 VAC and FL(°C)
Temperature @
230 VAC and FL(°C)
1
IC1 (ICE3AR2280VJZ)
83.5
68.5
62.3
62.9
2
BR1
47.5
41.7
35.0
33.8
3
R16
58.8
56.9
54.2
53.8
4
TR1
59.1
59.1
59.4
60
5
D3
62.8
63.0
64.1
64.6
6
Ambient temperature 25
25
25
Temperature @ 265 VAC
and FL(°C)
25
85 VAC, 20 W load, 25 ⁰C ambient
115 VAC, 20 W load, 25 ⁰C ambient
230 VAC, 20 W load, 25 ⁰C ambient
265 VAC, 20 W load, 25 ⁰C ambient
Figure 16
Infrared thermal image of EVAL ICE3AR2280VJZ
Application Note
18
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Waveforms and scope plots
11
Waveforms and scope plots
All waveforms and scope plots were recorded with a LeCroy 6050 oscilloscope
11.1
Startup at low/high AC line input voltage with maximum load
397 ms
397 ms
Entry/exit burst
selection
Entry/exit burst
selection
Channel 1; C1(Yellow) : Drain voltage (VDrain)
Channel 1; C1(Yellow) : Drain voltage (VDrain)
Channel 2; C2( Red): Supply voltage (VCC)
Channel 2; C2( Red): Supply voltage (VCC)
Channel 3; C3(Blue) : Feedback voltage (VFBB)
Channel 3; C3(Blue) : Feedback voltage (VFBB)
Channel 4; C4(Green) :BV voltage (VBV)
Channel 4; C4(Green) :BV voltage (VBV)
Startup time @ 85 VAC & max. load = 397 ms
Startup time @ 265 VAC & max. load = 397 ms
Figure 17
Startup
11.2
Soft start
10 ms
Channel 1; C1 : Current sense voltage (VCS)
Channel 2; C2 : Supply voltage (VCC)
Channel 3; C3 : Feedback voltage (VFBB)
Channel 4; C4 : Zero crossing voltage (VBV)
Soft Star time @ 85 VAC & max. load = 10 ms
Figure 18
Soft start
Application Note
19
Revision 1.2, 2015-05-12
20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
Waveforms and scope plots
11.3
Frequency jittering
3.7 ms
Channel 1; C1(Yellow) : Drain voltage (VDrain)
Channel F1 : Frequency track of C1
Frequency jittering from 96 kHz ~ 104 kHz, Jitter period is set at 3.7 ms internally
Figure 19
Frequency jittering@ 85 VAC and max. load
11.4
Drain and current sense voltage at maximum load
Channel 1; C1 : Drain-source voltage (VDS)
Channel 1; C1 : Drain-source voltage (VDS)
Channel 2; C2 : Current sense voltage (VCS)
Channel 2; C2 : Current sense voltage (VCS)
VDrain_peak @ 85 VAC = 294 V
VDrain_peak @ 265 VAC = 602 V
Figure 20 Drain and current sense voltage at max. load
Application Note
20
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Waveforms and scope plots
11.5
Load transient response (Dynamic load from 10% to 100%)
Channel 1; C1 : Output ripple voltage (Vout)
Channel 1; C1 : Output ripple voltage (Vout)
Channel 2; C2 : Output current (Iout)
Channel 2; C2 : Output current (Iout)
Vripple_pk_pk @ 85 VAC =190 mV (Load change
from10% to 100%,100 Hz,0.4 A/μS slew rate)
Vripple_pk_pk @ 26 5VAC =190 mV (Load change
from10% to 100%,100 Hz,0.4 A/μS slew rate)
Probe terminal end with decoupling capacitor of
0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz
filter
Probe terminal end with decoupling capacitor of
0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz
filter
Figure 21
Load transient response
11.6
Output ripple voltage at maximum load
Channel 1; C1 : Output ripple voltage (Vout)
Channel 1; C1 : Output ripple voltage (Vout)
Channel 2; C2 : Output current (Iout)
Channel 2; C2 : Output current (Iout)
Vripple_pk_pk @ 85 VAC =35 mV
Vripple_pk_pk @ 265 VAC = 30 mV
Probe terminal end with decoupling capacitor of
0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz
filter
Probe terminal end with decoupling capacitor of
0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz
filter
Figure 22
AC output ripple at max. load
Application Note
21
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Waveforms and scope plots
11.7
Output ripple voltage during burst mode at 1 W load
Channel 1; C1 : Output ripple voltage (Vout)
Channel 1; C1 : Output ripple voltage (Vout)
Channel 2; C2 : Output current (Iout)
Channel 2; C2 : Output current (Iout)
Vripple_pk_pk @ 85 VAC =39 mV
Vripple_pk_pk @ 265 VAC = 39 mV
Probe terminal end with decoupling capacitor of
0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz
filter
Probe terminal end with decoupling capacitor of
0.1 μF(ceramic) and 1 μF(Electrolytic), 20 MHz
filter
Figure 23
AC output ripple at 1 W load
11.8
Active Burst mode operation
Channel 1; C1 : Current sense voltage (VCS)
Channel 1; C1 : Current sense voltage (VCS)
Channel 2; C2 : Supply voltage (VCC)
Channel 2; C2 : Supply voltage (VCC)
Channel 3; C3 : Feedback voltage (VFBB)
Channel 3; C3 : Feedback voltage (VFBB)
Channel 4; C4 :BV voltage (VBV)
Condition to enter burst: VFB<1.42 V and last for
20 ms
(load change form full load to 1 W load)
Figure 24 Active burst mode at 85 VAC
Application Note
Channel 4; C4 :BV voltage (VBV)
Condition to leave burst: VFB>4.5 V
(load change form 1 W load to full load)
22
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Waveforms and scope plots
11.9
VCC over voltage protection (Odd skip auto restart mode)
VCC OVP2
VCC OVP1
Channel 1; C1 : Drain voltage (VDrain)
Channel 2; C2 : Supply voltage (VCC)
Channel 3; C3 : Feedback voltage (VFBB)
Channel 4; C4 : BV voltage (VBV)
Condition: VCC>25.5 V
VCC>20.5 V and VFB>4.5 V and during soft start
(Short the diode of optocoupler(Pin 1 and 2 of IC2) during system operating at no load)
Figure 25 VCC overvoltage protection at 85 VAC
11.10
Over load protection (Auto restart mode)
built-in 20ms blanking
extended blanking
Channel 1; C1(Yellow) : Drain voltage (VDrain)
Channel 2; C2( Red): Supply voltage (VCC)
Channel 3; C3(Blue) : Feedback voltage (VFBB)
Channel 4; C4(Green) :BV voltage (VBV)
Condition: VFB>4.5 V and last for 20 ms andVBV>4.5 V and
last for 30 µs
(output load change from 4 Ato 6 A)
Figure 26
Over load protection with built-in+extended blanking time at 85 VAC
Application Note
23
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20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
11.11
VCC under voltage/Short optocoupler protection (Normal auto restart
mode)
Exit autorestart
Enter autorestart
Channel 1; C1(Yellow) : Drain voltage (VDrain)
Channel 2; C2( Red): Supply voltage (VCC)
Channel 3; C3(Blue) : Feedback voltage (VFBB)
Channel 4; C4(Green) :BV voltage (VBV)
Condition: VCC<10.5 V
(short the transistor of optocoupler(Pin 3 and 4 of IC2) during system operating @ full load and release)
Figure 27
VCC under voltage/short optocoupler protection at 85 VAC
11.12
AC Line input OVP mode
Enter input OVP
Exit input OVP
Enter input OVP
Exit input OVP
Channel 1; C1(Yellow) : Bulk voltage(Vbulk)
Channel 1; C1(Yellow) : Bulk voltage(Vbulk)
Channel 2; C2(Red) : Supply voltage (VCC)
Channel 2; C2(Red) : Supply voltage (VCC)
Channel 3; C3(Blue : Current sense voltage (VCS)
Channel 3; C3(Blue : Current sense voltage (VCS)
Channel 4; C4 (Green): BV voltage (VBV)
Channel 4; C4 (Green): BV voltage (VBV)
Max. load condition: VBV>1.98 V and last for 400 µs
(OVP detect)
VBV<1.91 V and last for 5 µs
(OVP reset)
(gradually increase AC line voltage until OVP detect
and decrease AC line until OVP reset)
No load condition: VBV>1.98 V and last for 400 µs
(OVP detect)
VBV<1.91 V and last for 5 µs
(OVP reset)
(gradually increase AC line voltage until OVP detect
and decrease AC line until OVP reset)
Figure 28
Input OVP
Application Note
24
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20 W 5 V SMPS Evaluation Board with ICE3AR2280VJZ
References
12
References
[1]
Infineon Technologies, Datasheet “CoolSET™-F3R80 ICE3AR2280VJZ Off-Line SMPS Current Mode
Controller with integrated 800V CoolMOS™and Startup cell( input OVP and Frequency Jitter) in DIP-7”
[2]
Infineon Technologies, AN-PS0044-CoolSET F3R80 DIP-7 brownout/input OVP and frequency jitter
version design guide-V1.5
Revision History
Major changes since the last revision
Page or Reference
5
Application Note
Description of change
Add section 5.3 under circuit description
25
Revision 1.2, 2015-05-12
Trademarks of Infineon Technologies AG
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Last Trademarks Update 2011-11-11
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Edition 2015-05-12
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Infineon Technologies AG
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