XMC 1302
32-bit Microcontroller Series for Industrial Applications
Server Fan C on trol Reference Design
AP32294
Application Note
About this document
Scope and purpose
The Infineon ‘Server Fan Reference Design’ is a complete solution for a low-voltage fan motor drive
application (a BLDC and PMSM server fan motor), with low noise, minimal motor virbration, and a very low
external component count. This application is typically used to supply cooling air to electronic equipments.
The compact design is based around the Infineon 32-bit ARM® Cortex ™ XMC1302 microcontroller with readyto-use sensorless Field Oriented Control (FOC) firmware to support fast implemention into exisiting
development platforms. The XMC1302 is a low-cost, high-performance microcontroller, and has flexible ADC
features, Capture Compare Units (CCU4/8), and a Math Co-processor.
The PCB layout has a unique ‘coin concept’. The spacing on the PCB board is ultilized with surface mount
components which results in lower BOM costs:
Figure 1
Server Fan PCB layout ‘coin concept’
Intended audience
Server Fan motor manufacturers and design engineers who intend to reduce the system cost, improve
efficiency, and shorten the application development cycle.
V1.0
1
2015-04
Server Fan Control Reference Design
AP32294
Table of Contents
Applicable Products
XMC1302
BSL308C
BC848W
IFX20001MB
DAVE ™
References
The User’s Manual can be downloaded from http://www.infineon.com/XMC
DAVE™ and its resources can be downloaded from http://www.infineon.com/DAVE
Table of Contents
About this document .....................................................................................................................1
Table of Contents ..........................................................................................................................2
1
XMC1302 features .........................................................................................................3
2
Reference Design Target Requirements ..........................................................................4
3
System Block Diagram ...................................................................................................5
4
4.1
Motor Drive features .....................................................................................................6
Infineon Sensorless FOC algorithm with XMC1302 ............................................................................ 6
5
5.1
5.2
5.3
5.4
5.5
5.6
Hardware design ...........................................................................................................7
Form factors ........................................................................................................................................ 7
Pin mapping ........................................................................................................................................ 7
Microcontroller Motor Control Ports .................................................................................................. 8
MOSFET stage ...................................................................................................................................... 9
Microcontroller Control Interface ..................................................................................................... 10
Power Supply .................................................................................................................................... 11
6
Software State Machine............................................................................................... 12
7
7.1
7.2
7.3
7.4
7.5
Motor Control Test Data .............................................................................................. 13
Start-up Current Waveform .............................................................................................................. 13
Power Stage Inverter Dead-Time...................................................................................................... 14
Motor Steady-State Current Waveform ............................................................................................ 16
Motor High Speed Current Waveform .............................................................................................. 17
Start-up Lock Detection .................................................................................................................... 18
8
Revision History .......................................................................................................... 19
Application Note
2
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Server Fan Control Reference Design
AP32294
XMC1302 features
1
XMC1302 features
The XMC1302 is a low-cost microcontroller, optimized for motor control applications.
Package types
TSSOP-16
VQFN-24
TSSOP-28
TSSOP-38
VQFN-40
XMC1302 as a controller for various types of motor
Permanent Magnet Synchronous Motors (PMSM)
Brushless DC Motors
AC Induction Motors (ACIM)
Servo Motors
Brushed DC Motors
Key features
High performance 32-bit Cortex-M0 CPU
MATH Co-processor (MATH), consists of a CORDIC unit for trigonometric calculation and a division unit
On-Chip Memories, 16 kbytes on-chip high-speed SRAM, up to 200 kbytes on-chip Flash program and
data memory
12 channels 12-bit ADCs with hardware trigger
Built-in Temperature Sensor
Capture/Compare Units 4 (CCU4) for use as general purpose timers
Capture/Compare Units 8 (CCU8) for motor control PWM generation
Watchdog Timer (WDT) for safety sensitive applications
Application Note
3
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Reference Design Target Requirements
2
Reference Design Target Requirements
The reference design is intended to meet common server fan application specifications:
Table 1
Reference Design Requirements
Item
Requirement
Motor Type
3 Phase PMSM motor
Motor Pole Pair
2 pp
Motor Resistance (per phase)
1.1 ~ 1.2 Ω
Motor Inductance (per phase)
293 ~ 302 uH (10 kHz)
PCB Layout Diameter
22 mm
Operating Voltage
12 V
Current Rating
1.00 A
Power Rating
12 W
Speed
0 to 25000 rpm
Fault Detection
Lock, reverse polarity
Over Current
Yes
Control Interface
POT / PWM input / FG Output
Control Algorithm
Field Oriented Control
Microcontroller
XMC1302 TSSOP16/VQFN24
Note: All test waveforms are captured and shown later in this document.
Application Note
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System Block Diagram
3
System Block Diagram
12VDC
MOSFET
+
Fan Motor
Voltage
Regulator
PWMs
5V
XMC1302
TSSOP16
VQFN24
Control
Interface
PWM
Figure 2
ADC
UART
FG
System Block Diagram
The hardware can be dvided into four parts:
Microcontroll (MCU)
− The MCU consists of an XMC1302 ARM® Cortex ™ with single-shunt Field Oriented Control (FOC)
algorithm. It is used to control high-side and low-side transistors with adjustable dead-time.
MOSFET stage
Control interface
Voltage regulator
This reference design uses ADC for current measurement with integrated gain in the XMC1302
microcontroller.
A two-wire SWD or single-wire SPD debugging interface is supported.
Application Note
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Motor Drive features
4
Motor Drive features
The major requirements of server fan applications are for low audible noise and high efficiency. To boost the
efficiency, design engineers need a means to offset the higher cost of a 3-phase fan motor compared to a
single or dual-phase fan motor.
Most server fan motors are based on a 3-phase Brushless DC (BLDC) motor and Permanent Magnet
Synchronous Motor (PMSM). While BLDC and PMSM motors have always been preferred for performance
(efficiency, noise, starting torque), a complex and robust sensorless motor control algorithm is required.
4.1
Infineon Sensorless FOC algorithm with XMC1302
Fast execution with hardware Math co-processor
Optimized FOC block, without Inverse Park Transform
Optimized Space Vector Modulation (SVM) using internal amplifier for single-shunt current sensing
One single CORDIC calculation for Space Vector Modulation (SVM)
Smooth and low-power start-up
Application Note
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Hardware design
5
Hardware design
This reference design hardware includes single-shunt current measurement. The operating supply voltage
of the hardware is 10V to 30V. It supports up to 25 kHz PWM switching frequency.
5.1
Form factors
22mm
Top layer
Figure 3
5.2
Figure 4
Bottom layer
Diameter 22 mm with 2 layer Circular PCB layout
Pin mapping
XMC1302 VQFN pin assignment
Application Note
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Hardware design
5.3
Figure 5
Microcontroller Motor Control Ports
XMC1302 Motor Control Ports
Highlights
XMC1302 ARM® Cortex ™ - M0 32-bit microcontroller for motor control.
Control of High-side and Low-side transistors with dead-time.
ADC current measurement with adjustable gain.
Support debug interface which includes two wire SWD or 1 wire SPD.
− The non-isolated debug interface pins are connected directly to the controller.
No external crystal or resonator is required. This helps for small size PCB layout.
Application Note
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Hardware design
5.4
Figure 6
MOSFET stage
High-side and Low-side MOSFET circuitry
Highlights
Dual MOSFET switching with enhanced High-side driver circuitry.
Direct drive of Low-side MOSFET.
Single Shunt current sensing measurement.
Application Note
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Hardware design
5.5
Figure 7
Microcontroller Control Interface
Interface circuitry with XMC1302
Highlights
Speed control with PWM input including 12V level shifter.
FG output with open collector circuitry for use in 12V domain.
Two independent UART channels (RXD/TXD) with 12V level shifter (optional).
Application Note
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Hardware design
5.6
Figure 8
Power Supply
Low Dropout Power Supply
Highlights
IFX20001MBV5 in small package SCT-595.
Input voltage range up to 45V.
Output voltage 5V, output current 30mA.
Protection functions include over-temperature protection, and reverse polarity protection.
Wide temperature range -40 ˚C ≤ Tj ≤ 125 ° C.
Application Note
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Software State Machine
6
Software State Machine
The Infineon Server Fan Control Reference Design software provides the following life-cycle states:
Brake
− When the board is powered on, braking is applied for position alignment.
Start-up
− The motor will start based on the voltage applied.
Ramping
− It performs speed adjustment (ramp-up or ramp-down).
Transition
− Maximum Efficiency Tracking (MET) is applied to increase transition from open loop to closed loop
stability.
Stop/Trip Protection
− If any over-current protection is triggered, the motor will stop or stop-restart the operation.
FOC PLL Observer
− Closed loop algorithm to estimate the rotor position based on single shunt current feedback
measurement.
main()
Power Up
Init
while (1) { }
IRQ1 in FOC_Functions.c
CCU80_0_IRQHandler()
Speed Adjustment
with PWM or
Potentiometer
(POT)
Ramp-Down
IRQ2 in ADC.c
VADC0_G1_1_IRQHandler
Read ADC
Results
FOC w/ PLL
Observer
Stop
/ or Trip
Protection
Brake Motor
Ramp-Up
MET
Transition
Figure 9
V/f Start-up
Software State Machine
Application Note
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Motor Control Test Data
7
Motor Control Test Data
7.1
Start-up Current Waveform
FG start after
FOC is stable
CH 1 (Y): P2.10 (for FG)
CH 2 (G): P0.0 (UH) – Inverter phase U high-side control signal
CH 3 (B): CH 4 (P): Current of Fan Motor Phase U (100mV/A)
Figure 10
Direct FOC Start-up
When the fan motor is at a standstill, it is impossible to sense positional information from motor back-EMF.
The Infineon Server Fan Reference Design provides FOC direct start-up control to achieve better efficiency.
Application Note
13
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AP32294
Motor Control Test Data
7.2
Power Stage Inverter Dead-Time
To minimize the unwanted ripple in torque that may affect motor motion smoothness, the XMC1302 Capture
Compare Unit (CCU4/8) provides flexible dead-time generation. This is used to generate a blanking time
period (high-side and low-side transistor in off-state simultaneously). Both transistors are switched off for a
short period of time to prevent the transistors conducting simulatenously and causing a short circuit from
DC link voltage to ground. The CCU8 supports assymetric dead-time which is required in this application for
efficient switching.
Dead-Time 0.5μs
CH 1 (Y): P0.0 (UH) – Inverter phase U high-side control signal
CH 2 (G): P0.1 (UL) – Inverter phase U low-side control signal
CH 3 (B): Gate of inverter high-side switch (PMOSFET), for phase U
CH 4 (P): Phase U output of inverter
Figure 11
Phase U Rising Edge Output
Application Note
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Motor Control Test Data
Dead-Time 1.5μs
CH 1 (Y): P0.0 (UH) – Inverter phase U high-side control signal
CH 2 (G): P0.1 (UL) – Inverter phase U low-side control signal
CH 3 (B): Gate of inverter high-side switch (PMOSFET), for phase U
CH 4 (P): Phase U output of inverter
Figure 12
Phase U Failing Edge Output
Application Note
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Motor Control Test Data
7.3
Motor Steady-State Current Waveform
CH 1 (Y): P2.10 (for FG)
CH 2 (G): P0.0 (UH) – Inverter phase U high-side control signal
CH 3 (B): CH 4 (P): Current of Fan Motor Phase U (100mV/A)
Figure 13
At steady state stage (FOC Closed Loop)
The Frequency Generator (FG) output is an important feature because it provides feedback for the system to
monitor the speed behavior of the Server Fan. For example, if the FG output is at 96Hz:
𝜔=
60 𝑥 𝐹𝐺𝑓𝑟𝑒𝑞
60 𝑥 96 𝐻𝑧
=
𝑛
2
𝜔 = 2880
Where:
ω = Motor Speed (in rpm)
𝑛 = Number of pole pairs
Application Note
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Motor Control Test Data
7.4
Motor High Speed Current Waveform
CH 1 (Y): Angle
γ =arctan(Iβ/Iα) of fan motor phase current I
CH 2 (G): Iα
CH 3 (B): Iβ (where Iα/Iβ are from single-shunt current reconstruction)
CH 4 (P): Current of fan motor Phase U (100mV/A)
Figure 14
Motor Phase Current with constant high speed
The motor phase current waveform has a harmonic PWM frequency of 15 kHz. The harmonic distortion is
mainly due to the small phase inductance of the fan motor. By increasing the PWM frequency, the harmonic
distortion could be reduced.
𝜔=
60 𝑥 𝛾
60 𝑥 769 𝐻𝑧
=
𝑛
2
𝜔 = 23,070
Where:
ω = Motor Speed (in rpm)
𝑛 = Number of pole pairs
𝛾 = Angle (in Hz)
Application Note
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Motor Control Test Data
7.5
Start-up Lock Detection
Start
Retry to Start
Stop until MCU
Reset
CH 1 (Y): P2.10 (for FG)
CH 2 (G): CH 3 (B): CH 4 (P): Current of Fan Motor Phase U (100mV/A)
Figure 15
Phase Current Waveform during Start-up
The FG pin outputs a PWM waveform under normal operating conditions. During the start-up lock
protection, FG output remains high until the motor restarts. The retry process will only be stopped when the
microcontroller power is reset.
Application Note
18
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Revision History
8
Revision History
Current Version is V1.0, 2015-04
Page or Reference
Description of change
V1.0, 2015-03
Initial Version
Application Note
19
V1.0, 2015-04
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Edition 2015-04
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AP32294
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